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1874 Commits

Author SHA1 Message Date
Jan Beulich
ddab3d5917 gas/testsuite/ 
2008-08-28  Jan Beulich  <jbeulich@novell.com>

	* gas/i386/intel.s: Add retf.
	* gas/i386/intel.{d,e}: Adjust.
	* gas/i386/opcode-intel.d: Replace lret with retf.

opcodes/
2008-08-28  Jan Beulich  <jbeulich@novell.com>

	* i386-dis.c (dis386): Adjust far return mnemonics.
	* i386-opc.tbl: Add retf.
	* i386-tbl.h: Re-generate.
 2008-08-28 15:59:32 +00:00
Jan Beulich
b19d538532 gas/testsuite/ 
2008-08-28  Jan Beulich  <jbeulich@novell.com>

	* gas/i386/gas/i386/opcode-suffix.d: Add suffixes to cmovXX.

opcodes/
2008-08-28  Jan Beulich  <jbeulich@novell.com>

	* i386-dis.c (dis386_twobyte): Adjust cmovXX mnemonics.
 2008-08-28 15:30:30 +00:00
H.J. Lu
1ca35711f4 gas/ 
2008-08-28  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-ia64.c (CR_IIB0): New.
	(CR_IIB1): Likewise.
	(cr): Add cr.iib0 and cr.iib1.
	(specify_resource): Handle IA64_RS_CR_IIB and CR_IIB0/CR_IIB1.

gas/testsuite/

2008-08-28  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/ia64/dv-raw-err.s: Add tests for cr.iib0 and cr.iib1.
	* gas/ia64/dv-waw-err.s: Likewise.
	* gas/ia64/regs.s: Likewise.

	* gas/ia64/dv-raw-err.l: Updated.
	* gas/ia64/dv-waw-err.l: Likewise.
	* gas/ia64/regs.d: Likewise.

include/opcode/

2008-08-28  H.J. Lu  <hongjiu.lu@intel.com>

	* ia64.h (ia64_resource_specifier): Add IA64_RS_CR_IIB.  Update
	IA64_RS_CR.

opcodes/

2008-08-28  H.J. Lu  <hongjiu.lu@intel.com>

	* ia64-dis.c (print_insn_ia64): Handle cr.iib0 and cr.iib1.
	* ia64-gen.c (lookup_specifier): Likewise.

	* ia64-ic.tbl: Add support for cr.iib0 and cr.iib1.
	* ia64-raw.tbl: Likewise.
	* ia64-waw.tbl: Likewise.
	* ia64-asmtab.c: Regenerated.
 2008-08-28 14:07:50 +00:00
H.J. Lu
515c56e780 gas/testsuite/ 
2008-08-27  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/intel.s: Add tests for fidivr.

	* gas/i386/intel.d: Updated.

opcodes/

2008-08-27  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.tbl: Correct fidivr operand size.

	* i386-tbl.h: Regenerated.
 2008-08-27 17:53:42 +00:00
Alan Modra
da594c4a29 Update a number of obsolete autoconf macros. 2008-08-24 03:13:05 +00:00
H.J. Lu
a5ff0eb22b gas/ 
2008-08-20  H.J. Lu  <hongjiu.lu@intel.com>

	AVX Programming Reference (August, 2008)
	* config/tc-i386.c (CPU_FLAGS_AES_MATCH): New.
	(CPU_FLAGS_AVX_MATCH): Likewise.
	(CPU_FLAGS_32BIT_MATCH): Updated.
	(cpu_flags_match): Likewise.

gas/testsuite/

2008-08-20  H.J. Lu  <hongjiu.lu@intel.com>

	AVX Programming Reference (August, 2008)
	* gas/i386/avx.s: Add AES + AVX tests.
	* gas/i386/arch-10.s: Likewise.
	* gas/i386/sse2avx.s: Likewise.
	* gas/i386/x86-64-arch-2.s: Likewise.
	* gas/i386/x86-64-avx.s: Likewise.
	* gas/i386/x86-64-sse2avx.s: Likewise.

	* gas/i386/arch-10.d: Updated.
	* gas/i386/arch-10-1.l: Likewise.
	* gas/i386/arch-10-2.l: Likewise.
	* gas/i386/arch-10-3.l: Likewise.
	* gas/i386/arch-10-4.l: Likewise.
	* gas/i386/avx.d: Likewise.
	* gas/i386/avx-intel.d: Likewise.
	* gas/i386/sse2avx.d: Likewise.
	* gas/i386/x86-64-arch-2.d: Likewise.
	* gas/i386/x86-64-avx.d: Likewise.
	* gas/i386/x86-64-avx-intel.d: Likewise.
	* gas/i386/x86-64-sse2avx.d: Likewise.

	* gas/i386/i386.exp: Run arch-avx-1, arch-avx-1-1 and
	arch-avx-1-2.

	* gas/i386/arch-avx-1.d: New.
	* gas/i386/arch-avx-1.s: Likewise.
	* gas/i386/arch-avx-1-1.l: Likewise.
	* gas/i386/arch-avx-1-1.s: Likewise.
	* gas/i386/arch-avx-1-2.l: Likewise.
	* gas/i386/arch-avx-1-2.s: Likewise.

opcodes/

2008-08-20  H.J. Lu  <hongjiu.lu@intel.com>

	AVX Programming Reference (August, 2008)
	* i386-dis.c (PREFIX_VEX_38DB): New.
	(PREFIX_VEX_38DC): Likewise.
	(PREFIX_VEX_38DD): Likewise.
	(PREFIX_VEX_38DE): Likewise.
	(PREFIX_VEX_38DF): Likewise.
	(PREFIX_VEX_3ADF): Likewise.
	(VEX_LEN_38DB_P_2): Likewise.
	(VEX_LEN_38DC_P_2): Likewise.
	(VEX_LEN_38DD_P_2): Likewise.
	(VEX_LEN_38DE_P_2): Likewise.
	(VEX_LEN_38DF_P_2): Likewise.
	(VEX_LEN_3ADF_P_2): Likewise.
	(PREFIX_VEX_3A04): Updated.
	(VEX_LEN_3A06_P_2): Likewise.
	(prefix_table): Add PREFIX_VEX_38DB, PREFIX_VEX_38DC,
	PREFIX_VEX_38DD, PREFIX_VEX_38DE and PREFIX_VEX_3ADF.
	(x86_64_table): Likewise.
	(vex_len_table): Add VEX_LEN_38DB_P_2, VEX_LEN_38DC_P_2,
	VEX_LEN_38DD_P_2, VEX_LEN_38DE_P_2, VEX_LEN_38DF_P_2 and
	VEX_LEN_3ADF_P_2.

	* i386-opc.tbl: Add AES + AVX instructions.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.
 2008-08-20 18:38:40 +00:00
Andreas Krebbel
7dc6076f0c 2008-08-15 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> 
* s390-opc.c (INSTR_RRF_FFRU, MASK_RRF_FFRU): New instruction format.
	* s390-opc.txt (lxr, rrdtr, rrxtr): Fix instruction format.

2008-08-15  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>

	* gas/s390/esa-g5.d: lxr operands are floating point.
	* gas/s390/esa-g5.s: Likewise.
	* gas/testsuite/gas/s390/zarch-z9-ec.d: rrdtr, rrxtr third
	operands is gpr.
	* gas/testsuite/gas/s390/zarch-z9-ec.s: Likewise.
 2008-08-15 12:10:21 +00:00
Alan Modra
7357c5b6a6 PR 6526 
* configure.in: Invoke AC_USE_SYSTEM_EXTENSIONS.
 2008-08-15 08:31:52 +00:00
Alan Modra
899d85bead PR 6825 
* ppc-opc.c (powerpc_opcodes): Enable rfci, mfpmr, mtpmr for e300.
 2008-08-14 13:56:00 +00:00
H.J. Lu
dfb0759252 gas/testsuite/ 
2008-08-12  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/amd.s: Add syscall and sysret.  Remove padding.

	* gas/i386/amd.d: Updated.
	* gas/i386/x86-64-opcode.d: Likewise.

	* gas/i386/i386.exp: Run x86-64-intel64.

	* gas/i386/x86-64-intel64.d: New.
	* gas/i386/x86-64-intel64.s: Likewise.

	* gas/i386/x86-64-opcode.s: Add syscall and sysret.

opcodes/

2008-08-12  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.tbl: Add syscall and sysret for Cpu64.

	* i386-tbl.h: Regenerated.
 2008-08-12 21:44:56 +00:00
Alan Modra
323ee3f41c Set LC_ALL=C rather than unsetting LC_COLLATE for sort. 2008-08-04 06:55:33 +00:00
Peter Bergner
9b4e57660d gas/ 
* config/tc-ppc.c (parse_cpu): Rename altivec_or_spe to retain_flags.
	Handle -mvsx and -mpower7.
	(md_show_usage): Document -mpower7 and -mvsx.
	* doc/as.texinfo (Target PowerPC): Document -mvsx.
	* doc/c-ppc.texi (PowerPC-Opts): Document -mvsx and -mpower7.

gas/testsuite/
	* gas/ppc/power7.d: New.
	* gas/ppc/power7.s: Likewise.
	* gas/ppc/ppc.exp: Run power7 test.

include/opcode/
	* ppc.h (PPC_OPCODE_VSX, PPC_OPERAND_VSR): New.

opcodes/
	* ppc-dis.c (powerpc_init_dialect): Handle power7 and vsx options.
	(print_insn_powerpc): Prepend 'vs' when printing VSX registers.
	(print_ppc_disassembler_options): Document -Mpower7 and -Mvsx.
	* ppc-opc.c (insert_xt6): New static function.
	(extract_xt6): Likewise.
	(insert_xa6): Likewise.
	(extract_xa6: Likewise.
	(insert_xb6): Likewise.
	(extract_xb6): Likewise.
	(insert_xb6s): Likewise.
	(extract_xb6s): Likewise.
	(XS6, XT6, XA6, XB6, XB6S, DM, XX3, XX3DM, XX1_MASK, XX3_MASK,
	XX3DM_MASK, PPCVSX): New.
	(powerpc_opcodes): Add opcodes "lxvd2x", "lxvd2ux", "stxvd2x",
	"stxvd2ux", "xxmrghd", "xxmrgld", "xxpermdi", "xvmovdp", "xvcpsgndp".
 2008-08-02 04:38:51 +00:00
Pedro Alves
20fd6e2eb1 Missed ChangeLog entry for last change. 
* Makefile.am ($(srcdir)/ia64-asmtab.c): Remove line continuation.
	* Makefile.in: Regenerate.
 2008-08-01 16:53:56 +00:00
Pedro Alves
e316cf6e3e * Makefile.am ($(srcdir)/ia64-asmtab.c): Remove line continuation. 
* Makefile.in: Regenerate.
 2008-08-01 14:35:06 +00:00
H.J. Lu
a656ed5bea binutils/ 
2008-08-01  H.J. Lu  <hongjiu.lu@intel.com>

	* dwarf.c (dwarf_regnames_i386): Remove AVX registers.
	(dwarf_regnames_x86_64): Likewise.

gas/testsuite/

2008-08-01  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/cfi/cfi-i386.s: Remove tests for AVX register maps.
	* gas/cfi/cfi-x86_64.s: Likewise.

	* gas/cfi/cfi-i386.d: Updated.
	* gas/cfi/cfi-x86_64.d: Likewise.

opcodes/

2008-08-01  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-reg.tbl: Use Dw2Inval on AVX registers.
	* i386-tbl.h: Regenerated.
 2008-08-01 14:21:30 +00:00
Alan Modra
081ba1b3c0 include/opcode/ 
* ppc.h (PPC_OPCODE_405): Define.
	(PPC_OPERAND_FSL, PPC_OPERAND_FCR, PPC_OPERAND_UDI): Define.
gas/
	* config/tc-ppc.c (parse_cpu): Separate handling of -m403/405.
	(md_show_usage): Likewise.
opcodes/
	* ppc-dis.c (print_insn_powerpc): Disassemble FSL/FCR/UDI fields.
	* ppc-opc.c (powerpc_operands): Add Xilinx APU related operands.
	(insert_sprg, PPC405): Use PPC_OPCODE_405.
	(powerpc_opcodes): Add Xilinx APU related opcodes.
 2008-07-30 06:29:22 +00:00
Alan Modra
0af1713e7c Silence gcc printf warnings 2008-07-30 04:34:58 +00:00
Richard Sandiford
30c0909079 include/elf/ 
* mips.h (ELF_ST_IS_MIPS16, ELF_ST_SET_MIPS16): New macros.

bfd/
	* elfxx-mips.c (mips_elf_check_mips16_stubs): Use ELF_ST_IS_MIPS16.
	(mips_elf_calculate_relocation): Likewise.
	(_bfd_mips_elf_add_symbol_hook): Likewise.
	(_bfd_mips_elf_finish_dynamic_symbol): Likewise.
	(_bfd_mips_vxworks_finish_dynamic_symbol): Likewise.

opcodes/
	* mips-dis.c (_print_insn_mips): Use ELF_ST_IS_MIPS16.

gas/
	* config/tc-mips.c (mips16_mark_labels): Use ELF_ST_SET_MIPS16.
	(mips_fix_adjustable): Likewise.
	(mips_frob_file_after_relocs): Likewise.

gas/testsuite/
	* gas/mips/mips16-vis-1.d, gas/mips/mips16-vis-1.s: New tests.
	* gas/mips/mips.exp: Run them.
 2008-07-10 19:05:29 +00:00
Adam Nemet
c27e721e3e * mips-opc.c (CP): New macro. 
(mips_builtin_opcodes): Mark c0, c2 and c3 as CP.  Add Octeon to the
	membership of di, dmfc0, dmtc0, ei, mfc0 and mtc0.  Add dmfc2 and
	dmtc2 Octeon instructions.
 2008-07-07 19:11:15 +00:00
Stan Shebs
bd2e25575c 2008-07-07 Stan Shebs <stan@codesourcery.com> 
* dis-init.c (init_disassemble_info): Init endian_code field.
	    * arm-dis.c (print_insn): Disassemble code according to
	    setting of endian_code.
	    (print_insn_big_arm): Detect when BE8 extension flag has been set.
 2008-07-07 18:35:24 +00:00
Richard Sandiford
6ba2a41553 bfd/ 
* syms.c (BSF_SYNTHETIC): New flag.
	* elf.c (_bfd_elf_get_synthetic_symtab): Set it.
	* elf32-ppc.c (ppc_elf_get_synthetic_symtab): Likewise.
	* elf64-ppc.c (ppc64_elf_get_synthetic_symtab): Likewise.
	* bfd-in.h (bfd_asymbol_flavour): Return bfd_target_unknown_flavour
	for synthetic symbols.
	* bfd-in2.h: Regenerate.

opcodes/
	* mips-dis.c (_print_insn_mips): Use bfd_asymbol_flavour to check
	for ELF symbols.
 2008-06-30 20:51:58 +00:00
Peter Bergner
c8187e1509 gas/ 
* config/tc-ppc.c (parse_cpu): Handle -m464.
	(md_show_usage): Likewise.

opcodes/
	* ppc-dis.c (powerpc_init_dialect): Handle -M464.
	(print_ppc_disassembler_options): Likewise.
	* ppc-opc.c (PPC464): Define.
	(powerpc_opcodes): Add mfdcrux and mtdcrux.
 2008-06-25 16:49:03 +00:00
Ralf Wildenhues
7a283e077b * configure: Regenerate. 
config/
	* override.m4: Use m4_version_prereq throughout.
	(_AC_ARG_VAR_VALIDATE, AC_MSG_FAILURE): Backport from git
	Autoconf: output pwd along with fatal errors, so the right
	config.log file is hinted at more prominently.
	(PARSE_ARGS): Push setting of ac_pwd in this diversion.
	(_GCC_AUTOCONF_VERSION): New, define to 2.59 if not defined.
	(_GCC_AUTOCONF_VERSION_CHECK): New macro, require use of Autoconf
	version _GCC_AUTOCONF_VERSION throughout the tree.
	(m4_wrap): New override, fix for Posix semantics of m4wrap.

binutils/
	* configure: Regenerate.

opcodes/
	* configure: Regenerate.

bfd/
	* configure: Regenerate.

gas/
	* configure: Regenerate.

gprof/
	* configure: Regenerate.

ld/
	* config.in: Regenerate.
	* configure: Regenerate.
 2008-06-17 23:14:44 +00:00
Peter Bergner
fa452fa683 include/opcode/ 
* ppc.h (ppc_cpu_t): New typedef.
	(struct powerpc_opcode <flags>): Use it.
	(struct powerpc_operand <insert, extract>): Likewise.
	(struct powerpc_macro <flags>): Likewise.

gas/
	* config/tc-ppc.c (ppc_cpu): Use ppc_cpu_t typedef.
	(ppc_insert_operand): Likewise.
	(ppc_machine): Likewise.
	* config/tc-ppc.h: #include "opcode/ppc.h"
	(struct _ppc_fix_extra <ppc_cpu>): Use ppc_cpu_t typedef.
	(ppc_cpu): Update extern decl.

opcodes/
	* ppc-dis.c (print_insn_powerpc): Update prototye to use new
	ppc_cpu_t typedef.
	(struct dis_private): New.
	(POWERPC_DIALECT): New define.
	(powerpc_dialect): Renamed to...
	(powerpc_init_dialect): This.  Update to use ppc_cpu_t and
	struct dis_private.
	(print_insn_big_powerpc): Update for using structure in
	info->private_data.
	(print_insn_little_powerpc): Likewise.
	(operand_value_powerpc): Change type of dialect param to ppc_cpu_t.
	(skip_optional_operands): Likewise.
	(print_insn_powerpc): Likewise.  Remove initialization of dialect.
	* ppc-opc.c (extract_bat, extract_bba, extract_bdm, extract_bdp,
	extract_bo, extract_boe, extract_fxm, extract_mb6, extract_mbe,
	extract_nb, extract_nsi, extract_rbs, extract_sh6, extract_spr,
	extract_sprg, extract_tbr insert_bat, insert_bba, insert_bdm,
	insert_bdp, insert_bo, insert_boe, insert_fxm, insert_mb6, insert_mbe,
	insert_nsi, insert_ral, insert_ram, insert_raq, insert_ras, insert_rbs,
	insert_sh6, insert_spr, insert_sprg, insert_tbr): Change the dialect
	param to be of type ppc_cpu_t.  Update prototype.
 2008-06-13 20:16:00 +00:00
Nick Clifton
dd3cbb7ef7 * mips.h: Document new field descriptors +Q. 
(OP_SH_SEQI, OP_MASK_SEQI): New bit mask and shift count for SEQI.

opcodes/

        * mips-dis.c (print_insn_args): Handle field descriptor +Q.
        * mips-opc.c (mips_builtin_opcodes): Add Octeon instructions seq,
        seqi, sne and snei.

gas/

        * config/tc-mips.c (validate_mips_insn): Handle field descriptor +Q.
        (mips_ip): Likewise.
        (macro_build): Likewise.
        (CPU_HAS_SEQ): New macro.
        (macro2) <M_SEQ_I, M_SNE_I>: Use it.  Emit seq/sne and seqi/snei.

gas/testsuite/

        * gas/mips/octeon.s, gas/mips/octeon.d: Add tests for seq* and sne*.
        * gas/mips/octeon-ill.s, gas/mips/octeon-ill.s: Add tests for seqi
        and snei.
 2008-06-12 21:44:54 +00:00
Nick Clifton
bb35fb24c1 include/opcode/ 
* mips.h: Document new field descriptors +x, +X, +p, +P, +s, +S.
        Update comment before MIPS16 field descriptors to mention MIPS16.
        (OP_SH_BBITIND, OP_MASK_BBITIND): New bit mask and shift count for
        BBIT.
        (OP_SH_CINSPOS, OP_MASK_CINSPOS, OP_SH_CINSLM1, OP_MASK_CINSLM1):
        New bit masks and shift counts for cins and exts.

gas/

        * config/tc-mips.c (validate_mips_insn): Handle field descriptors
        +x, +X, +p, +P, +s, +S.
        (mips_ip): Likewise.

opcodes/

        * mips-dis.c (print_insn_args): Handle field descriptors +x, +p,
        +s, +S.
        * mips-opc.c (mips_builtin_opcodes): Add Octeon instructions
        baddu, bbit*, cins*, dmul, pop, dpop, exts*, mtm*, mtp*, syncs,
        syncw, syncws, vm3mulu, vm0 and vmulu.

gas/testsuite/

        * gas/mips/octeon.s, gas/mips/octeon.d: Add tests for baddu,
        bbit*, cins*, dmul, pop, dpop, exts*, mtm*, mtp*, syncs, syncw,
        syncws, vm3mulu, vm0 and vmulu.
        * gas/mips/octeon-ill.s, gas/mips/octeon-ill.s: New test.
        * gas/mips/mips.exp: Run it.  Run octeon test with
        run_dump_test_arches.
 2008-06-12 16:14:52 +00:00
H.J. Lu
a5dabbb023 gas/testsuite/ 
2008-05-30  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/x86-64-avx.s: Add tests for vmovd on 64bit operands.

	* gas/i386/x86-64-sse2avx.s: Add tests for movd on 64bit
	operands.

	* gas/testsuite/gas/i386/x86-64-avx.d: Updated.
	* gas/testsuite/gas/i386/x86-64-avx-intel.d: Likewise.
	* gas/testsuite/gas/i386/x86-64-sse2avx.d: Likewise.

opcodes/

2008-05-30  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.tbl: Add vmovd with 64bit operand.
	* i386-tbl.h: Regenerated.
 2008-05-30 19:49:18 +00:00
Martin Schwidefsky
725a9891bc 2008-05-27 Martin Schwidefsky <schwidefsky@de.ibm.com> 
* s390-opc.c (INSTR_RRF_R0RR): Fix RRF_R0RR operand format.

2008-05-27  Martin Schwidefsky  <schwidefsky@de.ibm.com>

	* gas/s390/zarch-z990.d (idte): Fix operand format.
 2008-05-27 12:52:44 +00:00
H.J. Lu
cbc80391d0 gas/testsuite/ 
2008-05-22  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/sse-noavx.s: Add tests for cvtpd2pi, cvtpi2pd and
	cvttpd2pi.
	* gas/i386/x86-64-sse-noavx.s: Likewise.

	* gas/i386/sse-noavx.d: Updated.
	* gas/i386/x86-64-sse-noavx.d: Likewise.

opcodes/

2008-05-22  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.tbl: Add NoAVX to cvtpd2pi, cvtpi2pd and cvttpd2pi.
	* i386-tbl.h: Regenerated.
 2008-05-23 00:18:52 +00:00
H.J. Lu
116615c5f7 gas/testsuite/ 
2008-05-22  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/6517
	* gas/i386/avx.s: Add tests for unspecified memory operand
	size in Intel syntax.
	* gas/i386/x86-64-avx.s: Likewise.

	* gas/i386/simd.s: Add tests for cvtsi2ss and cvtsi2sd with
	unspecified memory operand size in Intel syntax.

	* gas/i386/avx.d: Updated.
	* gas/i386/avx-intel.d: Likewise.
	* gas/i386/simd.d: Likewise.
	* gas/i386/simd-intel.d: Likewise.
	* gas/i386/simd-suffix.d: Likewise.
	* gas/i386/x86-64-avx.d: Likewise.
	* gas/i386/x86-64-avx-intel.d: Likewise.

opcodes/

2008-05-22  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/6517
	* i386-opc.tbl: Break cvtsi2ss/cvtsi2sd/vcvtsi2sd/vcvtsi2ss
	into 32bit and 64bit.  Remove Reg64|Qword and add
	IgnoreSize|No_qSuf on 32bit version.
	* i386-tbl.h: Regenerated.
 2008-05-22 20:52:54 +00:00
H.J. Lu
d9479f2d8d gas/testsuite/ 
2008-05-21  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/sse-noavx.s: Add tests for movdq2q and movq2dq.
	* gas/i386/x86-64-sse-noavx.s: Likewise.

	* gas/i386/sse-noavx.d: Updated.
	* gas/i386/x86-64-sse-noavx.d: Likewise.

opcodes/

2008-05-21  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.tbl: Add NoAVX to movdq2q and movq2dq.
	* i386-tbl.h: Regenerated.
 2008-05-21 21:40:57 +00:00
Nick Clifton
3ce6fddb77 * cr16-dis.c (build_mask): Adjust the mask for 32-bit bcond. 2008-05-21 07:50:55 +00:00
Alan Modra
8944f3c277 update dependencies 2008-05-14 06:45:42 +00:00
H.J. Lu
f1f8f695c0 gas/ 
2008-05-02  H.J. Lu  <hongjiu.lu@intel.com>

	* NEWS: Mention XSAVE, EPT and MOVBE.

	* config/tc-i386.c (cpu_arch): Add .movbe and .ept.
	(md_show_usage): Add .movbe and .ept.

	* doc/c-i386.texi: Add movbe and ept to -march=.  Document
	.movbe and .ept.

gas/testsuite/

2008-05-02  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/i386.exp: Run movbe, movbe-intel, inval-movbe, ept,
	ept-intel, inval-ept, x86-64-movbe, x86-64-movbe-intel,
	x86-64-inval-movbe.  x86-64-ept, x86-64-ept-intel and
	x86-64-inval-ept.

	* gas/i386/arch-10.s: Add movbe and invept.
	* gas/i386/x86-64-arch-2.s: Likewise.

	* gas/i386/ept.d: New file
	* gas/i386/ept-intel.d: Likewise.
	* gas/i386/ept.s: Likewise.
	* gas/i386/inval-ept.l: Likewise.
	* gas/i386/inval-ept.s: Likewise.
	* gas/i386/inval-movbe.l: Likewise.
	* gas/i386/inval-movbe.s: Likewise.
	* gas/i386/movbe.d: Likewise.
	* gas/i386/movbe-intel.d: Likewise.
	* gas/i386/movbe.s: Likewise.
	* gas/i386/x86-64-inval-ept.l: Likewise.
	* gas/i386/x86-64-inval-ept.s: Likewise.
	* gas/i386/x86-64-inval-movbe.l: Likewise.
	* gas/i386/x86-64-inval-movbe.s: Likewise.
	* gas/i386/x86-64-ept.d: Likewise.
	* gas/i386/x86-64-ept-intel.d: Likewise.
	* gas/i386/x86-64-ept.s: Likewise.
	* gas/i386/x86-64-movbe.d: Likewise.
	* gas/i386/x86-64-movbe-intel.d: Likewise.
	* gas/i386/x86-64-movbe.s: Likewise.

	* gas/i386/arch-10.d: Updated.
	* gas/i386/arch-10-1.l: Likewise.
	* gas/i386/arch-10-2.l: Likewise.
	* gas/i386/arch-10-3.l: Likewise.
	* gas/i386/arch-10-4.l: Likewise.
	* gas/i386/x86-64-arch-2.d: Likewise.

opcodes/

2008-05-02  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (MOVBE_Fixup): New.
	(Mo): Likewise.
	(PREFIX_0F3880): Likewise.
	(PREFIX_0F3881): Likewise.
	(PREFIX_0F38F0): Updated.
	(prefix_table): Add PREFIX_0F3880 and PREFIX_0F3881.  Update
	PREFIX_0F38F0 and PREFIX_0F38F1 for movbe.
	(three_byte_table): Use PREFIX_0F3880 and PREFIX_0F3881.

	* i386-gen.c (cpu_flag_init): Add CPU_MOVBE_FLAGS and
	CPU_EPT_FLAGS.
	(cpu_flags): Add CpuMovbe and CpuEPT.

	* i386-opc.h (CpuMovbe): New.
	(CpuEPT): Likewise.
	(CpuLM): Updated.
	(i386_cpu_flags): Add cpumovbe and cpuept.

	* i386-opc.tbl: Add entries for movbe and EPT instructions.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.
 2008-05-02 16:53:40 +00:00
Adam Nemet
89aa3097c2 * mips-opc.c (mips_builtin_opcodes): Set field `match' to 0 for 
the two drem and the two dremu macros.
 2008-04-29 23:27:01 +00:00
Adam Nemet
39c5c16818 * mips-opc.c (mips_builtin_opcodes): Mark prefx and c1 
instructions FP_S.  Mark l.s, li.s, lwc1, swc1, s.s, trunc.w.s and
	cop1 macros INSN2_M_FP_S.  Mark l.d, li.d, ldc1 and sdc1 macros
	INSN2_M_FP_D.  Mark trunc.w.d macro INSN2_M_FP_S and INSN2_M_FP_D.
 2008-04-28 17:03:58 +00:00
David S. Miller
f04d18b76a gas/ 
* config/tc-sparc.c: Accept 'softint_clear' and 'softint_set'
	%asr aliases.

	* doc/c-sparc.texi: Consistently refer to architecture 'versions',
	rather than occaisionally 'levels'.  Consistently refer to Sun's
	UNIX variant as SunOS, every version of Solaris is also SunOS.
	Document new 'softint_clear' and 'softint_set' aliases.  Clarify
	which architecture versions support '%dcr', '%cq', and '%gl'. Add
	section on 32-bit/64-bit opcode translations.

opcodes/

	* sparc-dis.c: Emit %stick instead of %sys_tick, and %stick_cmpr
	instead of %sys_tick_cmpr, as suggested in architecture manuals.
 2008-04-25 19:58:03 +00:00
H.J. Lu
6194aaaba7 bfd/ 
2008-04-23  Paolo Bonzini  <bonzini@gnu.org>

	* aclocal.m4: Regenerate.
	* configure: Regenerate.

binutils/

2008-04-23  Paolo Bonzini  <bonzini@gnu.org>

	* aclocal.m4: Regenerate.
	* configure: Regenerate.

gas/

2008-04-23  Paolo Bonzini  <bonzini@gnu.org>

	* aclocal.m4: Regenerate.
	* configure: Regenerate.

gold/

2008-04-23  Paolo Bonzini  <bonzini@gnu.org>

	* aclocal.m4: Regenerate.
	* configure: Regenerate.

gprof/

2008-04-23  Paolo Bonzini  <bonzini@gnu.org>

	* aclocal.m4: Regenerate.
	* configure: Regenerate.

ld/

2008-04-23  Paolo Bonzini  <bonzini@gnu.org>

	* aclocal.m4: Regenerate.
	* configure: Regenerate.

opcodes/

2008-04-23  Paolo Bonzini  <bonzini@gnu.org>

	* aclocal.m4: Regenerate.
	* configure: Regenerate.
 2008-04-23 16:11:47 +00:00
David S. Miller
1a6b486f73 opcodes/ 
* sparc-opc.c (asi_table): Add UltraSPARC and Niagara
	extended values.
	(prefetch_table): Add missing values.

gas/

	* config/tc-sparc.c (v9a_asr_table): Add missing
	'stick' and 'stick_cmpr', and document ordering rules
	of table.
	(tc_gen_reloc): Accept BFD_RELOC_SPARC_PC22 and
	BFD_RELOC_SPARC_PC10.
	* doc/c-sparc.texi: New section on Sparc constants.
	Add documentation for %stick and %stick_cmpr.

gas/testsuite/

	* gas/sparc/pc2210.d: New file.
	* gas/sparc/pc2210.d: Likewise.
	* gas/sparc/sparc.exp: Run new %pc22/%pc10 relocation test.
 2008-04-23 07:49:33 +00:00
H.J. Lu
81f8a9131a gas/ 
2008-04-22  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (md_assemble): Don't check SSE instructions
	if noavx is 0.

opcodes/

2008-04-22  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (opcode_modifiers): Add NoAVX.

	* i386-opc.h (NoAVX): New.
	(OldGcc): Updated.
	(i386_opcode_modifier): Add noavx.

	* i386-opc.tbl: Add NoAVX to SSE, SSE2, SSE3 and SSSE3
	instructions which don't have AVX equivalent.
	* i386-tbl.h: Regenerated.
 2008-04-22 22:27:13 +00:00
H.J. Lu
dae39accc2 gas/ 
2008-04-18  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (build_modrm_byte): Swap REG and NDS for
	FMA.

gas/testsuite/

2008-04-18  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/arch-10.d: Updated.
	* gas/i386/avx.d: Likewise.
	* gas/i386/avx-intel.d: Likewise.
	* gas/i386/x86-64-arch-2.d: Likewise.
	* gas/i386/x86-64-avx.d: Likewise.
	* gas/i386/x86-64-avx-intel.d: Likewise.

opcodes/

2008-04-18  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (OP_VEX_FMA): New.
	(OP_EX_VexImmW): Likewise.
	(VexFMA): Likewise.
	(Vex128FMA): Likewise.
	(EXVexImmW): Likewise.
	(get_vex_imm8): Likewise.
	(OP_EX_VexReg): Likewise.
	(vex_i4_done): Renamed to ...
	(vex_w_done): This.
	(prefix_table): Replace EXVexW with EXVexImmW on vpermil2ps
	and vpermil2pd.  Replace Vex/Vex128 with VexFMA/Vex128FMA on
	FMA instructions.
	(print_insn): Updated.
	(OP_EX_VexW): Rewrite to swap register in VEX with EX.
	(OP_REG_VexI4): Check invalid high registers.
 2008-04-18 13:10:32 +00:00
Dwarakanath Rajagopal
ce886ab1f8 <opcode changes> 
2008-04-16  Dwarakanath Rajagopal  <dwarak.rajagopal@amd.com>
            Michael Meissner  <michael.meissner@amd.com>

        * i386-opc.tbl: Fix protX to allow memory in the middle operand.
        * i386-tbl.h: Regenerate from i386-opc.tbl.

<gas/testsuite changes>
2008-04-16  Dwarakanath Rajagopal  <dwarak.rajagopal@amd.com>
            Michael Meissner  <michael.meissner@amd.com>

        * gas/i386/x86-64-sse5.s: Add protX tests to allow memory in the middle
        operand.
        * gas/i386/x86-64-sse5.d: Likewise.
 2008-04-16 15:31:33 +00:00
Alan Modra
19a6653ce8 ppc e500mc support 2008-04-14 11:01:38 +00:00
Andreas Krebbel
112b7c5071 2008-04-10 Andreas Krebbel <krebbel1@de.ibm.com> 
* s390-dis.c (init_disasm): Evaluate disassembler_options.
	(print_s390_disassembler_options): New function.
	* disassemble.c (disassembler_usage): Invoke
	print_s390_disassembler_options.

2008-04-10  Andreas Krebbel  <krebbel1@de.ibm.com>

	* dis-asm.h (print_s390_disassembler_options):
	Prototype added.
 2008-04-10 13:36:43 +00:00
Andreas Krebbel
7ff4264847 2008-04-10 Andreas Krebbel <krebbel1@de.ibm.com> 
* s390-mkopc.c (insertExpandedMnemonic): Expand string sizes
	of local variables used for mnemonic parsing: prefix, suffix and
	number.
 2008-04-10 13:05:07 +00:00
Andreas Krebbel
45a5551e74 2008-04-10 Andreas Krebbel <krebbel1@de.ibm.com> 
* s390-mkopc.c (s390_cond_ext_format): Add back the mnemonic
	extensions for conditional jumps (o, p, m, nz, z, nm, np, no).
	(s390_crb_extensions): New extensions table.
	(insertExpandedMnemonic): Handle '$' tag.
	* s390-opc.txt: Remove conditional jump variants which can now
	be expanded automatically.
	Replace '*' tag with '$' in the compare and branch instructions.

2008-04-10  Andreas Krebbel  <krebbel1@de.ibm.com>

	* gas/s390/zarch-z10.d: Map the compare and branch variants
	with odd condition code mask to version with an even mask.
 2008-04-10 08:59:46 +00:00
H.J. Lu
06c8514ace 2008-04-07 H.J. Lu <hongjiu.lu@intel.com> 
* i386-dis.c (PREFIX_VEX_38XX): Add a tab.
	(PREFIX_VEX_3AXX): Likewis.
 2008-04-07 21:29:50 +00:00
H.J. Lu
b122c2853a 2008-04-07 H.J. Lu <hongjiu.lu@intel.com> 
* i386-opc.tbl: Remove 4 extra blank lines.
 2008-04-07 17:35:12 +00:00
H.J. Lu
594ab6a333 gas/ 
2008-04-04  H.J. Lu  <hongjiu.lu@intel.com>

	* NEWS: Mention XSAVE.  Change CLMUL to PCLMUL.

	* config/tc-i386.c (cpu_arch): Add .pclmul.
	(md_show_usage): Replace clmul with pclmul.
	* doc/c-i386.texi: Likewise.

gas/testsuite/

2008-04-04  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/arch-10-1.l: Replace CLMUL with PCLMUL.
	* gas/i386/arch-10-2.l: Likewise.
	* gas/i386/arch-10-3.l: Likewise.
	* gas/i386/arch-10-4.l: Likewise.
	* gas/i386/arch-10.s: Likewise.
	* gas/i386/clmul-intel.d: Likewise.
	* gas/i386/clmul.d: Likewise.
	* gas/i386/clmul.s: Likewise.
	* gas/i386/x86-64-arch-2.s: Likewise.
	* gas/i386/x86-64-clmul-intel.d: Likewise.
	* gas/i386/x86-64-clmul.d: Likewise.
	* gas/i386/x86-64-clmul.s: Likewise.

	* gas/i386/arch-10.d: Replace clmul with pclmul.
	* gas/i386/x86-64-arch-2.d: Likewise.

opcodes/

2008-04-04  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flag_init): Replace CPU_CLMUL_FLAGS/CpuCLMUL
	with CPU_PCLMUL_FLAGS/CpuPCLMUL.
	(cpu_flags): Replace CpuCLMUL with CpuPCLMUL.
	* i386-opc.tbl: Likewise.

	* i386-opc.h (CpuCLMUL): Renamed to ...
	(CpuPCLMUL): This.
	(CpuFMA): Updated.
	(i386_cpu_flags): Replace cpuclmul with cpupclmul.

	* i386-init.h: Regenerated.
 2008-04-04 16:34:23 +00:00
H.J. Lu
c0f3af977b binutils/ 
2008-04-03  H.J. Lu  <hongjiu.lu@intel.com>

	* dwarf.c (dwarf_regnames_i386): Add AVX registers.
	(dwarf_regnames_x86_64): Likewise.

gas/

2008-04-03  H.J. Lu  <hongjiu.lu@intel.com>

	* NEWS: Mention AES, CLMUL, AVX/FMA and -msse2avx.

	* doc/c-i386.texi: Add avx, aes, clmul and fma to -march=.
	Document -msse2avx, .avx, .aes, .clmul and .fma.

	* config/tc-i386.c (YMMWORD_MNEM_SUFFIX): New.
	(vex_prefix): Likewise.
	(sse2avx): Likewise.
	(CPU_FLAGS_ARCH_MATCH): Likewise.
	(CPU_FLAGS_64BIT_MATCH): Likewise.
	(CPU_FLAGS_32BIT_MATCH): Likewise.
	(CPU_FLAGS_PERFECT_MATCH): Likewise.
	(regymm): Likewise.
	(vex_imm4): Likewise.
	(fits_in_imm4): Likewise.
	(build_vex_prefix): Likewise.
	(VEX_check_operands): Likewise.
	(bad_implicit_operand): Likewise.
	(OPTION_MSSE2AVX): Likewise.
	(T_YMMWORD): Likewise.
	(_i386_insn): Add vex.
	(cpu_arch): Add .avx, .aes, .clmul and .fma.
	(cpu_flags_match): Changed to take a pointer to const template.
	Enable encoding SSE instructions with VEX prefix for -msse2avx.
	(match_mem_size): Also check ymmword.
	(operand_type_match): Clear ymmword.
	(md_begin): Allow '_' in mnemonic.
	(type_names): Add OPERAND_TYPE_VEX_IMM4.
	(process_immext): Update assert.
	(md_assemble): Don't call process_immext if sse2avx and immext
	are true.  Call build_vex_prefix if vex is true.
	(parse_insn): Updated for cpu_flags_match.
	(swap_operands): Handle 5 operands.
	(match_template): Handle 5 operands. Updated for cpu_flags_match.
	Check regymm.  Call VEX_check_operands. Handle YMMWORD_MNEM_SUFFIX.
	(process_suffix): Handle YMMWORD_MNEM_SUFFIX.
	(check_byte_reg): Check regymm.
	(process_operands): Duplicate the destination register for
	-msse2avx if needed.
	(build_modrm_byte): Updated for instructions with VEX encoding.
	(output_insn): Output VEX prefix if needed.
	(md_longopts): Add msse2avx.
	(md_parse_option): Handle OPTION_MSSE2AVX.
	(md_show_usage): Add avx, aes, clmul, fma and -msse2avx.
	(intel_e09): Support YMMWORD.
	(intel_e11): Likewise.
	(intel_get_token): Likewise.

gas/testsuite/

2008-04-03  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/i386.exp: Run aes, aes-intel, x86-64-aes,
	x86-64-aes-intel, avx, avx-intel, inval-avx, x86-64-avx,
	x86-64-avx-intel and x86-64-inval-avx.

	* gas/cfi/cfi-i386.s: Add tests for AVX register maps.
	* gas/cfi/cfi-x86_64.s: Likewise.

	* gas/i386/aes.d: New.
	* gas/i386/aes.s: Likewise.
	* gas/i386/aes-intel.d: Likewise.
	* gas/i386/avx.d: Likewise.
	* gas/i386/avx.s: Likewise.
	* gas/i386/avx-intel.d: Likewise.
	* gas/i386/clmul.d: Likewise.
	* gas/i386/clmul-intel.d: Likewise.
	* gas/i386/clmul.s: Likewise.
	* gas/i386/i386.exp: Likewise.
	* gas/i386/inval-avx.l: Likewise.
	* gas/i386/inval-avx.s: Likewise.
	* gas/i386/sse2avx.d: Likewise.
	* gas/i386/sse2avx.s: Likewise.
	* gas/i386/x86-64-aes.d: Likewise.
	* gas/i386/x86-64-aes.s: Likewise.
	* gas/i386/x86-64-aes-intel.d: Likewise.
	* gas/i386/x86-64-avx.d: Likewise.
	* gas/i386/x86-64-avx.s: Likewise.
	* gas/i386/x86-64-avx-intel.d: Likewise.
	* gas/i386/x86-64-clmul.d: Likewise.
	* gas/i386/x86-64-clmul-intel.d: Likewise.
	* gas/i386/x86-64-clmul.s: Likewise.
	* gas/i386/x86-64-inval-avx.l: Likewise.
	* gas/i386/x86-64-inval-avx.s: Likewise.
	* gas/i386/x86-64-sse2avx.d: Likewise.
	* gas/i386/x86-64-sse2avx.s: Likewise.

	* gas/i386/arch-10.s: Add tests for AVX, AES, CLMUL and FMA.
	* gas/i386/x86-64-arch-2.s: Likewise.

	* gas/i386/rexw.s: Add AVX tests.

	* gas/i386/x86-64-opcode-inval.s: Remove lds/les test.

	* gas/cfi/cfi-i386.d: Updated.
	* gas/cfi/cfi-x86_64.d: Likewise.
	* gas/i386/arch-10.d:  Likewise.
	* gas/i386/arch-10-1.l: Likewise.
	* gas/i386/arch-10-2.l: Likewise.
	* gas/i386/arch-10-3.l: Likewise.
	* gas/i386/arch-10-4.l: Likewise.
	* gas/i386/rexw.d: Likewise.
	* gas/i386/x86-64-arch-2.d: Likewise.
	* gas/i386/x86-64-opcode-inval.d: Likewise.
	* gas/i386/x86-64-opcode-inval-intel.d: Likewise.

include/opcode/

2008-04-03  H.J. Lu  <hongjiu.lu@intel.com>

	* i386.h (MAX_OPERANDS): Set to 5.
	(MAX_MNEM_SIZE): Changed to 20.

opcodes/

2008-04-03  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (OP_E_register): New.
	(OP_E_memory): Likewise.
	(OP_VEX): Likewise.
	(OP_EX_Vex): Likewise.
	(OP_EX_VexW): Likewise.
	(OP_XMM_Vex): Likewise.
	(OP_XMM_VexW): Likewise.
	(OP_REG_VexI4): Likewise.
	(PCLMUL_Fixup): Likewise.
	(VEXI4_Fixup): Likewise.
	(VZERO_Fixup): Likewise.
	(VCMP_Fixup): Likewise.
	(VPERMIL2_Fixup): Likewise.
	(rex_original): Likewise.
	(rex_ignored): Likewise.
	(Mxmm): Likewise.
	(XMM): Likewise.
	(EXxmm): Likewise.
	(EXxmmq): Likewise.
	(EXymmq): Likewise.
	(Vex): Likewise.
	(Vex128): Likewise.
	(Vex256): Likewise.
	(VexI4): Likewise.
	(EXdVex): Likewise.
	(EXqVex): Likewise.
	(EXVexW): Likewise.
	(EXdVexW): Likewise.
	(EXqVexW): Likewise.
	(XMVex): Likewise.
	(XMVexW): Likewise.
	(XMVexI4): Likewise.
	(PCLMUL): Likewise.
	(VZERO): Likewise.
	(VCMP): Likewise.
	(VPERMIL2): Likewise.
	(xmm_mode): Likewise.
	(xmmq_mode): Likewise.
	(ymmq_mode): Likewise.
	(vex_mode): Likewise.
	(vex128_mode): Likewise.
	(vex256_mode): Likewise.
	(USE_VEX_C4_TABLE): Likewise.
	(USE_VEX_C5_TABLE): Likewise.
	(USE_VEX_LEN_TABLE): Likewise.
	(VEX_C4_TABLE): Likewise.
	(VEX_C5_TABLE): Likewise.
	(VEX_LEN_TABLE): Likewise.
	(REG_VEX_XX): Likewise.
	(MOD_VEX_XXX): Likewise.
	(PREFIX_0F38DB..PREFIX_0F38DF): Likewise.
	(PREFIX_0F3A44): Likewise.
	(PREFIX_0F3ADF): Likewise.
	(PREFIX_VEX_XXX): Likewise.
	(VEX_OF): Likewise.
	(VEX_OF38): Likewise.
	(VEX_OF3A): Likewise.
	(VEX_LEN_XXX): Likewise.
	(vex): Likewise.
	(need_vex): Likewise.
	(need_vex_reg): Likewise.
	(vex_i4_done): Likewise.
	(vex_table): Likewise.
	(vex_len_table): Likewise.
	(OP_REG_VexI4): Likewise.
	(vex_cmp_op): Likewise.
	(pclmul_op): Likewise.
	(vpermil2_op): Likewise.
	(m_mode): Updated.
	(es_reg): Likewise.
	(PREFIX_0F38F0): Likewise.
	(PREFIX_0F3A60): Likewise.
	(reg_table): Add REG_VEX_71...REG_VEX_73 and REG_VEX_AE.
	(prefix_table): Add PREFIX_0F38DB..PREFIX_0F38DF, PREFIX_0F3ADF
	and PREFIX_VEX_XXX entries.
	(x86_64_table): Use VEX_C4_TABLE and VEX_C5_TABLE.
	(three_byte_table): Use PREFIX_0F38DB..PREFIX_0F38DF and
	PREFIX_0F3ADF.
	(mod_table): Use VEX_C4_TABLE, VEX_C5_TABLE and VEX_LEN_TABLE.
	Add MOD_VEX_XXX entries.
	(ckprefix): Initialize rex_original and rex_ignored.  Store the
	REX byte in rex_original.
	(get_valid_dis386): Handle the implicit prefix in VEX prefix
	bytes and USE_VEX_LEN_TABLE/USE_VEX_C4_TABLE/USE_VEX_C5_TABLE.
	(print_insn): Set need_vex/need_vex_reg/vex_i4_done to 0 before
	calling get_valid_dis386.  Use rex_original and rex_ignored when
	printing out REX.
	(putop): Handle "XY".
	(intel_operand_size): Handle VEX, xmm_mode, xmmq_mode and
	ymmq_mode.
	(OP_E_extended): Updated to use OP_E_register and
	OP_E_memory.
	(OP_XMM): Handle VEX.
	(OP_EX): Likewise.
	(XMM_Fixup): Likewise.
	(CMP_Fixup): Use ARRAY_SIZE.

	* i386-gen.c (cpu_flag_init): Add CpuAES, CPU_CLMUL_FLAGS,
	CPU_FMA_FLAGS and CPU_AVX_FLAGS.
	(operand_type_init): Add OPERAND_TYPE_REGYMM and
	OPERAND_TYPE_VEX_IMM4.
	(cpu_flags): Add CpuAVX, CpuAES, CpuCLMUL and CpuFMA.
	(opcode_modifiers): Add Implicit1stXmm0, Vex, Vex256, VexNDD,
	VexNDS, VexW0, VexW1, Vex0F, Vex0F38, Vex0F3A, Vex3Sources,
	VexImmExt and SSE2AVX.
	(operand_types): Add RegYMM, Ymmword and Vex_Imm4.

	* i386-opc.h (CpuAVX): New.
	(CpuAES): Likewise.
	(CpuCLMUL): Likewise.
	(CpuFMA): Likewise.
	(Vex): Likewise.
	(Vex256): Likewise.
	(VexNDS): Likewise.
	(VexNDD): Likewise.
	(VexW0): Likewise.
	(VexW1): Likewise.
	(Vex0F): Likewise.
	(Vex0F38): Likewise.
	(Vex0F3A): Likewise.
	(Vex3Sources): Likewise.
	(VexImmExt): Likewise.
	(SSE2AVX): Likewise.
	(RegYMM): Likewise.
	(Ymmword): Likewise.
	(Vex_Imm4): Likewise.
	(Implicit1stXmm0): Likewise.
	(CpuXsave): Updated.
	(CpuLM): Likewise.
	(ByteOkIntel): Likewise.
	(OldGcc): Likewise.
	(Control): Likewise.
	(Unspecified): Likewise.
	(OTMax): Likewise.
	(i386_cpu_flags): Add cpuavx, cpuaes, cpuclmul and cpufma.
	(i386_opcode_modifier): Add implicit1stxmm0, vex, vex256,
	vexnds, vexndd, vexw0, vexw1, vex0f, vex0f38, vex0f3a,
	vex3sources, veximmext and sse2avx.
	(i386_operand_type): Add regymm, ymmword and vex_imm4.

	* i386-opc.tbl: Add AES, CLMUL, AVX and FMA new instructions.

	* i386-reg.tbl: Add AVX registers, ymm0..ymm15.

	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.
 2008-04-03 14:03:21 +00:00
Bernd Schmidt
086134ec0e gas/testsuite/: 
From Robin Getz  <rgetz@blackfin.uclinux.org>
	* gas/bfin/arithmetic.d: Update to reflect spaces/capitalization in
	recent changes in opcodes/bfin-dis.c.
	gas/bfin/arithmetic.s: Likewise.
	gas/bfin/bit.d: Likewise.
	gas/bfin/bit2.d: Likewise.
	gas/bfin/control_code.d: Likewise.
	gas/bfin/control_code2.d: Likewise.
	gas/bfin/event.d: Likewise.
	gas/bfin/event2.d: Likewise.
	gas/bfin/flow.d: Likewise.
	gas/bfin/flow2.d: Likewise.
	gas/bfin/load.d: Likewise.
	gas/bfin/logical.d: Likewise.
	gas/bfin/logical2.d: Likewise.
	gas/bfin/move.d: Likewise.
	gas/bfin/move2.d: Likewise.
	gas/bfin/parallel.d: Likewise.
	gas/bfin/parallel2.d: Likewise.
	gas/bfin/parallel3.d: Likewise.
	gas/bfin/parallel4.d: Likewise.
	gas/bfin/shift.d: Likewise.
	gas/bfin/shift2.d: Likewise.
	gas/bfin/stack.d: Likewise.
	gas/bfin/stack2.d: Likewise.
	gas/bfin/store.d: Likewise.
	gas/bfin/vector.d: Likewise.
	gas/bfin/vector2.d: Likewise.
	gas/bfin/video.d: Likewise.
	gas/bfin/video2.d: Likewise.

opcodes/:
	* bfin-dis.c: (c_uimm4s4d, c_imm5d, c_imm7d, c_imm16d, c_uimm16s4d,
	c_imm32, c_huimm32e): Define.
	(constant_formats): Add flags for printing decimal, leading spaces, and
	exact symbols.
	(comment, parallel): Add global flags in all disassembly.
	(fmtconst): Take advantage of new flags, and print default in hex.
	(fmtconst_val): Likewise.
	(decode_macfunc): Be consistant with spaces, tabs, comments,
	capitalization in disassembly, fix minor coding style issues.
	(reg_names, amod0, amod1, amod0amod2, aligndir, get_allreg): Likewise.
	(decode_ProgCtrl_0, decode_PushPopMultiple_0, decode_CCflag_0,
	decode_CC2dreg_0, decode_CC2stat_0, decode_BRCC_0, decode_UJUMP_0,
	decode_REGMV_0, decode_ALU2op_0, decode_PTR2op_0, decode_LOGI2op_0,
	decode_COMP3op_0, decode_COMPI2opD_0, decode_COMPI2opP_0,
	decode_LDSTpmod_0, decode_dagMODim_0, decode_dagMODik_0,
	decode_dspLDST_0, decode_LDST_0, decode_LDSTiiFP_0, decode_LDSTii_0,
	decode_LoopSetup_0, decode_LDIMMhalf_0, decode_CALLa_0,
	decode_LDSTidxI_0, decode_linkage_0, decode_dsp32alu_0,
	decode_dsp32shift_0, decode_dsp32shiftimm_0, decode_pseudodbg_assert_0,
	_print_insn_bfin, print_insn_bfin): Likewise.
 2008-03-26 16:48:32 +00:00
Bernd Schmidt
ee171c8f94 gas/ 
* config/bfin-parse.y (check_macfunc_option): Allow (IU)
	option for multiply and multiply-accumulate to data register
	instruction.
	(check_macfuncs): Don't check if accumulator matches the data register
	here.
	(assign_macfunc): Check if accumulator matches the
	data register in each rule that moves to the data
	register.

gas/testsuite/
	* gas/bfin/arithmetic.s, gas/bfin/arithmetic.d: Add check
	for IU option.
	* gas/bfin/expected_errors.l, gas/bfin/expected_errors.s:
	Add check for mismatch of accumulator and data register.

opcodes/
	* bfin-dis.c (decode_dsp32mac_0): Decode (IU) option for
	multiply and multiply-accumulate to data register instruction.
 2008-03-26 16:21:10 +00:00
Bernd Schmidt
b21c9cb440 opcodes: 
From  Robin Getz  <robin.getz@analog.com>
	* bfin-dis.c (bu32): Typedef.
	(enum const_forms_t): Add c_uimm32 and c_huimm32.
	(constant_formats[]): Add uimm32 and huimm16.
	(fmtconst_val): New.
	(uimm32): Define.
	(huimm32): Define.
	(imm16_val): Define.
	(luimm16_val): Define.
	(struct saved_state): Define.
	(GREG, DPREG, DREG, PREG, SPREG, FPREG, IREG, MREG, BREG, LREG,
	A0XREG, A0WREG, A1XREG, A1WREG,CCREG, LC0REG, LT0REG, LB0REG,
	LC1REG, LT1REG, LB1REG, RETSREG, PCREG): Define.
	(get_allreg): New.
	(decode_LDIMMhalf_0): Print out the whole register value.

gas/testsuite:
	From Jie Zhang  <jie.zhang@analog.com>
	* gas/bfin/load.d: Update.
 2008-03-26 14:50:52 +00:00
Andreas Krebbel
5746fb46c8 2008-03-19 Andreas Krebbel <krebbel1@de.ibm.com> 
* opcodes/s390-mkopc.c (s390_opcode_cpu_val): S390_OPCODE_Z10 added.
	(s390_cond_extensions): Reduced extensions to the compare related.
	(main): z10 cpu type option added.
	(expandConditionalJump): Renamed to ...
	(insertExpandedMnemonic): ... this.

	* opcodes/s390-opc.c: Re-group the operand format makros.
	(INSTR_RIE_RRPU, INSTR_RIE_RRP0, INSTR_RIE_RUPI,
	INSTR_RIE_R0PI, INSTR_RIE_RUPU, INSTR_RIE_R0PU, INSTR_RIE_R0IU,
	INSTR_RIE_R0I0, INSTR_RIE_R0UU, INSTR_RIE_R0U0,
	INSTR_RIE_RRUUU, INSTR_RIS_RURDI, INSTR_RIS_R0RDI, INSTR_RIS_RURDU,
	INSTR_RIS_R0RDU, INSTR_RRF_U0RR, INSTR_RRF_00RR, INSTR_RRS_RRRDU,
	INSTR_RRS_RRRD0, INSTR_RXY_URRD, INSTR_SIY_IRD, INSTR_SIL_RDI,
	INSTR_SIL_RDU): New instruction formats added.
	(MASK_RIE_RRPU, MASK_RIE_RRP0, MASK_RIE_RUPI, MASK_RIE_R0PI,
	MASK_RIE_RUPU, MASK_RIE_R0PU, MASK_RIE_R0IU, MASK_RIE_R0I0,
	MASK_RIE_R0UU, MASK_RIE_R0U0, MASK_RIE_RRUUU, MASK_RIS_RURDI,
	MASK_RIS_R0RDI, MASK_RIS_RURDU, MASK_RIS_R0RDU, MASK_RRF_U0RR,
	MASK_RRF_00RR, MASK_RRS_RRRDU, MASK_RRS_RRRD0, MASK_RXY_URRD,
	MASK_SIY_IRD, MASK_SIL_RDI, MASK_SIL_RDU): New instruction format
	masks added.
	(s390_opformats): New formats added "ris", "rrs", "sil".
	* opcodes/s390-opc.txt: Add the conditional jumps with the
	extensions removed from automatic expansion in s390-mkopc.c manually.
	(asi - trtre): Add new System z10 EC instructions.
	* include/opcode/s390.h (s390_opcode_cpu_val): S390_OPCODE_Z10 added.

2008-03-19  Andreas Krebbel  <krebbel1@de.ibm.com>

	* config/tc-s390.c (md_parse_option): z10 option added.

2008-03-19  Andreas Krebbel  <krebbel1@de.ibm.com>

	* gas/s390/zarch-z10.d: New file.
	* gas/s390/zarch-z10.s: New file.
	* gas/s390/s390.exp: Run the z10 testcases.
 2008-03-19 10:29:18 +00:00
Ralf Wildenhues
58c85be758 * configure.ac: m4_include config/proginstall.m4. 
* configure: Regenerate.
config/
        * proginstall.m4: New file, with fixed AC_PROG_INSTALL.
bfd/
        * aclocal.m4: Regenerate.
        * configure: Likewise.
        * Makefile.in: Likewise.
bfd/doc/
        * Makefile.in: Regenerate.
intl/
        * aclocal.m4: Regenerate.
        * configure: Likewise.
gas/
        * aclocal.m4: Regenerate.
        * configure: Likewise.
        * Makefile.in: Likewise.
        * doc/Makefile.in: Likewise.
ld/
        * aclocal.m4: Regenerate.
        * configure: Likewise.
        * Makefile.in: Likewise.
opcodes/
        * aclocal.m4: Regenerate.
        * configure: Likewise.
        * Makefile.in: Likewise.
binutils/
        * aclocal.m4: Regenerate.
        * configure: Likewise.
        * Makefile.in: Likewise.
        * doc/Makefile.in: Likewise.
gprof/
        * aclocal.m4: Regenerate.
        * configure: Likewise.
        * Makefile.in: Likewise.
 2008-03-17 22:17:33 +00:00
Alan Modra
50e7d84b42 bfd/ 
* Makefile.am: Run "make dep-am".
	* Makefile.in: Regenerate.
	* po/SRC-POTFILES.in: Regenerate.
bfd/doc/
	* Makefile.in: Regenerate.
binutils/
	* Makefile.am: Run "make dep-am".
	* Makefile.in: Regenerate.
	* doc/Makefile.in: Regenerate.
	* configure: Regenerate.
gas/
	* Makefile.am: Run "make dep-am".
	* Makefile.in: Regenerate.
	* configure: Regenerate.
gprof/
	* configure: Regenerate.
ld/
	* Makefile.am: Run "make dep-am".
	* Makefile.in: Regenerate.
	* configure: Regenerate.
opcodes/
	* Makefile.am: Run "make dep-am".
	* Makefile.in: Regenerate.
	* configure: Regenerate.
 2008-03-13 02:05:23 +00:00
Alan Modra
de866fccd8 * ppc-opc.c (powerpc_opcodes): Order and format. 2008-03-06 23:00:34 +00:00
Andreas Krebbel
98c3d90597 2008-03-06 Florian Krohm <fkrohm@us.ibm.com> 
* s390-opc.c (INSTR_RSL_R0RD): Fix operands.
	* s390-opc.txt (cmpsc): Duplicate entry removed.
	(dxr, sqdr, sqer, cxfbr, cdfbr, cefbr, lzer, lzdr, lzxr,
	cegbr, cdgbr, cxgbr, cegr, cdgr, cxgr, cxfr, cdfr, cefr, fixr, fidr,
	fier, cu42, cu41): Fix operand format.

2008-03-06  Andreas Krebbel  <krebbel1@de.ibm.com>

	* gas/s390/esa-g5.d (cdfbr, cdfr, cefbr, cefr, cxfbr, cxfr,
	dxr, fidr, fier, fixr, lzdr, lzer, lzxr, sqdr, sqer, tp): Fix
	operand format.
	* gas/s390/esa-g5.s: Likewise.
	* gas/s390/zarch-z900.d (cdgbr, cdgr, cegbr, cegr, cxgbr,
	cxgr): Likewise.
	* gas/s390/zarch-z900.s: Likewise.
	* gas/s390/zarch-z9-109.d (cu41, cu42): Remove mask operand.
	* gas/s390/zarch-z9-109.s: Likewise.
 2008-03-06 12:01:13 +00:00
H.J. Lu
28dbc07952 gas/testsuite/ 
2008-03-01  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/x86-64-branch.s: Add tests for 16-bit near indirect
	branches.

	* gas/i386/x86-64-inval.s: Remove tests for 16-bit near indirect
	branches.

	* gas/i386/x86-64-branch.d: Updated.
	* gas/i386/x86-64-inval.l: Likewise.

opcodes/

2008-03-01  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.tbl: Allow 16-bit near indirect branches for x86-64.
	* i386-tbl.h: Regenerated.
 2008-03-01 23:30:51 +00:00
H.J. Lu
849830bdfb gas/testsuite/ 
2008-02-23  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/jump.s: Add tests for far branches.
	* gas/i386/jump16.s: Likewise.

	* gas/i386/jump.d: Updated.
	* gas/i386/jump16.d: Likewise.
	* gas/i386/x86-64-inval.l: Likewise.

	* gas/i386/x86-64-inval.s: Add tests for 16-bit near indirect
	branches.

opcodes/

2008-02-23  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.tbl: Disallow 16-bit near indirect branches for
	x86-64.
	* i386-tbl.h: Regenerated.
 2008-02-23 17:29:17 +00:00
Jan Beulich
743ddb6b3d opcodes/ 
2008-02-21  Jan Beulich  <jbeulich@novell.com>

	* i386-opc.tbl: Allow Dword for far indirect call. Allow Dword
	and Fword for far indirect jmp. Allow Reg16 and Word for near
	indirect jmp on x86-64. Disallow Fword for lcall.
	* i386-tbl.h: Re-generate.
 2008-02-21 16:18:04 +00:00
Nick Clifton
796d53134a * cr16.h (cr16_num_optab): Declared. 
* cr16-opc.c  (cr16_num_optab): Defined
 2008-02-18 13:46:45 +00:00
H.J. Lu
65da13b5e0 gas/ 
2008-02-16  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (inoutportreg): New.
	(process_immext): New.
	(md_assemble): Use it.
	(update_imm): Use imm16 and imm32s.
	(i386_att_operand): Use inoutportreg.

opcodes/

2008-02-16  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c  (operand_type_init): Add OPERAND_TYPE_INOUTPORTREG.
	* i386-init.h: Regenerated.
 2008-02-16 16:16:48 +00:00
Nick Clifton
0e3361806e PR binutils/5524 
* configure.in (SHARED_LIBADD): Select the correct host specific
   file extension for shared libraries.
   * configure: Regenerate.
 2008-02-14 12:33:17 +00:00
Jan Beulich
b7240065b3 gas/ 
2008-02-13  Jan Beulich  <jbeulich@novell.com>

	* config/tc-i386.c (parse_real_register): Don't return 'FLAT'
	if not in Intel mode.
	(i386_intel_operand): Ignore segment overrides in immediate and
	offset operands.
	(intel_e11): Range-check i.mem_operands before use as array
	index. Filter out FLAT for uses other than as segment override.
	(intel_get_token): Remove broken promotion of "FLAT:" to mean
	"offset FLAT:".

gas/testsuite/
2008-02-13  Jan Beulich  <jbeulich@novell.com>

	* gas/i386/intelok.s: Replace invalid offset expression with
	valid ones.
	* gas/i386/x86_64.s: Likewise.

opcodes/
2008-02-13  Jan Beulich  <jbeulich@novell.com>

	* i386-opc.h (RegFlat): New.
	* i386-reg.tbl (flat): Add.
	* i386-tbl.h: Re-generate.
 2008-02-13 13:41:26 +00:00
Jan Beulich
34b772a651 gas/ 
2008-02-13  Jan Beulich  <jbeulich@novell.com>

	* config/tc-i386.c (intel_e09): Also special-case 'bound'.

gas/testsuite/
2008-02-13  Jan Beulich  <jbeulich@novell.com>

	* gas/i386/intelbad.s, gas/i386/intelok.s: Add 'bound' tests.
	* gas/i386/intelbad.l, gas/i386/intelok.l, gas/i386/intelok.e,
	gas/i386/opcode-intel.d: Adjust.

opcodes/
2008-02-13  Jan Beulich  <jbeulich@novell.com>

	* i386-dis.c (a_mode): New.
	(cond_jump_mode): Adjust.
	(Ma): Change to a_mode.
	(intel_operand_size): Handle a_mode.
	* i386-opc.tbl: Allow Dword and Qword for bound.
	* i386-tbl.h: Re-generate.
 2008-02-13 13:29:31 +00:00
Jan Beulich
a60de03c61 gas/ 
2008-02-13  Jan Beulich  <jbeulich@novell.com>

	* config/tc-i386.c (allow_pseudo_reg): New.
	(parse_real_register): Check for NULL just once. Allow all
	register table entries when allow_pseudo_reg is non-zero.
	Don't allow any registers without type when allow_pseudo_reg
	is zero.
	(tc_x86_regname_to_dw2regnum): Replace with ...
	(tc_x86_parse_to_dw2regnum): ... this.
	(tc_x86_frame_initial_instructions): Adjust for above change.
	* config/tc-i386.h (tc_regname_to_dw2regnum): Remove.
	(tc_parse_to_dw2regnum): New.
	(tc_x86_regname_to_dw2regnum): Replace with ...
	(tc_x86_parse_to_dw2regnum): ... this.
	* dw2gencfi.c (tc_parse_to_dw2regnum): New, broken out of ...
	(cfi_parse_reg): ... this. Use tc_parse_to_dw2regnum. Adjust
	error handling.

gas/testsuite/
2008-02-13  Jan Beulich  <jbeulich@novell.com>

	* gas/cfi/cfi-i386.s: Add code testing use of all registers.
	Fix a few comments.
	* gas/cfi/cfi-x86_64.s: Likewise.
	* gas/cfi/cfi-i386.d, gas/cfi/cfi-x86_64.d: Adjust.

opcodes/
2008-02-13  Jan Beulich  <jbeulich@novell.com>

	* i386-gen.c (process_i386_registers): Process new fields.
	* i386-opc.h (reg_entry): Shrink reg_flags and reg_num to
	unsigned char. Add dw2_regnum and Dw2Inval.
	* i386-reg.tbl: Provide initializers for dw2_regnum. Add pseudo
	register names.
	* i386-tbl.h: Re-generate.
 2008-02-13 10:14:40 +00:00
H.J. Lu
4b6bc8ebeb Correct last 2 ChangeLog entries. 2008-02-12 17:22:02 +00:00
H.J. Lu
f03fe4c110 gas/ 
2008-02-11  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (cpu_arch): Add .xsave.
	(md_show_usage): Add .xsave.

	* doc/c-i386.texi: Add xsave to -march=.

gas/testsuite/

2008-02-11  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/arch-10.s: Add xgetbv.

	* gas/i386/arch-10.d: Updated.
	* gas/i386/arch-10-1.l: Likewise.
	* gas/i386/arch-10-2.l: Likewise.
	* gas/i386/arch-10-3.l: Likewise.
	* gas/i386/arch-10-4.l: Likewise.
	* gas/i386/x86-64-arch-10.d: Likewise.

opcodes/

2008-02-11  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c  (cpu_flag_init): Add CPU_XSAVE_FLAGS.
	* i386-init.h: Updated.
 2008-02-12 05:35:36 +00:00
H.J. Lu
475a2301db gas/testsuite/ 
2002-02-11  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/i386.exp: Run xsave, xsave-intel, x86-64-xsave
	and x86-64-xsave-intel.

	* gas/i386/x86-64-xsave-intel.d: New file.
	* gas/i386/x86-64-xsave.d: Likewise.
	* gas/i386/x86-64-xsave.s: Likewise.
	* gas/i386/xsave-intel.d: Likewise.
	* gas/i386/xsave.d: Likewise.
	* gas/i386/xsave.s: Likewise.

opcodes/

2008-02-11  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flags): Add CpuXsave.

	* i386-opc.h (CpuXsave): New.
	(Cpu64): Updated.
	(i386_cpu_flags): Add cpuxsave.

	* i386-dis.c (MOD_0FAE_REG_4): New.
	(RM_0F01_REG_2): Likewise.
	(MOD_0FAE_REG_5): Updated.
	(RM_0F01_REG_3): Likewise.
	(reg_table): Use MOD_0FAE_REG_4.
	(mod_table): Use RM_0F01_REG_2.  Add MOD_0FAE_REG_4.  Updated
	for xrstor.
	(rm_table): Add RM_0F01_REG_2.

	* i386-opc.tbl: Add xsave, xrstor, xgetbv and xsetbv.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.
 2008-02-12 00:04:45 +00:00
Ben Elliston
041179fc63 Fix formatting of most recent entry. 2008-02-11 22:56:13 +00:00
Jan Beulich
595785c698 opcodes/ 
2008-02-11  Jan Beulich  <jbeulich@novell.com>
	* i386-opc.tbl: Remove Disp32S from CpuNo64 opcodes. Remove
	Disp16 from Cpu64 non-jump opcodes (including loop and j?cxz).
	* i386-tbl.h: Re-generate.
 2008-02-11 15:11:06 +00:00
H.J. Lu
bb8541b9c4 bfd/ 
2008-02-04  Kai Tietz  <kai.tietz@onevision.com>
	    H.J. Lu  <hongjiu.lu@intel.com>

	PR 5715
	* warning.m4: Enable -Wno-format by default when using gcc on
	mingw.
	* configure: Regenerated.

binutils/

2008-02-04  H.J. Lu  <hongjiu.lu@intel.com>

	PR 5715
	* configure: Regenerated.

gas/

2008-02-04  H.J. Lu  <hongjiu.lu@intel.com>

	PR 5715
	* configure: Regenerated.

ld/

2008-02-04  H.J. Lu  <hongjiu.lu@intel.com>

	PR 5715
	* configure: Regenerated.

opcodes/

2008-02-04  H.J. Lu  <hongjiu.lu@intel.com>

	PR 5715
	* configure: Regenerated.
 2008-02-04 19:43:51 +00:00
Adam Nemet
57b592a36d * mips-dis.c: Update copyright. 
(mips_arch_choices): Add Octeon.
	* mips-opc.c: Update copyright.
	(IOCT): New macro.
	(mips_builtin_opcodes): Add Octeon instruction synciobdma.
 2008-02-04 19:26:11 +00:00
Alan Modra
930bb4cfae * ppc-opc.c: Support optional L form mtmsr. 2008-01-29 08:24:43 +00:00
H.J. Lu
82c18208b8 gas/testsuite/ 
2008-01-24  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/x86-64-sib.s: Add tests for r12.

	* gas/i386/x86-64-sib-intel.d: Updated.
	* gas/i386/x86-64-sib.d: Likewise.

opcodes/

2008-01-24  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (OP_E_extended): Handle r12 like rsp.
 2008-01-24 15:11:35 +00:00
H.J. Lu
599121aa77 gas/ 
2008-01-23  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (md_show_usage): Replace tabs with spaces.

gas/testsuite/

2008-01-23  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/i386.exp : Run x86-64-arch-1 and x86-64-arch-10.

	* gas/i386/x86-64-arch-1.d: New.
	* gas/i386/x86-64-arch-1.s: Likewise.
	* gas/i386/x86-64-arch-10.d: Likewise.

opcodes/

2008-01-23  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS.
	* i386-init.h: Regenerated.
 2008-01-23 19:05:12 +00:00
Tristan Gingold
80098f5188 2008-01-23 Tristan Gingold <gingold@adacore.com> 
* ia64-dis.c (print_insn_ia64): Display symbolic name of ar.fcr,
        ar.eflag, ar.csd, ar.ssd, ar.cflg, ar.fsr, ar.fir and ar.fdr.
 2008-01-23 08:53:44 +00:00
H.J. Lu
115c7c25fe gas/ 
2008-01-22  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (i386_target_format): Remove cpummx2.

gas/testsuite/

2008-01-22  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/arch-10.d: New.
	* gas/i386/arch-11.s: Likewise.
	* gas/i386/arch-12.d: Likewise.
	* gas/i386/arch-12.s: Likewise.

	* gas/i386/i386.exp: Run arch-11 and arch-12.

opcodes/

2008-01-22  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flag_init): Remove CpuMMX2.
	(cpu_flags): Likewise.

	* i386-opc.h (CpuMMX2): Removed.
	(CpuSSE): Updated.

	* i386-opc.tbl: Replace CpuMMX2 with CpuSSE|Cpu3dnowA.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.
 2008-01-22 19:57:30 +00:00
H.J. Lu
6305a20382 gas/ 
2008-01-22  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (XXX_PREFIX): Moved from tc-i386.h.
	(XXX_MNEM_SUFFIX): Likewise.
	(END_OF_INSN): Likewise.
	(templates): Likewise.
	(modrm_byte): Likewise.
	(rex_byte): Likewise.
	(DREX_XXX): Likewise.
	(drex_byte): Likewise.
	(sib_byte): Likewise.
	(processor_type): Likewise.
	(arch_entry): Likewise.
	(cpu_sub_arch_name): Remove const.
	(cpu_arch): Add .vmx and .smx.
	(set_cpu_arch): Append cpu_sub_arch_name.
	(md_parse_option): Support -march=CPU[,+EXTENSION...].
	(md_show_usage): Updated.

	* config/tc-i386.h (XXX_PREFIX): Moved to tc-i386.c.
	(XXX_MNEM_SUFFIX): Likewise.
	(END_OF_INSN): Likewise.
	(templates): Likewise.
	(modrm_byte): Likewise.
	(rex_byte): Likewise.
	(DREX_XXX): Likewise.
	(drex_byte): Likewise.
	(sib_byte): Likewise.
	(processor_type): Likewise.
	(arch_entry): Likewise.

	* doc/as.texinfo: Update i386 -march option.

	* doc/c-i386.texi: Update -march= for ISA.

gas/testsuite/

2008-01-22  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/arch-10-1.l: New.
	* gas/i386/arch-10-1.s: Likewise.
	* gas/i386/arch-10-2.l: Likewise.
	* gas/i386/arch-10-2.s: Likewise.
	* gas/i386/arch-10-3.l: Likewise.
	* gas/i386/arch-10-3.s: Likewise.
	* gas/i386/arch-10-4.l: Likewise.
	* gas/i386/arch-10-4.s: Likewise.
	* gas/i386/arch-10.d: Likewise.
	* gas/i386/arch-10.s: Likewise.

	* gas/i386/i386.exp: Run arch-10, arch-10-1, arch-10-2,
	arch-10-3 and arch-10-4.

	* gas/i386/nops-2.s: Use movsbl instead of cmove.
	* gas/i386/nops-2-i386.d: Updated.
	* gas/i386/nops-2-merom.d: Likewise.
	* gas/i386/nops-2.d: Likewise.
	* gas/i386/x86-64-nops-2.d: Likewise.

opcodes/

2008-01-22  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flag_init): Add CPU_VMX_FLAGS and
	CPU_SMX_FLAGS.
	* i386-init.h: Regenerated.
 2008-01-22 19:16:45 +00:00
H.J. Lu
fd07a1c880 gas/testsuite/ 
2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/prescott.s: Add tests for movddup in Intel syntax.
	* gas/i386/x86-64-prescott.s: Likewise.

	* gas/i386/prescott.d: Updated.
	* gas/i386/x86-64-prescott.d: Likewise.

opcodes/

2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.tbl: Use Qword on movddup.
	* i386-tbl.h: Regenerated.
 2008-01-16 00:05:56 +00:00
H.J. Lu
321fd21e2f gas/ 
2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (md_assemble): Also zap movzx and movsx
	suffix for AT&T syntax.

gas/testsuite/

2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/i386.s: Add more tests for movsx and movzx.
	* gas/i386/x86_64.s: Likewise.

	* gas/i386/inval.s: Remove tests for movsxw and movzxw.

	* gas/i386/x86-64-inval.s: Remove tests for movsxb, movsxw,
	movsxl, movzxb and movzxw.

	* gas/i386/i386.d: Updated.
	* gas/i386/inval.l: Likewise.
	* gas/i386/x86_64.d: Likewise.
	* gas/i386/x86-64-inval.l: Likewise.

opcodes/

2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.tbl: Put back 16bit movsx/movzx for AT&T syntax.
	* i386-tbl.h: Regenerated.
 2008-01-15 18:50:44 +00:00
H.J. Lu
4ee521786f 2008-01-15 H.J. Lu <hongjiu.lu@intel.com> 
* i386-dis.c (Mx): New.
	(PREFIX_0FC3): Likewise.
	(PREFIX_0FC7_REG_6): Updated.
	(dis386_twobyte): Use PREFIX_0FC3.
	(prefix_table): Add PREFIX_0FC3.  Use Mq on movntq and movntsd.
	Use Mx on movntps, movntpd, movntdq and movntdqa.  Use Md on
	movntss.
 2008-01-15 17:20:50 +00:00
H.J. Lu
5c07affcae gas/ 
2008-01-14  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (match_reg_size): New.
	(match_mem_size): Likewise.
	(operand_size_match): Likewise.
	(operand_type_match): Also clear all size fields.
	(match_template): Skip Intel syntax when in AT&T syntax.
	Call operand_size_match to check operand size.
	(i386_att_operand): Set the mem field to 1 for memory
	operand.
	(i386_intel_operand): Likewise.

gas/testsuite/

2008-01-14  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/i386.s: Add tests for movsx, movzx and movnti.
	* gas/i386/inval.s: Likewise.
	* gas/i386/x86_64.s: Likewise.
	* gas/i386/x86-64-inval.s: Likewise.

	* gas/i386/i386.d: Updated.
	* gas/i386/inval.l: Likewise.
	* gas/i386/x86_64.d: Likewise.
	* gas/i386/x86-64-inval.l: Likewise.

opcodes/

2008-01-14  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (opcode_modifiers): Add IntelSyntax.
	(operand_types): Add Mem.

	* i386-opc.h (IntelSyntax): New.
	* i386-opc.h (Mem): New.
	(Byte): Updated.
	(Opcode_Modifier_Max): Updated.
	(i386_opcode_modifier): Add intelsyntax.
	(i386_operand_type): Add mem.

	* i386-opc.tbl: Remove Reg16 from movnti.  Add sizes to more
	instructions.

	* i386-reg.tbl: Add size for accumulator.

	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.
 2008-01-15 01:37:56 +00:00
H.J. Lu
0d6a2f58b8 2008-01-13 H.J. Lu <hongjiu.lu@intel.com> 
* i386-opc.h (Byte): Fix a typo.
 2008-01-14 05:15:06 +00:00
H.J. Lu
7d5e4556a3 gas/testsuite/ 
2008-01-12  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/5534
	* gas/i386/i386.s: Add tests for fnstsw and fstsw.
	* gas/i386/inval.s: Likewise.
	* gas/i386/x86_64.s: Likewise.

	* gas/i386/intel.s: Use word instead of dword on ss.

	* gas/i386/x86-64-inval.s: Add tests for fnstsw, fstsw, in
	and out.

	* gas/i386/prefix.s: Remove invalid fstsw.

	* gas/i386/inval.l: Updated.
	* gas/i386/intelbad.l: Likewise.
	* gas/i386/i386.d: Likewise.
	* gas/i386/x86_64.d: Likewise.
	* gas/i386/x86-64-inval.l: Likewise.
	* gas/i386/prefix.d: Updated.

gas/

2008-01-12  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/5534
	* config/tc-i386.c (_i386_insn): Update comment.
	(operand_type_match): Also clear unspecified.
	(operand_type_register_match): Likewise.
	(parse_operands): Initialize unspecified.
	(i386_intel_operand): Likewise.
	(match_template): Check memory and accumulator operand size.
	(i386_att_operand): Clear unspecified on register operand.
	(intel_e11): Likewise.
	(intel_e09): Set operand size and clean unspecified for
	"XXX PTR".

opcodes/

2008-01-12  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/5534
	* i386-gen.c (operand_type_init): Add Dword to
	OPERAND_TYPE_ACC32.  Add Qword to OPERAND_TYPE_ACC64.
	(opcode_modifiers): Remove CheckSize, Byte, Word, Dword,
	Qword and Xmmword.
	(operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte,
	Xmmword, Unspecified and Anysize.
	(set_bitfield): Make Mmword an alias of Qword.  Make Oword
	an alias of Xmmword.

	* i386-opc.h (CheckSize): Removed.
	(Byte): Updated.
	(Word): Likewise.
	(Dword): Likewise.
	(Qword): Likewise.
	(Xmmword): Likewise.
	(FWait): Updated.
	(OTMax): Likewise.
	(i386_opcode_modifier): Remove checksize, byte, word, dword,
	qword and xmmword.
	(Fword): New.
	(TBYTE): Likewise.
	(Unspecified): Likewise.
	(Anysize): Likewise.
	(i386_operand_type): Add byte, word, dword, fword, qword,
	tbyte xmmword, unspecified and anysize.

	* i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword,
	Tbyte, Xmmword, Unspecified and Anysize.

	* i386-reg.tbl: Add size for accumulator.

	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.
 2008-01-12 16:05:42 +00:00
H.J. Lu
b5b1fc4fc8 gas/testsuite/ 
2008-01-10  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/nops.s: Add more tests with opcodes from 0x0f19
	to 0x0f1f.
	* gas/i386/x86-64-nops.s: Likewise.

	* gas/i386/nops.d: Updated.
	* gas/i386/x86-64-nops.d: Likewise.

opcodes/

2008-01-10  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (REG_0F0E): Renamed to REG_0F0D.
	(REG_0F18): Updated.
	(reg_table): Updated.
	(dis386_twobyte): Updated.  Use "nopQ" on 0x19 to 0x1e.
	(twobyte_has_modrm): Set 1 for 0x19 to 0x1e.
 2008-01-10 14:52:35 +00:00
H.J. Lu
50e8458f68 2008-01-08 H.J. Lu <hongjiu.lu@intel.com> 
* i386-gen.c (set_bitfield): Use fail () on error.
 2008-01-09 01:24:07 +00:00
H.J. Lu
3d4d5afaf0 2008-01-08 H.J. Lu <hongjiu.lu@intel.com> 
* i386-gen.c (lineno): New.
	(filename): Likewise.
	(set_bitfield): Report filename and line numer on error.
	(process_i386_opcodes): Set filename and update lineno.
	(process_i386_registers): Likewise.
 2008-01-08 21:24:16 +00:00
H.J. Lu
e1d4d8936f gas/ 
2008-01-05  H.J. Lu  <hongjiu.lu@intel.com>

	* doc/c-i386.texi: Update .att_mnemonic and .intel_mnemonic.

	* config/tc-i386.c (set_intel_mnemonic): Set intel_mnemonic
	only.
	(md_assemble): Remove Intel mode workaround.
	(match_template): Check support for old gcc, AT&T mnemonic
	and Intel Syntax.
	(md_parse_option): Don't set intel_mnemonic to 0 for
	OPTION_MOLD_GCC.

gas/testsuite/

2008-01-05  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/intel.s: Add tests for fadd, faddp, fdiv, fdivp,
	fdivr, fdivrp, fmul, fmulp, fsub, fsubp, fsubr and fsubrp.

	* gas/i386/intel.d: Updated.
	* gas/i386/intel.e: Likewise.

opcodes/

2008-01-05  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (opcode_modifiers): Rename IntelMnemonic to
	ATTSyntax.

	* i386-opc.h (IntelMnemonic): Renamed to ..
	(ATTSyntax): This
	(Opcode_Modifier_Max): Updated.
	(i386_opcode_modifier): Remove intelmnemonic. Add attsyntax
	and intelsyntax.

	* i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax
	on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp.
	* i386-tbl.h: Regenerated.
 2008-01-05 17:07:25 +00:00
H.J. Lu
6f143e4d77 2008-01-04 H.J. Lu <hongjiu.lu@intel.com> 
* i386-gen.c: Update copyright to 2008.
	* i386-opc.h: Likewise.
	* i386-opc.tbl: Likewise.

	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.
 2008-01-04 18:10:08 +00:00
H.J. Lu
c6add5371c gas/testsuite/ 
2008-01-04  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/rexw.d: New.
	* gas/i386/rexw.s: Likewise.

	* gas/i386/x86-64-sse4_1-intel.d: Updated.
	* gas/i386/x86-64-sse4_1.d: Likewise.

opcodes/

2008-01-04  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.tbl: Add NoRex64 to extractps, movmskpd, movmskps,
	pextrb, pextrw, pinsrb, pinsrw and pmovmskb.
	* i386-tbl.h: Regenerated.
 2008-01-04 18:03:02 +00:00
H.J. Lu
3629bb00a8 gas/ 
2008-01-03  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/config/tc-i386.c (cpu_arch_flags_not): Removed.
	(cpu_flags_not): Likewise.
	(cpu_flags_match): Updated to check 64bit and arch.
	(set_code_flag): Remove cpu_arch_flags_not.
	(set_16bit_gcc_code_flag): Likewise.
	(set_cpu_arch): Likewise.
	(md_begin): Likewise.
	(parse_insn): Call cpu_flags_match to check 64bit and arch.
	(match_template): Likewise.

gas/testsuite/

2008-01-03  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/arch-9.d: New file.
	* gas/i386/arch-9.s: Likewise.

	* gas/i386/i386.exp: Run arch-9.

opcodes/

2008-01-03  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flag_init): Remove CpuSSE4_1_Or_5 and
	CpuSSE4_2_Or_ABM.
	(cpu_flags): Likewise.

	* i386-opc.h (CpuSSE4_1_Or_5): Removed.
	(CpuSSE4_2_Or_ABM): Likewise.
	(CpuLM): Updated.
	(i386_cpu_flags): Remove cpusse4_1_or_5 and cpusse4_2_or_abm.

	* i386-opc.tbl: Replace CpuSSE4_1_Or_5, CpuSSE4_2_Or_ABM and
	Cpu686|CpuPadLock with CpuSSE4_1|CpuSSE5, CpuABM|CpuSSE4_2
	and CpuPadLock, respectively.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.
 2008-01-04 01:05:45 +00:00
H.J. Lu
24995bd6e3 gas/ 
2008-01-03  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (match_template): Use the xmmword field
	instead of no_xsuf.

opcodes/

2008-01-03  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (opcode_modifiers): Remove No_xSuf.

	* i386-opc.h (No_xSuf): Removed.
	(CheckSize): Updated.

	* i386-tbl.h: Regenerated.
 2008-01-03 20:09:38 +00:00
H.J. Lu
e0329a2266 gas/testsuite/ 
2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/arch-5.d: New file.
	* gas/i386/arch-5.s: Likewise.
	* gas/i386/arch-6.d: Likewise.
	* gas/i386/arch-6.s: Likewise.
	* gas/i386/arch-7.d: Likewise.
	* gas/i386/arch-7.s: Likewise.
	* gas/i386/arch-8.d: Likewise.
	* gas/i386/arch-8.s: Likewise.

	* gas/i386/i386.exp: Run arch-5, arch-6, arch-7 and arch-8.

opcodes/

2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flag_init): Add CpuSSE4_2_Or_ABM to
	CPU_AMDFAM10_FLAGS, CPU_SSE4_2_FLAGS, CpuABM and
	CPU_SSE5_FLAGS.
	(cpu_flags): Add CpuSSE4_2_Or_ABM.

	* i386-opc.h (CpuSSE4_2_Or_ABM): New.
	(CpuLM): Updated.
	(i386_cpu_flags): Add cpusse4_2_or_abm.

	* i386-opc.tbl: Use CpuSSE4_2_Or_ABM instead of
	CpuABM|CpuSSE4_2 on popcnt.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.
 2008-01-03 05:29:53 +00:00
H.J. Lu
18a2244ddd Add a missing ','. 2008-01-03 05:27:55 +00:00
H.J. Lu
f2a9c676b7 gas/testsuite/ 
2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/i386.s: Add tests for movq.
	* gas/i386/x86_64.s: Likewise.

	* gas/i386/i386.d Updated.
	* gas/i386/x86_64.d: Likewise.

opcodes/

2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.h: Update comments.
 2008-01-03 03:28:35 +00:00
H.J. Lu
615888ae9f Fix a typo. 2008-01-03 00:02:26 +00:00
H.J. Lu
d978b5be20 2008-01-02 H.J. Lu <hongjiu.lu@intel.com> 
* i386-gen.c (opcode_modifiers): Use Qword instead of QWord.
	* i386-opc.h: Likewise.
	* i386-opc.tbl: Likewise.
 2008-01-02 23:54:47 +00:00
H.J. Lu
582d5eddfe gas/ 
2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/5534
	* config/tc-i386.c (match_template): Handle XMMWORD_MNEM_SUFFIX.
	Check memory size in Intel mode.
	(process_suffix): Handle XMMWORD_MNEM_SUFFIX.
	(intel_e09): Likewise.

	* config/tc-i386.h (XMMWORD_MNEM_SUFFIX): New.

gas/testsuite/

2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/5534
	* gas/i386/intel.s: Use QWORD on movq instead of DWORD.

	* gas/i386/inval.s: Add tests for movq.
	* gas/i386/x86-64-inval.s: Likewise.

	* gas/i386/inval.l: Updated.
	* gas/i386/x86-64-inval.l: Likewise.

opcodes/

2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/5534
	* i386-gen.c (opcode_modifiers): Add No_xSuf, CheckSize,
	Byte, Word, Dword, QWord and Xmmword.

	* i386-opc.h (No_xSuf): New.
	(CheckSize): Likewise.
	(Byte): Likewise.
	(Word): Likewise.
	(Dword): Likewise.
	(QWord): Likewise.
	(Xmmword): Likewise.
	(FWait): Updated.
	(i386_opcode_modifier): Add No_xSuf, CheckSize, Byte, Word,
	Dword, QWord and Xmmword.

	* i386-opc.tbl: Add CheckSize|QWord to movq if IgnoreSize is
	used.
	* i386-tbl.h: Regenerated.
 2008-01-02 21:43:34 +00:00
H.J. Lu
6c7ac64e17 Move 2007 ChangeLog entries to ChangeLog-2007. 2008-01-02 21:41:02 +00:00
Mark Kettenis
3fe15143a8 * m88k-dis.c (instructions): Fix fcvt.* instructions. 
From Miod Vallat.
 2008-01-02 00:37:44 +00:00
H.J. Lu
4ae6d70300 Fix a typo in ChangeLog. 2007-12-31 16:17:43 +00:00
H.J. Lu
98b528ac84 gas/testsuite/ 
2007-12-31  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/inval.s: Add test for cvtsi2ss/cvtsi2sd.
	* gas/i386/simd.s: Likewise.
	* gas/i386/x86-64-simd.s: Likewise.

	* gas/i386/inval.l: Updated.
	* gas/i386/simd-intel.d: Likewise.
	* gas/i386/simd-suffix.d: Likewise.
	* gas/i386/simd.d: Likewise.
	* gas/i386/sse2.d: Likewise.
	* gas/i386/x86-64-opcode.d: Likewise.
	* gas/i386/x86-64-simd-intel.d: Likewise.
	* gas/i386/x86-64-simd-suffix.d: Likewise.
	* gas/i386/x86-64-simd.d: Likewise.

opcodes/

2007-12-31  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (prefix_table): Use "%LQ" on cvtpi2ps/cvtsi2sd.
	(putop): Handle '%' and "LQ".

	* i386-opc.tbl: Remove IgnoreSize from cvtpi2ps/cvtsi2sd.
	* i386-tbl.h: Regenerated.
 2007-12-31 15:42:22 +00:00
H.J. Lu
70ad4a561e Add ',' at the end of cpu_flag_init. 2007-12-28 19:42:53 +00:00
H.J. Lu
8d79a8c8d5 gas/testsuite/ 
2007-12-28  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/arch-1.d: New file.
	* gas/i386/arch-1.s: Likewise.
	* gas/i386/arch-2.d: Likewise.
	* gas/i386/arch-2.s: Likewise.
	* gas/i386/arch-3.d: Likewise.
	* gas/i386/arch-3.s: Likewise.
	* gas/i386/arch-4.d: Likewise.
	* gas/i386/arch-4.s: Likewise.

	* gas/i386/i386.exp: Run arch-1, arch-2, arch-3 and arch-4.

opcodes/

2007-12-28  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flag_init): Add CpuSSE4_1_Or_5 to
	CPU_SSE4_1_FLAGS, CPU_SSE4_2_FLAGS and CPU_SSE5_FLAGS.
	(cpu_flags): Add CpuSSE4_1_Or_5.

	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

	* i386-opc.h (CpuSSE4_1_Or_5): New.
	(CpuLM): Updated.
	(i386_cpu_flags): Add cpusse4_1_or_5.

	* i386-opc.tbl: Use CpuSSE4_1_Or_5 instead of CpuSSE4_1|CpuSSE5
	on ptest roundpd, roundps, roundsd and roundss.
 2007-12-28 16:04:41 +00:00
H.J. Lu
1efbbeb461 gas/ 
2007-12-23  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (set_intel_mnemonic): New.
	(intel_mnemonic): Likewise.
	(old_gcc): Likewise.
	(OPTION_MMNEMONIC): Likewise.
	(OPTION_MSYNTAX): Likewise.
	(OPTION_MINDEX_REG): Likewise.
	(OPTION_MNAKED_REG): Likewise.
	(OPTION_MOLD_GCC): Likewise.
	(md_pseudo_table): Add .intel_mnemonic and .att_mnemonic.
	(match_template): Don't allow AT&T/Intel mnemonic if Intel/AT&T
	mnemonic is specified.  Don't allow old gcc support if old_gcc
	is 0.
	(md_longopts): Add -mmnemonic, -msyntax, -mindex-reg,
	-mmnaked-reg and -mold-gcc.
	(md_parse_option): Handle OPTION_MMNEMONIC, OPTION_MSYNTAX,
	OPTION_MINDEX_REG, OPTION_MNAKED_REG and OPTION_MOLD_GCC.

	* doc/c-i386.texi: Docoument -mmnemonic, -msyntax, --mnaked-reg
	and AT&T mnemonic vs. Intel mnemonic.

gas/testsuite/

2007-12-23  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/compat-intel.d: Pass -mmnemonic=att to assembler.
	* gas/i386/compat.d: Likewise.

	* gas/i386/i386.exp: Pass -mmnemonic=att to assembler for
	"float".  Pass -mold-gcc to assembler for  "general".

opcodes/

2007-12-23  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (opcode_modifiers): Add OldGcc, ATTMnemonic and
	IntelMnemonic.

	* i386-opc.h (OldGcc): New.
	(ATTMnemonic): Likewise.
	(IntelMnemonic): Likewise.
	(Opcode_Modifier_Max): Updated.
	(i386_opcode_modifier): Add oldgcc, attmnemonic and
	intelmnemonic.

	* i386-opc.tbl: Update fadd, fdiv, fdivp, fdivr, fdivrp, fmul,
	fsub, fsubp, fsubr and fsubrp with OldGcc, ATTMnemonic and
	IntelMnemonic.
	* i386-tbl.h: Regeneratd.
 2007-12-24 05:27:39 +00:00
H.J. Lu
9d14166966 binutils/ 
2007-12-22  H.J. Lu  <hongjiu.lu@intel.com>

	* doc/binutils.texi: Document the new intel-mnemonic and
	intel-mnemonic options for i386 disassembler.

gas/testsuite/

2007-12-22  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/compat-intel.d: New file.
	* gas/i386/compat.d: Likewise.
	* gas/i386/compat.s: Likewise.

	* gas/i386/i386.exp: Run compat.

opcodes/

2007-12-22  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (intel_mnemonic): New.
	(print_i386_disassembler_options): Display att-mnemonic and
	intel-mnemonic options.
	(print_insn): Handle att-mnemonic and intel-mnemonic.
	(float_reg): Replace SYSV386_COMPAT with "!M" and "M".
	(putop): Handle "!M" and "M".
 2007-12-22 14:06:31 +00:00
H.J. Lu
df1764b8ab 2007-12-21 H.J. Lu <hongjiu.lu@intel.com> 
* Makefile.am (i386-gen.o): Also depend on
	$(srcdir)/../include/opcode/i386.h.
	* Makefile.in: Regenerated.
 2007-12-21 17:04:04 +00:00
Mark Shinwell
350cc38db2 bfd/ 
* archures.c (bfd_mach_mips_loongson_2e): New.
	(bfd_mach_mips_loongson_2f): New.
	* bfd-in2.h (bfd_mach_mips_loongson_2e): New.
	(bfd_mach_mips_loongson_2f): New.
	* cpu-mips.c: Add I_loongson_2e and I_loongson_2f to
	anonymous enum.
	(arch_info_struct): Add Loongson-2E and Loongson-2F entries.
	* elfxx-mips.c (_bfd_elf_mips_mach): Handle Loongson-2E
	and Loongson-2F flags.
	(mips_set_isa_flags): Likewise.
	(mips_mach_extensions): Add Loongson-2E and Loongson-2F
	entries.

	binutils/
	* readelf.c (get_machine_flags): Handle Loongson-2E and -2F
	flags.

	gas/
	* config/tc-mips.c (mips_cpu_info_table): Add loongson2e
	and loongson2f entries.
	* doc/c-mips.texi: Document -march=loongson{2e,2f} options.

	gas/testsuite/
	* gas/mips/mips.exp: Add loongson-2e and -2f tests.
	* gas/mips/loongson-2e.d: New.
	* gas/mips/loongson-2e.s: New.
	* gas/mips/loongson-2f.d: New.
	* gas/mips/loongson-2f.s: New.

	include/elf/
	* mips.h (E_MIPS_MACH_LS2E): New.
	(E_MIPS_MACH_LS2F): New.

	include/opcode/
	* mips.h (INSN_LOONGSON_2E): New.
	(INSN_LOONGSON_2F): New.
	(CPU_LOONGSON_2E): New.
	(CPU_LOONGSON_2F): New.
	(OPCODE_IS_MEMBER): Update for Loongson-2E and -2F flags.

	opcodes/
	* mips-dis.c (mips_arch_choices): Add Loongson-2E and -2F
	entries.
	* mips-opc.c (IL2E): New.
	(IL2F): New.
	(mips_builtin_opcodes): Add Loongson-2E and -2F instructions.
	Allow movz and movn for Loongson-2E and -2F.  Add movnz entry.
	Move coprocessor encodings to the end of the table.  Allow
	certain MIPS V .ps instructions on the Loongson-2E and -2F.
 2007-11-29 12:23:44 +00:00
Mark Shinwell
569502941a include/opcode/ 
* mips.h (INSN_ISA*): Redefine certain values as an
	enumeration.  Update comments.
	(mips_isa_table): New.
	(ISA_MIPS*): Redefine to match enumeration.
	(OPCODE_IS_MEMBER): Modify to correctly test new INSN_ISA*
	values.

	opcodes/
	* mips-opc.c (I3_32, I3_33, I4_32, I4_33, I5_33): New.
	(mips_builtin_opcodes): Use these new I* values.
 2007-11-29 11:55:19 +00:00
Andreas Krebbel
5f1c91d91e 2007-11-27 Andreas Krebbel <krebbel1@de.ibm.com> 
* s390-opc.txt ("tcet", "tcdt", "tcxt", "tget", "tgdt",
	"tgxt"): Removed.
	("tdcet", "tdcdt", "tdcxt", "tdget", "tdgdt", "tdgxt"): Added.
 2007-11-27 15:33:28 +00:00
Andreas Krebbel
967877645e 2007-11-27 Andreas Krebbel <krebbel1@de.ibm.com> 
* s390-opc.txt ("tcet", "tcdt", "tcxt", "tget", "tgdt",
	"tgxt"): Removed.
	("tdcet", "tdcdt", "tdcxt", "tdget", "tdgdt", "tdgxt"): Added.

2007-11-27  Andreas Krebbel  <krebbel1@de.ibm.com>

	* gas/s390/zarch-z9-ec.d: ("tcet", "tcdt", "tcxt", "tget",
	"tgdt", "tgxt"): Removed.
        ("tdcet", "tdcdt", "tdcxt", "tdget", "tdgdt", "tdgxt"): Added.
	* gas/s390/zarch-z9-ec.s: Likewise.
 2007-11-27 15:31:59 +00:00
H.J. Lu
4f8631b1d4 gas/ 
2007-11-14  Tristan Gingold  <gingold@adacore.com>

	* config/tc-ia64.c (AR_RUC): Defined.
	(ar): Add "ar.ruc".
	(specify_resource): Handle AR_RUC like AR_ITC.

gas/testsuite/

2007-11-14  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/ia64/dv-raw-err.s: Add tests for ar.ruc.
	* gas/ia64/dv-waw-err.s: Likewise.
	* gas/ia64/invalid-ar.s: Likewise.

	* gas/ia64/regs.s: Add tests for ar.ruc and ar44.

	* gas/ia64/dv-raw-err.l: Updated.
	* gas/ia64/dv-waw-err.l: Likewise.
	* gas/ia64/invalid-ar.l: Likewise.
	* gas/ia64/regs.d: Likewise.

opcodes/

2007-11-14  H.J. Lu  <hongjiu.lu@intel.com>

	* ia64-ic.tbl: Updated for Itanium 9100 series.
	* ia64-raw.tbl: Likewise.
	* ia64-waw.tbl: Likewise.
	* ia64-asmtab.c: Regenerated.

2007-11-14  Tristan Gingold  <gingold@adacore.com>

	* ia64-dis.c (print_insn_ia64): Handle ar.ruc.
	* ia64-gen.c (lookup_regindex): Likewise.
 2007-11-14 22:31:54 +00:00
Nick Clifton
57d85092b1 PR gas/5228 
* m68k-opc.c (m68k_opcodes): Fix coldfire msac.w instructions with parallel loads.
 2007-11-07 16:37:44 +00:00
Tristan Gingold
679936aac4 * ia64-dis.c (print_insn_ia64): Generate symbolic names for cr 
registers instead of register number.

* gas/ia64/regs.d: Expect symbolic names for cr registers due to
 improved disassembler.
 2007-11-07 15:57:14 +00:00
Nick Clifton
92c8bd791d * arm-dis.c (arm_opcodes): Remove superflous escapes of percent operators. 2007-11-07 14:40:40 +00:00
Peter Bergner
548b1dcfcb * ppc-opc.c (powerpc_opcodes): Remove the dcffix and dcffix. opcodes 
which are not included in the "Preliminary Decimal Floating-Point
	Architecture" document.
 2007-11-06 23:14:07 +00:00
H.J. Lu
7ce189b305 gas/ 
2007-11-01  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (md_assemble): Replace no_xsuf with
	no_ldsuf.
	(match_template): Likewise.

opcodes/

2007-11-01  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (opcode_modifiers): Replace No_xSuf with
	No_ldSuf.
	* i386-opc.tbl: Likewise.

	* i386-opc.h (No_xSuf): Renamed to ...
	(No_ldSuf): This.
	(FWait): Updated.
 2007-11-01 19:06:54 +00:00
H.J. Lu
ca61edf2ff gas/ 
2007-11-01  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (process_suffix): Check addrprefixop0 to
	see if the address size override prefix changes the size of the
	first operand.
	(check_byte_reg): Don't warn if byteokintel is set.
	(check_long_reg): Set i.suffix to QWORD_MNEM_SUFFIX if toqword
	is set.
	(check_qword_reg): Set i.suffix to LONG_MNEM_SUFFIX if todword
	is set.

gas/testsuite/

2007-11-01  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/i386.d: New.
	* gas/i386/i386.s: Likewise.

	* gas/i386/i386.exp: Run i386.

	* gas/i386/x86_64.s: Add tests for movsx, movsbl, movsbq,
	movsbw, movswl, movswq, movzx, movzb, movzbl, movzbq,
	movzbw, movzwl and movzwq.
	* gas/i386/x86_64.d: Updated.

opcodes/

2007-11-01  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (opcode_modifiers): Add ByteOkIntel, ToDword,
	ToQword and AddrPrefixOp0.

	* i386-opc.h (ByteOkIntel): New.
	(ToDword): Likewise.
	(ToQword): Likewise.
	(AddrPrefixOp0): Likewise.
	(IsPrefix): Updated.
	(i386_opcode_modifier): Add byteokintel, todword, toqword
	and addrprefixop0.

	* i386-opc.tbl (cvtss2si): Add ToQword.
	(cvttss2si): Likewise.
	(cvtsd2si): Add ToDword.
	(cvttsd2si): Likewise.
	(monitor): Add AddrPrefixOp0.
	(invlpga): Likewise.
	(vmload): Likewise.
	(vmrun): Likewise.
	(vmsave): Likewise.
	(pextrb): Add ByteOkIntel.
	(pinsrb): Likewise.
	* i386-tbl.h: Regenerated.
 2007-11-01 16:27:08 +00:00
H.J. Lu
1b0d430b05 2007-10-31 H.J. Lu <hongjiu.lu@intel.com> 
* i386-dis.c (USE_REG_TABLE): Defined as the previous one + 1.
	(USE_REG_TABLE): Likewise.
	(USE_MOD_TABLE): Likewise.
	(USE_RM_TABLE): Likewise.
	(USE_PREFIX_TABLE): Likewise.
	(USE_X86_64_TABLE): Likewise.
	(USE_3BYTE_TABLE): Likewise.
 2007-10-31 23:41:12 +00:00
H.J. Lu
75c135a8a4 2007-10-26 H.J. Lu <hongjiu.lu@intel.com> 
* i386-dis.c (MOD_0F2B_PREFIX_0...MOD_0F2B_PREFIX_3): New.
	(MOD_0F51): Likewise.
	(MOD_0FD7): Likewise.
	(MOD_0FE7_PREFIX_2): Likewise.
	(MOD_0F382A_PREFIX_2): Likewise.
	(MOD_0F71_REG_2): Updated.
	(MOD_0FF0_PREFIX_3): Likewise.
	(MOD_62_32BIT): Likewise.
	(dis386_twobyte): Use MOD_0F51 and  MOD_0FD7.
	(prefix_table): Use MOD_0F2B_PREFIX_0...MOD_0F2B_PREFIX_3,
	MOD_0FE7_PREFIX_2 and MOD_0F382A_PREFIX_2.
	(mod_table): Add MOD_0F2B_PREFIX_0...MOD_0F2B_PREFIX_3,
	MOD_0F51, MOD_0FD7 and MOD_0F382A_PREFIX_2.
 2007-10-26 20:48:09 +00:00
Nick Clifton
2cc7bb5dcf * arm-dis.c (print_insn): Check for a symtab that exists but is empty. 2007-10-26 11:27:12 +00:00
Alan Modra
79f7344f10 * po/POTFILES.in: Regenerate. 2007-10-24 04:57:04 +00:00
H.J. Lu
ad19981d72 gas/testsuite/ 
2007-10-23  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/katmai.s: Remove cmpps opcode test.

	* gas/i386/simd.s: Add tests for cmpss and cmpsd.
	* gas/i386/x86-64-simd.s: Likewise.

	* gas/i386/katmai.d: Updated.
	* gas/i386/simd-intel.d: Likewise.
	* gas/i386/simd-suffix.d: Likewise.
	* gas/i386/simd.d: Likewise.
	* gas/i386/x86-64-simd-intel.d: Likewise.
	* gas/i386/x86-64-simd-suffix.d: Likewise.
	* gas/i386/x86-64-simd.d: Likewise.

opcodes/

2007-10-23  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (OP_SIMD_Suffix): Renamed to ...
	(CMP_Fixup): This.  Rewrite.
	(OPSIMD): Renamed to ...
	(CMP): This. Updated.
	(prefix_table): Update PREFIX_0FC2 entry.
 2007-10-23 22:52:09 +00:00
H.J. Lu
92fddf8e3d 2007-10-22 H.J. Lu <hongjiu.lu@intel.com> 
* i386-dis.c (prefix_table): Reordered by opcode.
	(mod_table): Likewise.
 2007-10-22 19:22:01 +00:00
H.J. Lu
6a718ea22c 2007-10-19 H.J. Lu <hongjiu.lu@intel.com> 
* i386-dis.c (prefix_table): Use XS on psrldq and pslldq.
 2007-10-19 23:24:00 +00:00
Nathan Sidwell
25b07cd9c4 opcodes/ 
* m68k-opc.c (m68k_opcodes): Correct move sr and ccr masks for
	coldfire.

	gas/testsuite/
	* gas/m68k/mcf-movsr.s: New.
	* gas/m68k/mcf-movsr.d: New.
	* gas/m68k/all.exp: Add mcf-movsr test.
 2007-10-17 13:44:09 +00:00
Peter Bergner
91eb7075e3 * ppc-opc.c (powerpc_opcodes): Fix the first two operands of 
dquaiq. to use the TE and FRT macros.
 2007-10-16 02:55:30 +00:00
Peter Bergner
8dbcd839b1 gas/ 
* config/tc-ppc.c (ppc_setup_opcodes): Verify instructions are sorted
	according to major opcode number.

opcodes/

	* ppc-opc.c (TE): Correct signedness.
	(powerpc_opcodes): Sort psq_st and psq_stu according to major
	opcode number.
 2007-10-16 02:26:30 +00:00
H.J. Lu
d5d7db8e2f 2007-10-15 H.J. Lu <hongjiu.lu@intel.com> 
* i386-dis.c (dis386_twobyte): Reformat.
	(prefix_table):  Likewise.
	(three_byte_table): Likewise.
 2007-10-15 19:13:55 +00:00
Alan Modra
65be13330d * mcore-dis.c (print_insn_mcore): Protect "fprintf" var against 
macro expansion.
 2007-10-15 02:01:40 +00:00
H.J. Lu
e2ec9d29b7 gas/ 
2007-10-12  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (process_operands): Check the firstxmm0
	field in opcode_modifier for instruction with a implicit
	xmm0 as the first operand.

opcodes/

2007-10-12  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (opcode_modifiers): Add FirstXmm0.

	* i386-opc.h (FirstXmm0): New.
	(IsPrefix): Updated.
	(i386_opcode_modifier): Add firstxmm0.

	* i386-opc.tbl (blendvpd): Replace RegKludge with FirstXmm0.
	(blendvps): Likewise.
	(pblendvb): Likewise.
	* i386-tbl.h: Regenerated.
 2007-10-12 21:40:38 +00:00
H.J. Lu
88a94849aa 2007-10-12 H.J. Lu <hongjiu.lu@intel.com> 
* i386-dis.c (prefix_table): Reformat pblendvb and blendvps.
 2007-10-12 20:37:58 +00:00
H.J. Lu
630c2cc56d Remove extra white space. 2007-10-10 22:00:24 +00:00
H.J. Lu
d55ee72f29 2007-10-10 H.J. Lu <hongjiu.lu@intel.com> 
* i386-dis.c (v_mode): Defined as previous one + 1.
	(w_mode): Likewise.
	(d_mode): Likewise.
	(q_mode): Likewise.
	(t_mode): Likewise.
	(x_mode): Likewise.
	(m_mode): Likewise.
	(cond_jump_mode): Likewise.
	(loop_jcxz_mode): Likewise.
	(dq_mode): Likewise.
	(dqw_mode): Likewise.
	(f_mode): Likewise.
	(const_1_mode): Likewise.
	(stack_v_mode): Likewise.
	(z_mode): Likewise.
	(o_mode): Likewise.
	(dqb_mode): Likewise.
	(dqd_mode): Likewise.
	(es_reg): Likewise.
	(cs_reg): Likewise.
	(ss_reg): Likewise.
	(ds_reg): Likewise.
	(fs_reg): Likewise.
	(gs_reg): Likewise.
	(eAX_reg): Likewise.
	(eCX_reg): Likewise.
	(eDX_reg): Likewise.
	(eBX_reg): Likewise.
	(eSP_reg): Likewise.
	(eBP_reg): Likewise.
	(eSI_reg): Likewise.
	(eDI_reg): Likewise.
	(al_reg): Likewise.
	(cl_reg): Likewise.
	(dl_reg): Likewise.
	(bl_reg): Likewise.
	(ah_reg): Likewise.
	(ch_reg): Likewise.
	(dh_reg): Likewise.
	(bh_reg): Likewise.
	(ax_reg): Likewise.
	(cx_reg): Likewise.
	(dx_reg): Likewise.
	(bx_reg): Likewise.
	(sp_reg): Likewise.
	(bp_reg): Likewise.
	(si_reg): Likewise.
	(di_reg): Likewise.
	(rAX_reg): Likewise.
	(rCX_reg): Likewise.
	(rDX_reg): Likewise.
	(rBX_reg): Likewise.
	(rSP_reg): Likewise.
	(rBP_reg): Likewise.
	(rSI_reg): Likewise.
	(rDI_reg): Likewise.
	(z_mode_ax_reg): Likewise.
	(indir_dx_reg): Likewise.
	(DREX_OC1): Updated.
	(DREX_NO_OC0): Likewise.
	(DREX_MASK): Likewise.
	(MAX_BYTEMODE): New.  Issue an error if MAX_BYTEMODE is not
	less than DREX_OC1.
 2007-10-10 16:25:02 +00:00
H.J. Lu
8a72226ad5 gas/testsuite/ 
2007-10-08  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/i386.exp: Run simd-suffix and x86-64-simd-suffix.

	* gas/i386/simd-suffix.d: New.
	* gas/i386/x86-64-simd-suffix.d: Likewise.

	* gas/i386/x86-64-opcode.d: Updated.
	* gas/i386/x86-64-simd.d: Likewise.

opcodes/

2007-10-08  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c: Updated comments for 'Y'.
	(putop): Don't add 'q' for 'Y' if suffix_always isn't true.
 2007-10-08 19:22:01 +00:00
Maciej W. Rozycki
f409fd1e69 opcodes/: 
* opcodes/mips-dis.c (mips_cp0_names_r3000): New definition.
(mips_cp0_names_r4000): Likewise.
(mips_arch_choices): Link to the above as appropriate.

gas/testsuite/:
* gas/mips/cp0-names-r3000.d: New test for R3000 CP0 symbolic
disassembly.
* gas/mips/cp0-names-r4000.d: New test for R4000/R4400 symbolic
CP0 disassembly.
* mips/mips.exp: Run the new tests.
 2007-10-08 16:41:35 +00:00
Nick Clifton
defeac7384 * configure.in (SHARED_DEPENDENCIES): Change non-cygwin dependency to be ../bfd/libbfd.la. 
* configure: Regenerate.
 2007-10-08 15:40:41 +00:00
H.J. Lu
47dd174cba gas/testsuite/ 
2007-10-05  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/i386.exp: Run smx.

	* gas/i386/smx.d: New.
	* gas/i386/smx.s: Likewise.

opcodes/

2007-10-05  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (dis386_twobyte): Add getsec.

	* i386-gen.c (cpu_flags): Add CpuSMX.

	* i386-opc.h (CpuSMX): New.
	(CpuSSSE3): Updated.
	(i386_cpu_flags): Add cpusmx.

	* i386-opc.tbl: Add getsec.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.
 2007-10-05 19:04:06 +00:00
H.J. Lu
058f233b7a 2007-10-05 H.J. Lu <hongjiu.lu@intel.com> 
* i386-dis.c (reg_table): Use "{ XX }" on "(bad)".
	(prefix_table): Likewise.
 2007-10-05 16:28:16 +00:00
H.J. Lu
f2a421c445 gas/testsuite/ 
2007-10-04  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/simd.s: Add tests for unpckhpd and unpckhps.
	* gas/i386/x86-64-simd.s: Likewise.

	* gas/i386/simd-intel.d: Updated.
	* gas/i386/simd.d: Likewise.
	* gas/i386/x86-64-simd-intel.d: Likewise.
	* gas/i386/x86-64-simd.d: Likewise.

opcodes/

2007-10-04  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (dis386_twobyte): Use EXx instead of EXq on
	unpckhpX and unpckhpX.
 2007-10-04 22:02:10 +00:00
David Daney
c8ab98e0eb opcodes/ 
2007-10-04  David Daney  <ddaney@avtrex.com>

	* mips-opc.c (mips_builtin_opcodes): Mark lwxc1 as working on FP_S
	registers.

gas/testsuite/
2007-10-04  David Daney  <ddaney@avtrex.com>

	* gas/mips/odd-float.d, gas/mips/odd-float.s: New test.
	* gas/mips/mips.exp: Run it.
 2007-10-04 21:53:06 +00:00
H.J. Lu
df26e7af07 2007-10-04 H.J. Lu <hongjiu.lu@intel.com> 
* i386-dis.c (MOD_0F12_PREFIX_0): Use "movlps" and "movhlps"
	instead of "movlpX" and "movhlpX", respectively.
	(MOD_0F16_PREFIX_0): Use "movhps" and "movlhps" instead of
	"movhpX" and "movlhpX", respectively.
 2007-10-04 21:02:38 +00:00
Nick Clifton
45d42143d4 * configure.in (WIN32LDFLAGS): Rename to SHARED_LDFLAGS. 
(WIN32LIBADD): Rename to SHARED_LIBADD
  (SHARED_DEPENDENCIES): New exported variable.
  (enable_shared): Add dependency upon libbfd.la for non-cygwin based shared library builds.
* Makefile.am (libopcodes_la_DEPENDENCIES): Append SHARED_DEPENDENCIES.
  (libopcodes_la_LIBADD): Rename WIN32LIBADD to SHARED_LIBADD.
  (libopcodes_la_LDFLAGS): Rename WIN32LDFLAGS to SHARED_LDFLAGS.
* configure: Regenerate.
* Makefile.in: Regenerate.
 2007-10-04 14:06:40 +00:00
Nick Clifton
9f39ef2bb8 PR gas/5100 
* arc-opc.c (insert_offset): Fix spelling mistake in error message.
 2007-10-04 13:43:16 +00:00
H.J. Lu
9b60702d0c 2007-10-03 H.J. Lu <hongjiu.lu@intel.com> 
* i386-dis.c (OP_REG): Set add to 0 only when needed.
	(OP_C): Likewise.
	(OP_D): Likewise.
	(OP_MMX): Likewise.
	(OP_XMM): Likewise.
	(OP_EM): Likewise.
	(OP_MXC): Likewise.
	(OP_EX): Likewise.
 2007-10-03 19:30:44 +00:00
H.J. Lu
458fa39293 2007-10-03 H.J. Lu <hongjiu.lu@intel.com> 
* i386-opc.tbl: Update SSE comments.
 2007-10-03 19:03:20 +00:00
H.J. Lu
89b66d557a 2007-10-01 H.J. Lu <hongjiu.lu@intel.com> 
* i386-dis.c (THREE_BYTE_0FBA): Renamed to ...
	(THREE_BYTE_0F7B): This.
	(dis386_twobyte): Updated.
	(three_byte_table): Updated comments.
 2007-10-01 22:23:20 +00:00
Nick Clifton
7fac7ff4ae Various CR16 fixes 2007-10-01 15:55:44 +00:00
H.J. Lu
4584a60d9f 2007-09-30 H.J. Lu <hongjiu.lu@intel.com> 
* 386-dis.c (prefix_table): Reformat comment.
 2007-09-30 19:14:47 +00:00
H.J. Lu
1ceb70f8ad 2007-09-29 H.J. Lu <hongjiu.lu@intel.com> 
* 386-dis.c (USE_GROUPS): Renamed to ...
	(USE_REG_TABLE): This.
	(USE_OPC_EXT_TABLE): Renamed to ...
	(USE_MOD_TABLE): This.
	(USE_OPC_EXT_RM_TABLE): Renamed to ...
	(USE_RM_TABLE): This.
	(USE_XXX_TABLE): Reordered.
	(GRP): Renamed to ...
	(REG_TABLE): This.
	(OPC_EXT_TABLE): Renamed to ...
	(MOD_TABLE): This.
	(OPC_EXT_RM_TABLE): Renamed to ...
	(RM_TABLE): This.
	(GRP_XXX): Renamed to ...
	(REG_XXX): This.
	(PREGRP_XXX): Renamed to ...
	(PREFIX_XXX): This.
	(OPC_EXT_XXX): Renamed to ...
	(MOD_XXX): This.
	(OPC_EXT_RM_XXX): Renamed to ...
	(RM_XXX): This.
	(grps): Renamed to ...
	(reg_table): This
	(prefix_user_table): Renamed to ...
	(prefix_table): This
	(opc_ext_table): Renamed to ...
	(mod_table): This
	(opc_ext_rm_table): Renamed to ...
	(rm_table): This
	(OPC_EXT_RM_XXX): Likewise.
	(dis386): Updated.
	(dis386_twobyte): Likewise.
	(reg_table): Likewise.
	(prefix_table): Likewise.
	(x86_64_table): Likewise.
	(three_byte_table): Likewise.
	(mod_table): Likewise.
	(rm_table): Likewise.
	(get_valid_dis386): Likewise.
 2007-09-29 14:43:44 +00:00
H.J. Lu
4e7d34a6c2 2007-09-28 H.J. Lu <hongjiu.lu@intel.com> 
* 386-dis.c (USE_PREFIX_USER_TABLE): Renamed to ...
	(USE_PREFIX_TABLE): This.
	(X86_64_SPECIAL): Renamed to ...
	(USE_X86_64_TABLE): This.
	(IS_3BYTE_OPCODE): Renamed to ...
	(USE_3BYTE_TABLE): This.
	(GRPXXX): Removed.
	(PREGRPXXX): Likewise.
	(X86_64_XXX): Likewise.
	(THREE_BYTE_XXX): Likewise.
	(OPC_EXT_XXX): Likewise.
	(OPC_EXT_RM_XXX): Likewise.
	(DIS386): New.
	(GRP): Likewise.
	(PREGRP): Likewise.
	(X86_64_TABLE): Likewise.
	(THREE_BYTE_TABLE): Likewise.
	(OPC_EXT_TABLE): Likewise.
	(OPC_EXT_RM_TABLE): Likewise.
	(GRP_XXX): Likewise.
	(PREGRP_XXX): Likewise.
	(X86_64_XXX): Likewise.
	(THREE_BYTE_XXX): Likewise.
	(OPC_EXT_XXX): Likewise.
	(OPC_EXT_RM_XXX): Likewise.
	(dis386): Updated.
	(dis386_twobyte): Likewise.
	(grps): Likewise.
	(prefix_user_table): Likewise.
	(x86_64_table): Likewise.
	(three_byte_table): Likewise.
	(opc_ext_table): Likewise.
	(opc_ext_rm_table): Likewise.
	(get_valid_dis386): Likewise.
 2007-09-28 20:50:59 +00:00
H.J. Lu
6807063ec6 2007-09-27 H.J. Lu <hongjiu.lu@intel.com> 
* i386-dis.c (dis386): Swap X86_64_27 with OPC_EXT_2.
	(x86_64_table): Likewise.
	(opc_ext_table): Likewise.
 2007-09-27 21:53:28 +00:00
H.J. Lu
7c52e0e865 gas/testsuite/gas/ 
2007-09-27  H.J. Lu  <hongjiu.lu@intel.com>

	PR binutils/5072
	* gas/i386/i386.exp: Run x86-64-opcode-inval and
	x86-64-opcode-inval-intel.

	* gas/i386/x86-64-opcode-inval-intel.d: New.
	* gas/i386/x86-64-opcode-inval.d: Likewise.
	* gas/i386/x86-64-opcode-inval.s: Likewise.

opcodes/

2007-09-27  H.J. Lu  <hongjiu.lu@intel.com>

	PR binutils/5072
	* i386-dis.c: Update comments on '{', '}' and '|' to support
	only AT&T and Intel modes.
	(X86_64_4...X86_64_27): New.
	(dis386): Updated.  Use X86_64_4...X86_64_21.
	(dis386_twobyte): Updated.
	(float_mem): Likewise.
	(x86_64_table): Add X86_64_4...X86_64_27.
	(opc_ext_table): Updated.  Use X86_64_22 and X86_64_27.
	(putop): Updated handling of '{', '}' and '|' to support only
	AT&T and Intel modes.
 2007-09-27 18:31:51 +00:00
Kazu Hirata
d0fa13723f gas/ 
* config/m68k-parse.h (m68k_register): Use MBO instead of MBB.
	(last_movec_reg): Change to MBO.
	* config/tc-m68k.c (fido_ctrl): Use MBO instead of MBB.
	(m68k_ip): Use MBO instead of MBO.
	(init_table): Use MBO instead of MBO.  Add an entry for mbo.

gas/testsuite/
	* gas/m68k/fido.s: Add tests for %mbo.
	* gas/m68k/fido.d: Update accordingly.

opcodes/
	* m68k-dis.c (print_insn_arg): Use %mbo instead of %mbb.
 2007-09-27 11:14:10 +00:00
Jim Wilson
7a53bcd4a8 Fix typo in last patch. 2007-09-26 18:11:04 +00:00
Nick Clifton
168411b181 * mt-asm.c (parse_imm16): Reword error message in order to allow it to be translated properly. 
* ia64-gen.c (print_dependency_table): Likewise.
* mips-dis.c (print_insn_args): Likewise.
 2007-09-26 16:07:18 +00:00
Jan Beulich
8776771175 gas/testsuite/ 
2007-09-26  Jan Beulich  <jbeulich@novell.com>

	* gas/i386/x86-64-addr32.d: Adjust expectations.

opcodes/
2007-09-26  Jan Beulich  <jbeulich@novell.com>

	* i386-dis.c (OP_E_extended): Distinguish rip- and eip-
	relative addressing. Update used_prefixes based on whether any
	base or index register was printed.
 2007-09-26 13:42:14 +00:00
Jan Beulich
9a04903eea gas/ 
2007-09-26  Jan Beulich  <jbeulich@novell.com>

	* config/tc-i386.c (build_modrm_byte): Also check for RegEip
	when considering IP-relative addressing.

gas/testsuite/
2007-09-26  Jan Beulich  <jbeulich@novell.com>

	* gas/i386/reloc64.s: Adjust for %eip-relative addressing no
	longer generating errors.
	* gas/i386/reloc64.d, gas/i386/reloc64.l: Update.
	* gas/i386/x86-64-addr32.s: Remove explicit addr32 prefix
	for %eip-realtive addressing case.

opcodes/
2007-09-26  Jan Beulich  <jbeulich@novell.com>

	* i386-opc.h (RegEip): Define.
	(RegEiz): Adjust.
	* i386-reg.tbl: Add eip. Mark rip and eip with RegRex64.
	* i386-tbl.h: Re-generate.
 2007-09-26 13:40:59 +00:00
H.J. Lu
4dffcebc10 gas/ 
2007-09-25  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (output_insn): Use i.tm.opcode_length to
	check opcode length.

opcodes/

2007-09-25  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (process_i386_opcodes): Process opcode_length.

	* i386-opc.h (template): Add opcode_length.
	* 386-opc.tbl: Likewise.
	* i386-tbl.h: Regenerated.
 2007-09-26 04:42:47 +00:00
H.J. Lu
a967d2b76a 2007-09-21 H.J. Lu <hongjiu.lu@intel.com> 
* i386-opc.h: Adjust whitespaces.
 2007-09-21 20:51:33 +00:00
Dave Brolley
c99d3d7aef 2007-09-21 Dave Brolley <brolley@redhat.com> 
* mep-desc.c: Regenerated.
 2007-09-21 18:58:47 +00:00
H.J. Lu
20afcfb756 gas/testsuite/ 
2007-09-20  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/sib.s: Add more eiz tests.
	* gas/i386/x86-64-sib.s: Add more riz tests.

	* gas/i386/sib-intel.d: Updated.
	* gas/i386/sib.d: Likewise.
	* gas/i386/x86-64-sib-intel.d: Likewise.
	* gas/i386/x86-64-sib.d: Likewise.

opcodes/

2007-09-20  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (OP_E_extended): Display eiz for [eiz*1 + offset].
 2007-09-20 20:13:26 +00:00
H.J. Lu
db51cc60e2 gas/ 
2007-09-20  H.J. Lu  <hongjiu.lu@intel.com>

	PR 658
	* config/tc-i386.c (SCALE1_WHEN_NO_INDEX): Removed.
	(set_allow_index_reg): New.
	(allow_index_reg): Likewise.
	(md_pseudo_table): Add "allow_index_reg" and
	"disallow_index_reg".
	(build_modrm_byte): Set i.sib.index to NO_INDEX_REGISTER for
	fake index registers.
	(i386_scale): Updated.
	(i386_index_check): Support fake index registers.
	(parse_real_register): Return NULL on eiz/riz if fake index
	registers aren't allowed.

gas/testsuite/

2007-09-20  H.J. Lu  <hongjiu.lu@intel.com>

	PR 658
	* gas/i386/i386.exp: Run sib-intel, x86-64-sib and
	x86-64-sib-intel.

	* gas/i386/nops-1-i386-i686.d: Updated.
	* gas/i386/nops-1-i386.d: Likewise.
	* gas/i386/nops-1.d: Likewise.
	* gas/i386/nops-2-i386.d: Likewise.
	* gas/i386/nops-2-merom.d: Likewise.
	* gas/i386/nops-2.d: Likewise.
	* gas/i386/nops-3-i386.d: Likewise.
	* gas/i386/nops-3.d : Likewise.
	* gas/i386/sib.d: Likewise.

	* gas/i386/sib.s: Use %eiz in testcases.

	* gas/i386/sib-intel.d: New.
	* gas/i386/x86-64-sib-intel.d: Likewise.
	* gas/i386/x86-64-sib.d: Likewise.
	* gas/i386/x86-64-sib.s: Likewise.

ld/testsuite/

2007-09-20  H.J. Lu  <hongjiu.lu@intel.com>

	PR 658
	* ld-i386/tlsbin.dd: Updated.
	* ld-i386/tlsld1.dd: Likewise.

opcodes/

2007-09-20  H.J. Lu  <hongjiu.lu@intel.com>

	PR 658
	* 386-dis.c (index64): New.
	(index32): Likewise.
	(intel_index64): Likewise.
	(intel_index32): Likewise.
	(att_index64): Likewise.
	(att_index32): Likewise.
	(print_insn): Set index64 and index32.
	(OP_E_extended): Use index64/index32 for index register for
	SIB with INDEX == 4.

	* i386-opc.h (RegEiz): New.
	(RegRiz): Likewise.

	* i386-reg.tbl: Add eiz and riz.
	* i386-tbl.h: Regenerated.
 2007-09-20 17:38:38 +00:00
H.J. Lu
0f7da3979d gas/testsuite/gas/ 
2007-09-19  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/intelok.s: Add tests for memory without base.
	* gas/i386/intelok.d: Updated.
	* gas/i386/intelok.e: Likewise.

opcodes/

2007-09-19  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (OP_E_extended): Always display scale for memory.
 2007-09-19 17:52:21 +00:00
H.J. Lu
20e192ab8d gas/ 
2007-09-17  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (baseindex): Removed.
	(build_modrm_byte): Check reg_num for RIP register instead of
	reg_type.
	(i386_index_check): Likewise.

opcodes/

2007-09-17  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.h (RegRip): New.

	* i386-reg.tbl (rip): Use RegRip for reg_num.
	* i386-tbl.h: Regenerated.
 2007-09-18 00:56:54 +00:00
Nick Clifton
7f396d02ee Updated Spanish translation 2007-09-17 14:06:03 +00:00
H.J. Lu
c0e9c2a631 2007-09-14 H.J. Lu <hongjiu.lu@intel.com> 
* Makefile.am: Run "make dep-am".
	* Makefile.in: Regenerate.
 2007-09-14 19:28:56 +00:00
Michael Meissner
85f10a010c Add AMD SSE5 support 2007-09-14 18:21:09 +00:00
H.J. Lu
8bb1533941 2007-09-13 H.J. Lu <hongjiu.lu@intel.com> 
* i386-dis.c (get_valid_dis386): Take a pointer to
	disassemble_info.  Handle IS_3BYTE_OPCODE.
	(print_insn): Updated.  Don't handle IS_3BYTE_OPCODE here.
 2007-09-14 00:20:03 +00:00
H.J. Lu
8c6c980951 2007-09-12 H.J. Lu <hongjiu.lu@intel.com> 
* i386-opc.h (CpuUnused): Defined with CpuMax.
	(OTUnused): Defined with OTMax.
 2007-09-12 18:55:31 +00:00
Jan Beulich
ae91ad40e9 gas/testsuite/ 
2007-09-12  Jan Beulich  <jbeulich@novell.com>
	* gas/i386/sse4_1.s, gas/i386/x86-64-sse4_1.s: Add two-operand forms
	of blendvps, blendvpd, and pblendvb.
	* gas/i386/sse4_1.d, gas/i386/sse4_1-intel.d,
	gas/i386/x86-64-sse4_1.d, gas/i386/x86-64-sse4_1-intel.d: Adjust,
	making last/first operand of blendvps, blendvpd, and pblendvb
	optional.

opcodes/
2007-09-12  Jan Beulich  <jbeulich@novell.com>

	* i386-opc.tbl: Add two-operand forms of blendvps, blendvpd, and
	pblendvb.
	* i386-tbl.h: Regenerate.
 2007-09-12 13:20:31 +00:00
H.J. Lu
8b40d5948e 2007-09-09 H.J. Lu <hongjiu.lu@intel.com> 
* i386-gen.c (main): Remove the local variable, unused.
 2007-09-09 16:02:17 +00:00
H.J. Lu
331699936d 2007-09-08 H.J. Lu <hongjiu.lu@intel.com> 
* Makefile.am: Run "make dep-am".
	* Makefile.in: Regenerate.
 2007-09-09 01:34:48 +00:00
H.J. Lu
40fb982012 gas/ 
2007-09-08  H.J. Lu  <hongjiu.lu@intel.com>

	* configure.in (AC_CHECK_HEADERS): Add limits.h.
	* configure: Regenerated.
	* config.in: Likewise.

	* config/tc-i386.c: Include "opcodes/i386-init.h".
	(_i386_insn): Use i386_operand_type for types.
	(cpu_arch_flags): Updated to new types with bitfield.
	(cpu_arch_tune_flags): Likewise.
	(cpu_arch_isa_flags): Likewise.
	(cpu_arch): Likewise.
	(i386_align_code): Likewise.
	(set_code_flag): Likewise.
	(set_16bit_gcc_code_flag): Likewise.
	(set_cpu_arch): Likewise.
	(md_assemble): Likewise.
	(parse_insn): Likewise.
	(process_operands): Likewise.
	(output_branch): Likewise.
	(output_jump): Likewise.
	(parse_real_register): Likewise.
	(mode_from_disp_size): Likewise.
	(smallest_imm_type): Likewise.
	(pi): Likewise.
	(type_names): Likewise.
	(pt): Likewise.
	(pte): Likewise.
	(swap_2_operands): Likewise.
	(optimize_imm): Likewise.
	(optimize_disp): Likewise.
	(match_template): Likewise.
	(check_string): Likewise.
	(process_suffix): Likewise.
	(check_byte_reg): Likewise.
	(check_long_reg): Likewise.
	(check_qword_reg): Likewise.
	(check_word_reg): Likewise.
	(finalize_imm): Likewise.
	(build_modrm_byte): Likewise.
	(output_insn): Likewise.
	(disp_size): Likewise.
	(imm_size): Likewise.
	(output_disp): Likewise.
	(output_imm): Likewise.
	(gotrel): Likewise.
	(i386_immediate): Likewise.
	(i386_displacement): Likewise.
	(i386_index_check): Likewise.
	(i386_operand): Likewise.
	(parse_real_register): Likewise.
	(i386_intel_operand): Likewise.
	(intel_e09): Likewise.
	(intel_bracket_expr): Likewise.
	(intel_e11): Likewise.
	(cpu_arch_flags_not): New.
	(cpu_flags_check_x64): Likewise.
	(cpu_flags_all_zero): Likewise.
	(cpu_flags_not): Likewise.
	(i386_cpu_flags_biop): Likewise.
	(cpu_flags_biop): Likewise.
	(cpu_flags_match); Likewise.
	(acc32): New.
	(acc64): Likewise.
	(control): Likewise.
	(reg16_inoutportreg): Likewise.
	(disp16): Likewise.
	(disp32): Likewise.
	(disp32s): Likewise.
	(disp16_32): Likewise.
	(anydisp): Likewise.
	(baseindex): Likewise.
	(regxmm): Likewise.
	(imm8): Likewise.
	(imm8s): Likewise.
	(imm16): Likewise.
	(imm32): Likewise.
	(imm32s): Likewise.
	(imm64): Likewise.
	(imm16_32): Likewise.
	(imm16_32s): Likewise.
	(imm16_32_32s): Likewise.
	(operand_type): Likewise.
	(operand_type_check): Likewise.
	(operand_type_match): Likewise.
	(operand_type_register_match): Likewise.
	(update_imm): Likewise.
	(set_code_flag): Also update cpu_arch_flags_not.
	(set_16bit_gcc_code_flag): Likewise.
	(md_begin): Likewise.
	(parse_insn): Use cpu_flags_check_x64 to check 64bit support.
	Use cpu_flags_match to match instructions.
	(i386_target_format): Update cpu_arch_isa_flags and
	cpu_arch_tune_flags to i386_cpu_flags type with bitfield.
	(smallest_imm_type): Check cpu_arch_tune to tune for i486.
	(match_template): Don't initialize overlap0, overlap1,
	overlap2, overlap3 and operand_types.
	(process_suffix): Handle crc32 with 64bit register.
	(MATCH): Removed.
	(CONSISTENT_REGISTER_MATCH): Likewise.

	* config/tc-i386.h (arch_entry): Updated to i386_cpu_flags
	type.

opcodes/

2007-09-08  H.J. Lu  <hongjiu.lu@intel.com>

	* configure.in (AC_CHECK_HEADERS): Add limits.h.
	* configure: Regenerated.
	* config.in: Likewise.

	* i386-gen.c: Include "sysdep.h" instead of <stdlib.h> and
	<string.h>.  Use xstrerror instead of strerror.
	(initializer): New.
	(cpu_flag_init): Likewise.
	(bitfield): Likewise.
	(BITFIELD): New.
	(cpu_flags): Likewise.
	(opcode_modifiers): Likewise.
	(operand_types): Likewise.
	(compare): Likewise.
	(set_cpu_flags): Likewise.
	(output_cpu_flags): Likewise.
	(process_i386_cpu_flags): Likewise.
	(output_opcode_modifier): Likewise.
	(process_i386_opcode_modifier): Likewise.
	(output_operand_type): Likewise.
	(process_i386_operand_type): Likewise.
	(set_bitfield): Likewise.
	(operand_type_init): Likewise.
	(process_i386_initializers): Likewise.
	(process_i386_opcodes): Call process_i386_opcode_modifier to
	process opcode_modifier.  Call process_i386_operand_type to
	process operand_types.
	(process_i386_registers): Call process_i386_operand_type to
	process reg_type.
	(main): Check unused bits in i386_cpu_flags and i386_operand_type.
	Sort cpu_flags, opcode_modifiers and operand_types.  Call
	process_i386_initializers.

	* i386-init.h: New.
	* i386-tbl.h: Regenerated.

	* i386-opc.h: Include <limits.h>.
	(CHAR_BIT): Define as 8 if not defined.
	(Cpu186): Changed to position of bitfiled.
	(Cpu286): Likewise.
	(Cpu386): Likewise.
	(Cpu486): Likewise.
	(Cpu586): Likewise.
	(Cpu686): Likewise.
	(CpuP4): Likewise.
	(CpuK6): Likewise.
	(CpuK8): Likewise.
	(CpuMMX): Likewise.
	(CpuMMX2): Likewise.
	(CpuSSE): Likewise.
	(CpuSSE2): Likewise.
	(Cpu3dnow): Likewise.
	(Cpu3dnowA): Likewise.
	(CpuSSE3): Likewise.
	(CpuPadLock): Likewise.
	(CpuSVME): Likewise.
	(CpuVMX): Likewise.
	(CpuSSSE3): Likewise.
	(CpuSSE4a): Likewise.
	(CpuABM): Likewise.
	(CpuSSE4_1): Likewise.
	(CpuSSE4_2): Likewise.
	(Cpu64): Likewise.
	(CpuNo64): Likewise.
	(D): Likewise.
	(W): Likewise.
	(Modrm): Likewise.
	(ShortForm): Likewise.
	(Jump): Likewise.
	(JumpDword): Likewise.
	(JumpByte): Likewise.
	(JumpInterSegment): Likewise.
	(FloatMF): Likewise.
	(FloatR): Likewise.
	(FloatD): Likewise.
	(Size16): Likewise.
	(Size32): Likewise.
	(Size64): Likewise.
	(IgnoreSize): Likewise.
	(DefaultSize): Likewise.
	(No_bSuf): Likewise.
	(No_wSuf): Likewise.
	(No_lSuf): Likewise.
	(No_sSuf): Likewise.
	(No_qSuf): Likewise.
	(No_xSuf): Likewise.
	(FWait): Likewise.
	(IsString): Likewise.
	(RegKludge): Likewise.
	(IsPrefix): Likewise.
	(ImmExt): Likewise.
	(NoRex64): Likewise.
	(Rex64): Likewise.
	(Ugh): Likewise.
	(Reg8): Likewise.
	(Reg16): Likewise.
	(Reg32): Likewise.
	(Reg64): Likewise.
	(FloatReg): Likewise.
	(RegMMX): Likewise.
	(RegXMM): Likewise.
	(Imm8): Likewise.
	(Imm8S): Likewise.
	(Imm16): Likewise.
	(Imm32): Likewise.
	(Imm32S): Likewise.
	(Imm64): Likewise.
	(Imm1): Likewise.
	(BaseIndex): Likewise.
	(Disp8): Likewise.
	(Disp16): Likewise.
	(Disp32): Likewise.
	(Disp32S): Likewise.
	(Disp64): Likewise.
	(InOutPortReg): Likewise.
	(ShiftCount): Likewise.
	(Control): Likewise.
	(Debug): Likewise.
	(Test): Likewise.
	(SReg2): Likewise.
	(SReg3): Likewise.
	(Acc): Likewise.
	(FloatAcc): Likewise.
	(JumpAbsolute): Likewise.
	(EsSeg): Likewise.
	(RegMem): Likewise.
	(OTMax): Likewise.
	(Reg): Commented out.
	(WordReg): Likewise.
	(ImplicitRegister): Likewise.
	(Imm): Likewise.
	(EncImm): Likewise.
	(Disp): Likewise.
	(AnyMem): Likewise.
	(LLongMem): Likewise.
	(LongMem): Likewise.
	(ShortMem): Likewise.
	(WordMem): Likewise.
	(ByteMem): Likewise.
	(CpuMax): New
	(CpuLM): Likewise.
	(CpuNumOfUints): Likewise.
	(CpuNumOfBits): Likewise.
	(CpuUnused): Likewise.
	(OTNumOfUints): Likewise.
	(OTNumOfBits): Likewise.
	(OTUnused): Likewise.
	(i386_cpu_flags): New type.
	(i386_operand_type): Likewise.
	(i386_opcode_modifier): Likewise.
	(CpuSledgehammer): Removed.
	(CpuSSE4): Likewise.
	(CpuUnknownFlags): Likewise.
	(Reg): Likewise.
	(WordReg): Likewise.
	(ImplicitRegister): Likewise.
	(Imm): Likewise.
	(EncImm): Likewise.
	(Disp): Likewise.
	(AnyMem): Likewise.
	(LLongMem): Likewise.
	(LongMem): Likewise.
	(ShortMem): Likewise.
	(WordMem): Likewise.
	(ByteMem): Likewise.
	(template): Use i386_cpu_flags for cpu_flags, use
	i386_opcode_modifier for opcode_modifier, use
	i386_operand_type for operand_types.
	(reg_entry): Use i386_operand_type for reg_type.

	* Makefile.am (HFILES): Add i386-init.h.
	($(srcdir)/i386-init.h): New rule.
	($(srcdir)/i386-tbl.h): Depend on $(srcdir)/i386-init.h
	instead.
	* Makefile.in: Regenerated.
 2007-09-09 01:22:57 +00:00
H.J. Lu
93b1ec2cbf 2007-09-06 H.J. Lu <hongjiu.lu@intel.com> 
* i386-gen.c (next_field): Updated to take a separator.
	(process_i386_opcodes): Updated.
	(process_i386_registers): Likewise.
 2007-09-06 22:55:04 +00:00
H.J. Lu
72ffa0fba1 2007-09-06 H.J. Lu <hongjiu.lu@intel.com> 
* i386-gen.c (table): Moved ...
	(main): Here.  Call process_copyright to output copyright.
	(process_copyright): New.
	(process_i386_opcodes): Take FILE *table.
	(process_i386_registers): Likewise.
 2007-09-06 22:08:08 +00:00
H.J. Lu
34edb9ad07 2007-09-06 H.J. Lu <hongjiu.lu@intel.com> 
* i386-gen.c (table): New.
	(process_i386_opcodes): Report errno when faied to open
	i386-opc.tbl.  Output opcodes to table.  Close i386-opc.tbl
	before return.
	(process_i386_registers): Report errno when faied to open
	i386-reg.tbl.  Output opcodes to table.  Close i386-reg.tbl
	before return.
	(main): Open i386-tbl.h for output.

	* Makefile.am ($(srcdir)/i386-tbl.h): Remove " > $@".
	* Makefile.in: Regenerated.
 2007-09-06 21:31:55 +00:00
H.J. Lu
26186d7440 gas/ 
2007-09-06  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (match_template): Handle invlpga, vmload,
	vmrun and vmsave in SVME.
	(process_suffix): Likewise.

gas/testsuite/

2007-09-06  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/svme.s: Updated to allow eax in 64bit.
	* gas/i386/svme.d: Updated.
	* gas/i386/svme64.d: Likewise.

opcodes/

2007-09-06  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.tbl: Correct SVME instructions to allow 32bit register
	operand in 64bit mode.
	* i386-tbl.h: Regenerated.
 2007-09-06 12:28:12 +00:00
H.J. Lu
1afd85e30f 2007-08-31 H.J. Lu <hongjiu.lu@intel.com> 
* i386-dis.c (OPC_EXT_40...OPC_EXT_45): New.
	(dis386_twobyte): Use OPC_EXT_40...OPC_EXT_45.
	(opc_ext_table): Add OPC_EXT_40...OPC_EXT_45.
 2007-08-31 20:55:13 +00:00
H.J. Lu
144c41d992 gas/testsuite/ 
2007-08-31  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/svme.s: Updated to accept eax in 32bit and rax in
	64bit.
	* gas/i386/svme.d: Updated.
	* gas/i386/svme64.d: Likewise.

opcodes/

2007-08-31  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (SVME_Fixup): Removed.
	(OPC_EXT_39): New.
	(OPC_EXT_RM_6): Likewise.
	(grps): Use OPC_EXT_39.
	(opc_ext_table): Add OPC_EXT_39.
	(opc_ext_rm_table): Add OPC_EXT_RM_6.

	* i386-opc.tbl: Correct SVME instructions to take register
	operand only.
	* i386-tbl.h: Regenerated.
 2007-08-31 18:48:29 +00:00
H.J. Lu
dabbade67e 2007-08-31 H.J. Lu <hongjiu.lu@intel.com> 
* Makefile.am (INCLUDES): Remove -D_GNU_SOURCE.
	* Makefile.in: Regenerated.

	* configure.in (AC_GNU_SOURCE): Added.
	(AC_PROG_CC): Moved before AC_GNU_SOURCE.
	(AC_CHECK_DECLS): Add stpcpy.
	* configure: Regenerated.
	* config.in: Likewise.

	* i386-dis.c: Include "sysdep.h" before "dis-asm.h".

	* sysdep.h (stpcpy): New.
 2007-08-31 14:55:10 +00:00
H.J. Lu
bbedc8321e gas/testsuite/ 
2007-08-30  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/amd.s: Add rdtscp.
	* gas/i386/amd.d: Updated.

	* gas/i386/mem-intel.d: Update invlpg for BYTE PTR.
	* gas/i386/x86-64-mem-intel.d: Likewise.

	* gas/i386/x86-64-opcode.s: Add swapgs.
	* gas/i386/x86-64-opcode.d: Updated.

opcodes/

2007-08-30  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (INVLPG_Fixup): Removed.
	(OPC_EXT_38): New.
	(OPC_EXT_RM_5): Likewise.
	(grps): Use OPC_EXT_38.
	(opc_ext_table): Add OPC_EXT_38.
	(opc_ext_rm_table): Add OPC_EXT_RM_5.
 2007-08-30 15:13:46 +00:00
H.J. Lu
876d4bfa30 2007-08-29 H.J. Lu <hongjiu.lu@intel.com> 
* i386-dis.c (SIMD_Fixup): Removed.
	(OPC_EXT_34...OPC_EXT_37): New.
	(dis386_twobyte): Use OPC_EXT_34 and OPC_EXT_35.
	(prefix_user_table): Use OPC_EXT_36 and OPC_EXT_37.
	(opc_ext_table): Add OPC_EXT_34...OPC_EXT_37.
 2007-08-30 05:01:32 +00:00
H.J. Lu
d8faab4eaa 2007-08-29 H.J. Lu <hongjiu.lu@intel.com> 
* i386-dis.c (OPC_EXT_25...OPC_EXT_33): New.
	(dis386): Use OPC_EXT_0...OPC_EXT_2.
	(dis386_twobyte): Use OPC_EXT_3...OPC_EXT_5.
	(grps): Updated to use OPC_EXT_6...OPC_EXT_31.
	(prefix_user_table): Use OPC_EXT_32.
	(x86_64_table): Use OPC_EXT_33.
	(opc_ext_table): Reorder and add OPC_EXT_25...OPC_EXT_33.
 2007-08-29 21:25:02 +00:00
H.J. Lu
c25c34f8fb 2007-08-29 H.J. Lu <hongjiu.lu@intel.com> 
* i386-dis.c (prefix_user_table): Fix comment.
 2007-08-29 17:12:47 +00:00
H.J. Lu
b844680a9c gas/testsuite/ 
2007-08-29  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/i386.exp: Run reg and reg-intel.

	* gas/i386/katmai.d: Update bad instructions.

	* gas/i386/reg.s: New. Add tests for instructions with one
	register operand.
	* gas/i386/reg-intel.d: Likewise.
	* gas/i386/reg.d: Likewise.

opcodes/

2007-08-29  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (OP_Skip_MODRM): New.
	(OP_Monitor): Likewise.
	(OP_Mwait): Likewise.
	(Mb): Likewise.
	(Skip_MODRM): Likewise.
	(USE_OPC_EXT_TABLE): Likewise.
	(USE_OPC_EXT_RM_TABLE): Likewise.
	(PREGRP98...PREGRP100): Likewise.
	(OPC_EXT_0...OPC_EXT_24): Likewise.
	(OPC_EXT_RM_0...OPC_EXT_RM_4): Likewise.
	(lock_prefix): Likewise.
	(data_prefix): Likewise.
	(addr_prefix): Likewise.
	(repz_prefix): Likewise.
	(repnz_prefix): Likewise.
	(opc_ext_table): Likewise.
	(opc_ext_rm_table): Likewise.
	(get_valid_dis386): Likewise.
	(OP_VMX): Removed.
	(OP_0fae): Likewise.
	(PNI_Fixup): Likewise.
	(VMX_Fixup): Likewise.
	(VM): Likewise.
	(twobyte_uses_DATA_prefix): Likewise.
	(twobyte_uses_REPNZ_prefix): Likewise.
	(twobyte_uses_REPZ_prefix): Likewise.
	(threebyte_0x38_uses_DATA_prefix): Likewise.
	(threebyte_0x38_uses_REPNZ_prefix): Likewise.
	(threebyte_0x38_uses_REPZ_prefix): Likewise.
	(threebyte_0x3a_uses_DATA_prefix): Likewise.
	(threebyte_0x3a_uses_REPNZ_prefix): Likewise.
	(threebyte_0x3a_uses_REPZ_prefix): Likewise.
	(grps): Use OPC_EXT_0...OPC_EXT_24.
	(prefix_user_table): Use PREGRP98.
	(print_insn): Remove uses_DATA_prefix, uses_LOCK_prefix,
	uses_REPNZ_prefix and uses_REPZ_prefix.  Initialize
	repz_prefix, repnz_prefix, lock_prefix, addr_prefix and
	data_prefix based on prefixes.  Call get_valid_dis386 to
	get a pointer to the valid dis386.  Print out prefixes if
	they aren't NULL.
	(OP_C): Clear lock_prefix if PREFIX_LOCK is used.
	(REP_Fixup): Set repz_prefix to "rep " when seeing
	PREFIX_REPZ.
 2007-08-29 15:34:42 +00:00
Daniel Jacobowitz
69efdb4555 * po/nl.po: Updated translation. 2007-08-28 20:04:13 +00:00
H.J. Lu
d9a5e5e5c9 gas/ 
2007-08-28  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (process_suffix): Handle cmpxchg8b in
	Intel mode.

gas/testsuite/

2007-08-28  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/mem.s: New. Add tests for instructions with one
	memory operand.
	* gas/i386/x86-64-mem.s: Likewise.

	* gas/i386/mem-intel.d: Updated.
	* gas/i386/mem.d: Likewise.
	* gas/i386/x86-64-mem-intel.d: Likewise.
	* gas/i386/x86-64-mem.d: Likewise.

opcodes/

2007-08-28  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (Md): New.
	(grps): Use 0 on invlpg.  Use M on fxsave and fxrstor.  Use
	Md on ldmxcsr and stmxcsr.  Use b_mode on clflush.
	(OP_0fae): Clear bytemode for sfence.
 2007-08-28 17:36:34 +00:00
Ben Elliston
c3d65c1ced binutils/ 
* doc/binutils.texi (objdump): Document -Mppcps.

gas/
	* config/tc-ppc.c (parse_cpu): Handle "750cl".
	(pre_defined_registers): Add "gqr0" to "gqr7", "gqr.0" to "gqr.7".
	(md_show_usage): Document -m750cl.
	(md_assemble): Handle two delimiters in succession (eg. `),').
	* doc/c-ppc.texi (PowerPC-Opts): Document -m750cl.
	* testsuite/gas/ppc/ppc.exp: Run ppc70ps dump tests.
	* testsuite/gas/ppc/ppc750ps.s: New file.
	* testsuite/gas/ppc/ppc750ps.d: Likewise.

include/opcode/
	* ppc.h (PPC_OPCODE_PPCPS): New.

opcodes/
	* ppc-opc.c (PSW, PSWM, PSQ, PSQM, PSD, MTMSRD_L): New.
	(XOPS, XOPS_MASK, XW, XW_MASK): Likewise.
	(PPCPS): Likewise.
	(powerpc_opcodes): Add all pair singles instructions.
	* ppc-dis.c (powerpc_dialect): Handle "ppcps".
	(print_ppc_disassembler_options): Document -Mppcps.
 2007-08-24 00:56:30 +00:00
Andreas Krebbel
fcb7aa2f6b 2007-08-21 Andreas Krebbel <krebbel1@de.ibm.com> 
* s390-mkopc.c (struct s390_cond_ext_format): New global struct.
	(s390_cond_ext_format): New global variable.
	(expandConditionalJump): New function.
	(main): Invoke expandConditionalJump for mnemonics containing '*'.
	* s390-opc.txt: Replace mnemonics with conditional
	mask extensions with instructions using the newly introduced '*' tag.
 2007-08-21 15:54:30 +00:00
Alan Modra
e9f274335b * po/Make-in: Add --msgid-bugs-address to xgettext invocation. 2007-08-17 01:04:52 +00:00
Nick Clifton
d02756e75b Updated Finnish, Irish and Vietnamese translations 2007-08-10 13:16:32 +00:00
H.J. Lu
c3ad16c0cd gas/ 
2007-08-09  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (check_byte_reg): Support pextrb and pinsrb.

gas/testsuite/

2007-08-09  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/i386.exp: Run sse4_1-intel, sse4_2-intel,
	x86-64-sse4_1-intel and x86-64-sse4_2-intel.

	* gas/i386/sse4_1-intel.d: New file.
	* gas/i386/sse4_2-intel.d: Likewise.
	* gas/i386/x86-64-sse4_1-intel.d: Likewise.
	* gas/i386/x86-64-sse4_2-intel.d: Likewise.

	* gas/i386/sse4_1.s: Add tests for Intel syntax.
	* gas/i386/sse4_2.s: Likewise.
	* gas/i386/x86-64-sse4_1.s: Likewise.
	* gas/i386/x86-64-sse4_2.s: Likewise.

	* gas/i386/sse4_1.d: Updated.
	* gas/i386/sse4_2.d: Likewise.
	* gas/i386/x86-64-sse4_1.d: Likewise.
	* gas/i386/x86-64-sse4_2.d: Likewise.

opcodes/

2007-08-09  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.tbl: Add NoRex64 to pmovsxbw, pmovsxwd, pmovsxdq,
	pmovzxbw, pmovzxwd, pmovzxdq and roundsd.
	* i386-tbl.h: Regenerated.
 2007-08-09 13:50:51 +00:00
Jim Wilson
b8deab3780 Fix resource dependency problems for xmpy. 2007-08-03 18:54:22 +00:00
Michael Snyder
7a3c21c92f 2007-08-01 Michael Snyder <msnyder@access-company.com> 
* i386-dis.c (print_insn): Guard against NULL.
 2007-08-02 00:40:02 +00:00
H.J. Lu
8976381e69 gas/testsuite/ 
2007-07-29  H.J. Lu  <hongjiu.lu@intel.com>

	PR binutils/4834
	* gas/i386/simd-intel.d: Updated.
	* gas/i386/simd.d: Likewise.
	* gas/i386/x86-64-simd-intel.d: Likewise.
	* gas/i386/x86-64-simd.d: Likewise.

	* gas/i386/simd.s: Add tests for SSE4 instructions.
	* gas/i386/x86-64-simd.s: Likewise.

opcodes/

2007-07-29  H.J. Lu  <hongjiu.lu@intel.com>

	PR binutils/4834
	* i386-dis.c (EXw): New.
	(prefix_user_table): Updated to use EXw, EXd and EXq for SSE4
	instructions when appropriated.
 2007-07-29 19:43:36 +00:00
H.J. Lu
59d5bbeb35 The fix is for PR 4834, not PR 4835. 2007-07-29 18:37:21 +00:00
H.J. Lu
09335d057c gas/testsuite/ 
2007-07-28  H.J. Lu  <hongjiu.lu@intel.com>

	PR binutils/4835
	* gas/i386/simd-intel.d: Updated.
	* gas/i386/simd.d: Likewise.
	* gas/i386/x86-64-simd-intel.d: Likewise.
	* gas/i386/x86-64-simd.d: Likewise.

	* gas/i386/simd.s: Add new tests.
	* gas/i386/x86-64-simd.s: Likewise.

opcodes/

2007-07-28  H.J. Lu  <hongjiu.lu@intel.com>

	PR binutils/4835
	* i386-dis.c (Eq): New.
	(EMC): Renamed to ...
	(EMCq): This.  Use q_mode instead of v_mode.
	(prefix_user_table): Updated to use EXd, EXq, EMCq, Ed and Eq
	when appropriated.
 2007-07-28 23:34:14 +00:00
H.J. Lu
231af07047 gas/testsuite/ 
2007-07-28  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/x86-64-opcode.d: Updated.
	* gas/i386/x86-64-simd-intel.d: Likewise.
	* gas/i386/x86-64-simd.d: Likewise.

	* gas/i386/x86-64-simd.s: Add movq.

opcodes/

2007-07-28  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (dis386_twobyte): Change "movd" to "movK".
	(prefix_user_table): Likewise.  Use EXq instead of EXx on
	"movq".
 2007-07-28 16:32:01 +00:00
Nathan Sidwell
33e8d5ac61 * ppc-opc (PPC7450): New. 
(powerpc_opcodes): Use it in dcba.
 2007-07-27 14:24:27 +00:00
H.J. Lu
6baf377280 2007-07-24 H.J. Lu <hongjiu.lu@intel.com> 
* i386-gen.c (main): Print a newline after copyright notice.
 2007-07-24 20:17:18 +00:00
Nick Clifton
c908d778a7 PR binutils/4801 
* maxq-dis.c (get_reg_name): Fix the scan of the mem_access_syntax_table.
 2007-07-19 16:23:47 +00:00
H.J. Lu
1405105681 gas/testsuite/ 
2007-07-16  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/simd.s: Add tests for punpcklbw, punpckldq,
	punpcklwd and punpcklqdq.
	* gas/i386/x86-64-simd.s: Likewise.

	* gas/i386/simd-intel.d: Updated.
	* gas/i386/simd.d: Likewise.
	* gas/i386/x86-64-simd-intel.d: Likewise.
	* gas/i386/x86-64-simd.d: Likewise.

opcodes/

2007-07-16  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (EMq): Removed.
	(EMx): New.
	(prefix_user_table): Replace EMq with EMx.
 2007-07-16 19:16:44 +00:00
Nick Clifton
80f2eaf078 Update Dutch opcodes translation. 
Add new Ukranian binutils translation.
 2007-07-16 10:11:01 +00:00
Nick Clifton
7353bd54f1 Updated Vietnamese and Dutch translations 2007-07-12 07:28:27 +00:00
H.J. Lu
e8d39116d2 2007-07-06 Mark Kettenis <kettenis@gnu.org> 
H.J. Lu  <hongjiu.lu@intel.com>

	* Makefile.am (i386-tbl.h): Add $(srcdir)/ to target.
	(ia64-asmtab.c): Likewise.
	* Makefile.in: Regenerate.
 2007-07-06 14:35:50 +00:00
H.J. Lu
033ca630f7 2007-07-05 H.J. Lu <hongjiu.lu@intel.com> 
* aclocal.m4: Regenerated.
 2007-07-05 18:03:18 +00:00
Nick Clifton
9b201bb5e5 Change source files over to GPLv3. 2007-07-05 09:49:03 +00:00
Nick Clifton
ddb341a78c * cr16-dis.c (getcinvstring): Add const qualifier to char * parameter. 
(print_insn_cr16): Remove cast to char *.
 2007-07-04 14:29:44 +00:00
Nathan Sidwell
afa2158f09 gas/testsuite/ 
* gas/m68k/mcf-coproc.d: New.
	* gas/m68k/mcf-coproc.s: New.
	* gas/m68k/all.exp: Add it.

	gas/
	* config/tc-m68k.c (m68k_ip): Add j & K operand types.
	(install_operand): Add E encoding.
	(md_begin): Check and skip initial '.' arg character.
	(get_num): Add 0..511 case.

	include/
	* opcode/m68k.h: Document j K & E.

	opcodes/
	* m68k-dis.c (fetch_arg): Add E.  Replace length switch with
	direct masking.
	(print_ins_arg): Add j & K operand types.
	(match_insn_m68k): Check and skip initial '.' arg character.
	(m68k_scan_mask): Likewise.
	* m68k-opc.c (m68k_opcodes): Add coprocessor instructions.
 2007-07-03 07:54:19 +00:00
Alan Modra
ae351704e2 Regenerate files. 2007-07-02 07:12:53 +00:00
H.J. Lu
86b57e315d bfd/ 
2007-06-30  H.J. Lu  <hongjiu.lu@intel.com>

	* aclocal.m4: Regenerated.
	* Makefile.in: Likewise.

bfd/doc/

2007-06-30  H.J. Lu  <hongjiu.lu@intel.com>

	* Makefile.in: Likewise.

binutils/

2007-06-30  H.J. Lu  <hongjiu.lu@intel.com>

	* aclocal.m4: Regenerated.
	* doc/Makefile.in: Likewise.
	* Makefile.in: Likewise.

gas/

2007-06-30  H.J. Lu  <hongjiu.lu@intel.com>

	* aclocal.m4: Regenerated.
	* doc/Makefile.in: Likewise.
	* Makefile.in: Likewise.

gprof/

2007-06-30  H.J. Lu  <hongjiu.lu@intel.com>

	* aclocal.m4: Regenerated.
	* Makefile.in: Likewise.

ld/

2007-06-30  H.J. Lu  <hongjiu.lu@intel.com>

	* aclocal.m4: Regenerated.
	* Makefile.in: Likewise.

opcodes/

2007-06-30  H.J. Lu  <hongjiu.lu@intel.com>

	* aclocal.m4: Regenerated.
	* Makefile.in: Likewise.
 2007-06-30 17:21:16 +00:00
H.J. Lu
f85fcb85a6 2007-06-29 H.J. Lu <hongjiu.lu@intel.com> 
* i386-reg.tbl: Remove spaces before comments.
 2007-06-29 20:07:53 +00:00
Nick Clifton
3d3d428f04 New port: National Semiconductor's CR16 2007-06-29 14:09:34 +00:00
H.J. Lu
40b8e679e8 2007-06-28 H.J. Lu <hongjiu.lu@intel.com> 
* Makefile.am (HFILES): Add i386-opc.h and i386-tbl.h.
	(CFILES): Add i386-gen.c.
	(i386-gen): New rule.
	(i386-gen.o): Likewise.
	(i386-tbl.h): Likewise.
	Run "make dep-am".
	* Makefile.in: Regenerated.

	* i386-gen.c: New file.
	* i386-opc.tbl: Likewise.
	* i386-reg.tbl: Likewise.
	* i386-tbl.h: Likewise.

	* i386-opc.c: Include "i386-tbl.h".
	(i386_optab): Removed.
	(i386_regtab): Likewise.
	(i386_regtab_size): Likewise.
 2007-06-28 14:29:56 +00:00
Paul Brook
cd2cf30b7d 2007-06-26 Paul Brook <paul@codesourcery.com> 
gas/
	* config/tc-arm.c (parse_operands): Accept generic coprocessor regs
	for OP_RVC.
	(reg_names): Add fpinst, pfinst2, mvfr0 and mvfr1.

	gas/testsuite/
	* gas/arm/vfp1xD.d: Add new fmrx/fmxr tests.
	* gas/arm/vfp1xD.s: Ditto.
	* gas/arm/vfp1xD_t2.d: Ditto.
	* gas/arm/vfp1xD_t2.s: Ditto.

	opcodes/
	* arm-dis.c (coprocessor_opcodes): Add fmxr/fmrx mvfr0/mvfr1.
 2007-06-26 21:36:37 +00:00
H.J. Lu
5f15756d11 gas/ 
2007-06-25  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (process_operands): Replace regKludge
	with RegKludge.

opcodes/

2007-06-25  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.h (regKludge): Renamed to ...
	(RegKludge): This.

	* i386-opc.c (i386_optab): Replace regKludge with RegKludge.
 2007-06-25 21:20:20 +00:00
H.J. Lu
09a2c6cf5c gas/testsuite/ 
2007-06-23  H.J. Lu  <hongjiu.lu@intel.com>

	PR binutils/4667
	* gas/i386/i386.exp: Run simd, simd-intel, x86-64-simd
	and x86-64-simd-intel.

	* gas/i386/opcode-intel.d: Updated.

	* gas/i386/simd-intel.d: New.
	* gas/i386/simd.d: Likewise.
	* gas/i386/simd.s: Likewise.
	* gas/i386/x86-64-simd-intel.d: Likewise.
	* gas/i386/x86-64-simd.d: Likewise.
	* gas/i386/x86-64-simd.s: Likewise.

opcodes/

2007-06-23  H.J. Lu  <hongjiu.lu@intel.com>

	PR binutils/4667
	* i386-dis.c (EX): Removed.
	(EMd): New.
	(EMq): Likewise.
	(EXd): Likewise.
	(EXq): Likewise.
	(EXx): Likewise.
	(PREGRP93...PREGRP97): Likewise.
	(dis386_twobyte): Updated.
	(prefix_user_table): Updated. Add PREGRP93...PREGRP97.
	(OP_EX): Remove Intel syntax handling.
 2007-06-23 14:55:18 +00:00
Kazu Hirata
ddefa7f508 opcodes/ 
* m68k-opc.c (m68k_opcodes): Add wdebugl variants.

gas/testsuite/
	* gas/m68k/all.exp: Run mcf-wdebug.
	* gas/testsuite/gas/m68k/mcf-wdebug.d,
	gas/testsuite/gas/m68k/mcf-wdebug.s: New.
 2007-06-18 16:10:27 +00:00
H.J. Lu
798879259b bfd/ 
2007-06-14  H.J. Lu  <hongjiu.lu@intel.com>

	* Makefile.am (ACLOCAL_AMFLAGS): Add -I . -I ../config.

	* acinclude.m4: Don't include m4 files. Remove libtool
	kludge.

	* Makefile.in: Regenerated.
	* doc/Makefile.in: Likewise.
	* aclocal.m4: Likewise.
	* configure: Likewise.

binutils/

2007-06-14  H.J. Lu  <hongjiu.lu@intel.com>

	* Makefile.am (ACLOCAL_AMFLAGS): Add -I ../config -I ../bfd.

	* acinclude.m4: Removed.

	* Makefile.in: Regenerated.
	* aclocal.m4: Likewise.
	* configure: Likewise.

gas/

2007-06-14  H.J. Lu  <hongjiu.lu@intel.com>

	* Makefile.am (ACLOCAL_AMFLAGS): Add -I ../config -I ../bfd.

	* acinclude.m4: Don't include m4 files.
	(BFD_BINARY_FOPEN): Removed.
	Remove libtool kludge.

	* Makefile.in: Regenerated.
	* doc/Makefile.in: Likewise.
	* aclocal.m4: Likewise.
	* configure: Likewise.

gprof/

2007-06-14  H.J. Lu  <hongjiu.lu@intel.com>

	* Makefile.am (ACLOCAL_AMFLAGS): Add -I ../config -I ../bfd.

	* acinclude.m4: Removed.

	* Makefile.in: Regenerated.
	* aclocal.m4: Likewise.
	* configure: Likewise.

ld/

2007-06-14  H.J. Lu  <hongjiu.lu@intel.com>

	* Makefile.am (ACLOCAL_AMFLAGS): Add -I ../config -I ../bfd.

	* acinclude.m4: Removed.

	* Makefile.in: Regenerated.
	* aclocal.m4: Likewise.
	* configure: Likewise.

opcodes/

2007-06-14  H.J. Lu  <hongjiu.lu@intel.com>

	* Makefile.am (ACLOCAL_AMFLAGS): Add -I ../config -I ../bfd.

	* acinclude.m4: Removed.

	* Makefile.in: Regenerated.
	* doc/Makefile.in: Likewise.
	* aclocal.m4: Likewise.
	* configure: Likewise.
 2007-06-14 15:31:01 +00:00
Paul Brook
79d4951621 2007-06-05 Paul Brook <paul@codesourcery.com> 
gas/
	* config/tc-arm.c (insns): Correct Thumb-2 ldrd/strd opcodes.

	gas/testsuite/
	* gas/arm/thumb32.d: Add writeback addressing mode tests.
	* gas/arm/thumb32.s: Update expected output.

	opcodes/
	* arm-dis.c (thumb32_opcodes): Display writeback ldrd/strd addresses.
 2007-06-05 22:02:47 +00:00
Steve Ellcey
d7040cdb28 * regenerated files from updating libtool. 2007-05-24 18:12:51 +00:00
Steve Ellcey
37ad95141b * ltmain.sh: Update from GCC. 
* libtool.m4: Update from GCC.
	* ltsugar.m4: New. Update from GCC.
	* ltversion.m4: New. Update from GCC.
	* ltoptions.m4: New. Update from GCC.
	* ltconfig: Remove.
	* ltcf-c.sh: Remove.
	* ltcf-cxx.sh: Remove.
	* ltcf-gcj.sh: Remove.
	* src-release: Update with new libtool file list.
	* newlib/*/configure.in: invoke _LD_DECL_SED.
	* newlib/*/Makefile.am: Ensure toplevel is included in ACLOCAL_AMFLAGS.
	* Regenerate subdirectories
 2007-05-24 17:33:42 +00:00
Alan Modra
65b650b4c7 * ppc-dis.c (print_insn_powerpc): Don't skip all operands 
after setting skip_optional.
 2007-05-18 01:32:58 +00:00
Peter Bergner
ea192fa395 * ppc-dis.c (operand_value_powerpc, skip_optional_operands): New. 
(print_insn_powerpc): Use the new operand_value_powerpc and
	skip_optional_operands functions to omit or print all optional
	operands as a group.
	* ppc-opc.c (BFF, W, XFL_L, XWRA_MASK): New.
	(XFL_MASK): Delete L and W bits from the mask.
	(mtfsfi, mtfsfi.): Replace use of BF with BFF.  Relpace use of XRA_MASK
	with XWRA_MASK.  Use W.
	(mtfsf, mtfsf.): Use XFL_L and W.
 2007-05-17 00:52:14 +00:00
H.J. Lu
9beff6903b gas/testsuite/ 
2007-05-14  H.J. Lu  <hongjiu.lu@intel.com>

	PR binutils/4502
	* gas/i386/amd.d: Replace "pfmulhrw" with "pmulhrw".

opcodes/

2007-05-14  H.J. Lu  <hongjiu.lu@intel.com>

	PR binutils/4502
	* i386-dis.c (Suffix3DNow): Replace "pfmulhrw" with "pmulhrw".
 2007-05-15 01:05:59 +00:00
H.J. Lu
4d67a4d303 2007-05-10 H.J. Lu <hongjiu.lu@intel.com> 
* i386-opc.h (ShortForm): Redefined.
	(Jump): Likewise.
	(JumpDword): Likewise.
	(JumpByte): Likewise.
	(JumpInterSegment): Likewise.
	(FloatMF): Likewise.
	(FloatR): Likewise.
	(FloatD): Likewise.
	(Size16): Likewise.
	(Size32): Likewise.
	(Size64): Likewise.
	(IgnoreSize): Likewise.
	(DefaultSize): Likewise.
	(No_bSuf): Likewise.
	(No_wSuf): Likewise.
	(No_lSuf): Likewise.
	(No_sSuf): Likewise.
	(No_qSuf): Likewise.
	(No_xSuf): Likewise.
	(FWait): Likewise.
	(IsString): Likewise.
	(regKludge): Likewise.
	(IsPrefix): Likewise.
	(ImmExt): Likewise.
	(NoRex64): Likewise.
	(Rex64): Likewise.
	(Ugh): Likewise.
 2007-05-10 18:21:13 +00:00
H.J. Lu
8de28984c3 2007-05-07 H.J. Lu <hongjiu.lu@intel.com> 
* i386-dis.c (threebyte_0x38_uses_DATA_prefix): Correct entries
	for some SSE4 instructions.
	(threebyte_0x3a_uses_DATA_prefix): Likewise.
 2007-05-07 19:01:00 +00:00
H.J. Lu
20592a94ff gas/ 
2007-05-03  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (match_template): Don't explicitly check
	suffix for crc32 in Intel mode.
	(process_suffix): Issue an error for crc32 if the operand size
	is ambiguous.

gas/testsuite/

2007-05-03  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/crc32-intel.d: Updated.
	* gas/i386/crc32.d: Likewise.
	* gas/i386/sse4_2.d: Likewise.
	* gas/i386/x86-64-crc32-intel.d: Likewise.
	* gas/i386/x86-64-crc32.d: Likewise.
	* gas/i386/x86-64-sse4_2.d: Likewise.

	* gas/i386/crc32.s: Remove crc32 instructions with ambiguous
	operand size and suffix in crc32 instructions in Intel mode.
	* gas/i386/x86-64-crc32.s: Likewise.

	* gas/i386/sse4_2.s: Remove crc32 instructions with ambiguous
	operand size.
	* gas/i386/x86-64-sse4_2.s: Likewise.

	* gas/i386/i386.exp: Run inval-crc32 and x86-64-inval-crc32.

	* gas/i386/inval-crc32.l: New.
	* gas/i386/inval-crc32.s: Likewise.
	* gas/i386/x86-64-inval-crc32.l: Likewise.
	* gas/i386/x86-64-inval-crc32.s: Likewise.

opcodes/

2007-05-03  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (CRC32_Fixup): Don't print suffix in Intel mode.

	* i386-opc.c (i386_optab): Remove IgnoreSize and correct operand
	type for crc32.
 2007-05-03 21:07:16 +00:00
H.J. Lu
9344ff2951 gas/config/ 
2007-05-01  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (match_template): Check suffix for crc32 in
	Intel mdoe.
	(process_suffix): Default the suffix of 8bit crc32 to
	BYTE_MNEM_SUFFIX.
	(check_byte_reg): Skip check for 8bit crc32.

gas/testsuite/

2007-05-01  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/crc32-intel.d: New file.
	* gas/i386/crc32.d:Likewise.
	* gas/i386/crc32.s:Likewise.
	* gas/i386/x86-64-crc32-intel.d:Likewise.
	* gas/i386/x86-64-crc32.d:Likewise.
	* gas/i386/x86-64-crc32.s:Likewise.

	* gas/i386/i386.exp: Run crc32, crc32-intel, x86-64-crc32
	and x86-64-crc32-intel.

opcodes/

2007-05-01  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (CRC32_Fixup): Properly handle Intel mode and
	check data size prefix in 16bit mode.

	* i386-opc.c (i386_optab): Default crc32 to non-8bit and
	support Intel mode.
 2007-05-01 12:59:24 +00:00
Mark Salter
53289dcddc Support new FR-V SPRs 2007-04-30 13:21:52 +00:00
Alan Modra
eb42fac1bb opcodes/ 
PR 4436
	* ppc-opc.c (powerpc_operands): Correct bitm for second entry of MBE.
gas/
	PR 4436
	* config/tc-ppc.c (ppc_insert_operand): Disable range check if
	min > max.
 2007-04-30 00:27:57 +00:00
H.J. Lu
484c222e44 2007-04-27 H.J. Lu <hongjiu.lu@intel.com> 
* i386-dis.c (modrm): Put reg before rm.
 2007-04-27 19:47:30 +00:00
H.J. Lu
5d6696482a gas/testsuite/ 
2007-04-26  H.J. Lu  <hongjiu.lu@intel.com>

	PR binutils/4430
	* gas/i386/amd.d: Updated.
	* gas/i386/immed32.d: Likewise.
	* gas/i386/intel.d: Likewise.
	* gas/i386/intel16.d: Likewise.
	* gas/i386/intelok.d: Likewise.
	* gas/i386/jump16.d: Likewise.
	* gas/i386/naked.d: Likewise.
	* gas/i386/opcode-suffix.d: Likewise.
	* gas/i386/opcode.d: Likewise.
	* gas/i386/prescott.d: Likewise.
	* gas/i386/ssemmx2.d: Likewise.
	* gas/i386/tlsd.d: Likewise.
	* gas/i386/tlspic.d: Likewise.
	* gas/i386/x86-64-addr32.d: Likewise.
	* gas/i386/x86-64-prescott.d: Likewise.
	* gas/i386/x86-64-rip.d: Likewise.
	* gas/i386/x86_64.d: Likewise.

ld/testsuite/

2007-04-26  H.J. Lu  <hongjiu.lu@intel.com>

	PR binutils/4430
	* ld-i386/tlsbin.dd: Updated.
	* ld-i386/tlsbindesc.dd: Likewise
	* ld-i386/tlsdesc.dd: Likewise
	* ld-i386/tlsgdesc.dd: Likewise
	* ld-i386/tlsnopic.dd: Likewise
	* ld-i386/tlspic.dd: Likewise
	* ld-x86-64/tlsbin.dd: Likewise
	* ld-x86-64/tlsbindesc.dd: Likewise
	* ld-x86-64/tlsdesc.dd: Likewise
	* ld-x86-64/tlsgdesc.dd: Likewise
	* ld-x86-64/tlspic.dd: Likewise

opcodes/

2007-04-26  H.J. Lu  <hongjiu.lu@intel.com>

	PR binutils/4430
	* i386-dis.c (print_displacement): New.
	(OP_E): Call print_displacement instead of print_operand_value
	to output displacement when either base or index exist.  Print
	the explicit zero displacement in 16bit mode.
 2007-04-27 04:22:02 +00:00
H.J. Lu
185b11630d gas/testsuite/ 
2007-04-26  H.J. Lu  <hongjiu.lu@intel.com>

	PR binutils/4429
	* gas/i386/i386.exp: Run "x86-64-addr32-intel" and
	"x86-64-rip-intel".

	* gas/i386/intelok.d: Updated.

	* gas/i386/x86-64-addr32-intel.d: New file.
	* gas/i386/x86-64-rip-intel.d: Likewise.

opcodes/

2007-04-26  H.J. Lu  <hongjiu.lu@intel.com>

	PR binutils/4429
	* i386-dis.c (print_insn): Also swap the order of op_riprel
	when swapping op_index.  Break when the RIP relative address
	is printed.
	(OP_E): Properly handle RIP relative addressing and print the
	explicit zero displacement for Intel mode.
 2007-04-26 18:15:47 +00:00
Alan Modra
eddc20adcb bfd/ 
* sysdep.h: Include config.h first.
	Many files: Include sysdep.h before bfd.h.
	* Makefile.am: Run "make dep-am".
	* Makefile.in: Regenerate.
binutils/
	* bucumm.h: Split off host dependencies to..
	* sysdep.h: ..here.
	Many files: Include sysdep.h.  Remove duplicate headers and reorder.
	* Makefile.am: Run "make dep-am".
	* Makefile.in: Regenerate.
ld/
	Many files: Include sysdep.h first.  Remove duplicate headers.
	* Makefile.am: Run "make dep-am".
	* Makefile.in: Regenerate.
opcodes/
	* Makefile.am: Run "make dep-am".
	* Makefile.in: Regenerate.
	* ns32k-dis.c: Include sysdep.h first.
 2007-04-26 14:58:51 +00:00
Alan Modra
3db64b0092 bfd/ 
Many files: Include sysdep.h before bfd.h.
	* Makefile.am: Run "make dep-am".
	* Makefile.in: Regenerate.
binutils/
	* bucumm.h: Split off host dependencies to..
	* sysdep.h: ..here.
	Many files: Include sysdep.h.  Remove duplicate headers and reorder.
	* Makefile.am: Run "make dep-am".
	* Makefile.in: Regenerate.
ld/
	Many files: Include sysdep.h first.  Remove duplicate headers.
	* Makefile.am: Run "make dep-am".
	* Makefile.in: Regenerate.
opcodes/
	* Makefile.am: Run "make dep-am".
	* Makefile.in: Regenerate.
	* ns32k-dis.c: Include sysdep.h first.
 2007-04-26 14:47:00 +00:00
Martin Schwidefsky
dacc8b01fd 2007-04-24 Andreas Krebbel <krebbel1@de.ibm.com> 
* opcodes/s390-opc.c (MASK_SSF_RRDRD): Fourth nybble belongs to the
	opcode.
	* opcodes/s390-opc.txt (pfpo, ectg, csst): New z9-ec instructions added.


2007-04-24  Andreas Krebbel  <krebbel1@de.ibm.com>

	* gas/s390/zarch-z9-ec.d: Add pfpo, ectg and csst.
	* gas/s390/zarch-z9-ec.s: Likewise.
 2007-04-24 14:49:47 +00:00
Nick Clifton
fbb9230130 Fix compile time warning (at -O3 with gcc 4.1.2) 2007-04-24 13:21:32 +00:00
Alan Modra
4c2739571c * cgen-types.h: Include bfd_stdint.h, not stdint.h. 
* Makefile.am: Run "make dep-am".
	* Makefile.in: Regenerate.
 2007-04-24 04:07:03 +00:00
Nathan Sidwell
9a2e615a9f gas/testsuite/ 
* gas/m68k/br-isaa.s: New.
	* gas/m68k/br-isaa.d: New.
	* gas/m68k/br-isab.s: New.
	* gas/m68k/br-isab.d: New.
	* gas/m68k/br-isac.s: New.
	* gas/m68k/br-isac.d: New.
	* gas/m68k/all.exp: Adjust.

	gas/
	* config/tc-m68k.c (mcf54455_ctrl): New.
	(HAVE_LONG_DISP, HAVE_LONG_CALL, HAVE_LONG_COND): New.
	(m68k_archs): Add isac.
	(m68k_cpus): Add 54455 family.
	(m68k_ip): Split Bg into Bb, Bs, Bg.
	(m68k_elf_final_processing): Add ISA_C.
	* doc/c-m68k.texi (M680x0 Options): Add isac.

	include/opcode/
	* m68k.h (mcfisa_c): New.
	(mcfusp, mcf_mask): Adjust.

	bfd/
	* archures.c (bfd_mach_mcf_isa_c, bfd_mach_mcf_isa_c_mac,
	bfd_mach_mcf_isa_c_emac): New.
	* elf32-m68k.c (ISAC_PLT_ENTRY_SIZE, elf_isac_plt0_entry,
	elf_isac_plt_entry, elf_isac_plt_info): New.
	(elf32_m68k_object_p): Add ISA_C.
	(elf32_m68k_print_private_bfd_data): Print ISA_C.
	(elf32_m68k_get_plt_info): Detect ISA_C.
	* cpu-m68k.c (arch_info): Add ISAC.
	(m68k_arch_features): Likewise,
	(bfd_m68k_compatible): ISAs B & C are not compatible.

	opcodes/
	* m68k-opc.c: Mark mcfisa_c instructions.
 2007-04-23 07:51:33 +00:00
Richard Earnshaw
37b37b2d7a * arm-dis.c (arm_opcodes): Disassemble to unified syntax. 
(thumb_opcodes): Add missing white space in adr.
	(arm_decode_shift): New parameter, print_shift.  Only decode the
	shift parameter if set.  Adjust callers.
	(print_insn_arm): Support for operand type q with no shift decode.
 2007-04-21 19:44:09 +00:00
Alan Modra
db55703487 gas/ 
* expr.c (expr): Assert on rankarg, not rank which can be unsigned.
	* read.c (read_a_source_file): Remove buffer_limit[-1] assertion.
	Don't skip over NUL char.
	(pseudo_set): Set X_op for registers to O_register.
	* symbols.c (symbol_clone): Remove assertion that sym is defined.
	(resolve_symbol_value): Resolve O_register symbols.
	* config/tc-i386.c (parse_real_register): Don't use i386_float_regtab.
	Instead find st(0) by hash lookup.
	* config/tc-ppc.c (ppc_macro): Warning fix.
opcodes/
	* i386-opc.c (i386_float_regtab, i386_float_regtab_size): Delete.
	Move contents to..
	(i386_regtab): ..here.
	* i386-opc.h (i386_float_regtab, i386_float_regtab_size): Delete.
 2007-04-21 06:54:57 +00:00
Alan Modra
717bbdf181 * ppc-opc.c (powerpc_operands): Delete duplicate entries. 
(BA_MASK, FXM_MASK, STRM_MASK, VA_MASK, VB_MASK, VC_MASK): Delete.
	(VD_MASK, WS_MASK, MTMSRD_L, XRT_L): Delete.
	(powerpc_opcodes): Replace uses of MTMSRD_L and XRT_L.
 2007-04-21 05:14:21 +00:00
Nathan Sidwell
7833670643 gas/ 
* config/m68k-parse.h (RAMBAR_ALT): New.
	* config/tc-m68k.c (mcf5206_ctrl, mcf5307_ctrl): New.
	(mcf_ctrl, mcf5208_ctrl, mcf5210a_ctrl, mcf5213_ctrl, mcf52235_ctrl,
	mcf5225_ctrl, mcf5235_ctrl, mcf5271_ctrl, mcf5275_ctrl,
	mcf5282_ctrl, mcf5329_ctrl, mcf5373_ctrl, mcfv4e_ctrl,
	mcf5475_ctrl, mcf5485_ctrl): Add RAMBAR synonym for
	RAMBAR1.
	(mcf5272_ctrl): Add RAMBAR0, replace add RAMBAR with RAMBAR_ALT.
	(m68k_cpus): Adjust 5206, 5206e & 5307 entries.
	(m68k_ip) <Case J>: Detect when RAMBAR_ALT should be used.  Add it
	to control register mapping.

	gas/testsuite/
	* gas/m68k/ctrl-1.d, gas/m68k/ctrl-1.s: New.
	* gas/m68k/ctrl-2.d, gas/m68k/ctrl-2.s: New.
	* gas/m68k/all.exp: Add them.

	opcodes/
	* m68k-dis.c (print_insn_arg): Show c04 as rambar0 and c05 as
	rambar1.
 2007-04-20 14:09:00 +00:00
Alan Modra
b84bf58af1 include/opcode/ 
* ppc.h (struct powerpc_operand): Replace "bits" with "bitm".
	(num_powerpc_operands): Declare.
	(PPC_OPERAND_SIGNED et al): Redefine as hex.
	(PPC_OPERAND_PLUS1): Define.
opcodes/
	* ppc-dis.c (print_insn_powerpc): Adjust for struct powerpc_operand
	change.
	* ppc-opc.c (powerpc_operands): Replace bit count with bit mask
	in all entries.  Add PPC_OPERAND_SIGNED to DE entry.  Remove
	references to following deleted functions.
	(insert_bd, extract_bd, insert_dq, extract_dq): Delete.
	(insert_ds, extract_ds, insert_de, extract_de): Delete.
	(insert_des, extract_des, insert_li, extract_li): Delete.
	(insert_nb, insert_rsq, insert_rtq, insert_ev2, extract_ev2): Delete.
	(insert_ev4, extract_ev4, insert_ev8, extract_ev8): Delete.
	(num_powerpc_operands): New constant.
	(XSPRG_MASK): Remove entire SPRG field.
	(powerpc_opcodes <bcctre, bcctrel>): Use XLBB_MASK not XLYBB_MASK.
gas/
	* messages.c (as_internal_value_out_of_range): Extend to report
	errors for values with invalid low bits set.
	* config/tc-ppc.c (ppc_setup_opcodes): Check powerpc_operands bitm
	fields.  Check that operands and opcode fields are disjoint.
	(ppc_insert_operand): Check operands using mask rather than bit
	count.   Check low bits too.  Handle PPC_OPERAND_PLUS1.  Adjust
	insertion code.
	(md_apply_fix): Adjust for struct powerpc_operand change.
 2007-04-20 12:25:15 +00:00
Alan Modra
0bbdef9222 * ppc-opc.c (DCM, DGM, TE, RMC, R, SP, S): Correct shift. 
(Z2_MASK): Define.
	(powerpc_opcodes): Use Z2_MASK in all insns taking RMC operand.
 2007-04-20 10:24:37 +00:00
Richard Earnshaw
86ad2a1353 * arm-dis.c (print_insn): Only look for a mapping symbol in the section 
being disassembled.
 2007-04-20 00:00:21 +00:00
H.J. Lu
f6fdceb738 Correct SSE4.2 ChangeLog entry. 2007-04-19 17:08:56 +00:00
Alan Modra
a33e055d81 .. 2007-04-19 10:52:48 +00:00
Alan Modra
d10f054912 * Makefile.am: Run "make dep-am". 
* Makefile.in: Regenerate.
	* po/POTFILES.in: Regenerate.
 2007-04-19 10:47:26 +00:00
Alan Modra
360b160092 * ppc-opc.c (powerpc_opcodes): Add cctpl, cctpm, cctph, db8cyc, 
db10cyc, db12cyc, db16cyc.
 2007-04-19 01:39:31 +00:00
Alan Modra
b20ae55eff * ppc-opc.c (powerpc_opcodes): Recognize three-operand tlbsxe. 2007-04-18 23:57:01 +00:00
H.J. Lu
381d071fc5 gas/ 
2007-04-18  H.J. Lu <hongjiu.lu@intel.com>

	* config/tc-i386.c (cpu_arch): Add .sse4.2 and .sse4.
	(match_template): Handle operand size for crc32 in SSE4.2.
	(process_suffix): Handle operand type for crc32 in SSE4.2.
	(output_insn): Support SSE4.2.

gas/testsuite/

2007-04-18  H.J. Lu <hongjiu.lu@intel.com>

	* gas/i386/i386.exp: Add sse4.2 and x86-64-sse4.2.

	* gas/i386/sse4_2.d: New file.
	* gas/i386/sse4_2.s: Likewise.
	* gas/i386/x86-64-sse4_2.d: Likewise.
	* gas/i386/x86-64-sse4_2.s: Likewise.

opcodes/

2007-04-18  H.J. Lu <hongjiu.lu@intel.com>

	* i386-dis.c (CRC32_Fixup): New.
	(PREGRP85, PREGRP86, PREGRP87, PREGRP88, PREGRP89, PREGRP90,
	 PREGRP91): New.
	(threebyte_0x38_uses_DATA_prefix): Updated for SSE4.2.
	(threebyte_0x3a_uses_DATA_prefix): Likewise.
	(prefix_user_table): Add PREGRP85, PREGRP86, PREGRP87,
	PREGRP88, PREGRP89, PREGRP90 and PREGRP91.
	(three_byte_table): Likewise.

	* i386-opc.c (i386_optab): Add SSE4.2 opcodes.

	* gas/config/tc-i386.h (CpuSSE4_2): New.
	(CpuSSE4): Likewise.
	(CpuUnknownFlags): Add CpuSSE4_2.
 2007-04-18 16:15:55 +00:00
H.J. Lu
42903f7f59 gas/ 
2007-04-18  H.J. Lu <hongjiu.lu@intel.com>

	* config/tc-i386.c (cpu_arch): Add .sse4.1.
	(process_operands): Adjust implicit operand for blendvpd,
	blendvps and pblendvb in SSE4.1.
	(output_insn): Support SSE4.1.

gas/testsuite/

2007-04-18  H.J. Lu <hongjiu.lu@intel.com>

	* gas/i386/i386.exp: Add sse4.1 and x86-64-sse4.1.

	* gas/i386/sse4_1.d: New file.
	* gas/i386/sse4_1.s: Likewise.
	* gas/i386/x86-64-sse4_1.d: Likewise.
	* gas/i386/x86-64-sse4_1.s: Likewise.

opcodes/

2007-04-18  H.J. Lu <hongjiu.lu@intel.com>

	* i386-dis.c (XMM_Fixup): New.
	(Edqb): New.
	(Edqd): New.
	(XMM0): New.
	(dqb_mode): New.
	(dqd_mode): New.
	(PREGRP39 ... PREGRP85): New.
	(threebyte_0x38_uses_DATA_prefix): Updated for SSE4.
	(threebyte_0x3a_uses_DATA_prefix): Likewise.
	(prefix_user_table): Add PREGRP39 ... PREGRP85.
	(three_byte_table): Likewise.
	(putop): Handle 'K'.
	(intel_operand_size): Handle dqb_mode, dqd_mode):
	(OP_E): Likewise.
	(OP_G): Likewise.

	* i386-opc.c (i386_optab): Add SSE4.1 opcodes.

	* i386-opc.h (CpuSSE4_1): New.
	(CpuUnknownFlags): Add CpuSSE4_1.
	(regKludge): Update comment.
 2007-04-18 16:13:15 +00:00
Daniel Jacobowitz
ee5c21a00e 2007-04-18 Matthias Klose <doko@ubuntu.com> 
* Makefile.am (libbfd_la_LDFLAGS): Use bfd soversion.
	(bfdver.h): Use the date in non-release builds for the soversion.
	* Makefile.in: Regenerate.

2007-04-18  Matthias Klose  <doko@ubuntu.com>

	* Makefile.am (libopcodes_la_LDFLAGS): Use bfd soversion.
	* Makefile.in: Regenerate.
 2007-04-18 12:14:50 +00:00
Steve Ellcey
b7d19ba641 * Makefile.am: Add ACLOCAL_AMFLAGS. 
* Makefile.in: Regenerate.
 2007-04-14 20:45:09 +00:00
H.J. Lu
6e26e51a85 Remove trailing white spaces. 2007-04-13 21:59:35 +00:00
H.J. Lu
246c51aaae 2007-04-13 H.J. Lu <hongjiu.lu@intel.com> 
* i386-dis.c: Remove trailing white spaces.
 2007-04-13 21:57:21 +00:00
H.J. Lu
7967e09e27 2007-04-11 H.J. Lu <hongjiu.lu@intel.com> 
PR binutils/4333
	* i386-dis.c (GRP1a): New.
	(GRP1b ... GRPPADLCK2): Update index.
	(dis386): Use GRP1a for entry 0x8f.
	(mod, rm, reg): Removed. Replaced by ...
	(modrm): This.
	(grps): Add GRP1a.
 2007-04-11 21:56:25 +00:00
Kazu Hirata
56dc1f8ac3 * m68k-dis.c (print_insn_m68k): Restore info->fprintf_func and 
info->print_address_func if longjmp is called.
 2007-04-09 17:09:56 +00:00
DJ Delorie
144f4bc66d * m32c.cpu (Imm-8-s4n): Fix print hook. 
(Lab-24-8, Lab-32-8, Lab-40-8): Fix.
(arith-jnz-imm4-dst-defn): Make relaxable.
(arith-jnz16-imm4-dst-defn): Fix encodings.

* m32c-desc.c: Regenerate.
* m32c-dis.c: Regenerate.
* m32c-opc.c: Regenerate.

* config/tc-m32c.c (rl_for, relaxable): Protect argument.
(md_relax_table): Add entries for ADJNZ macros.
(M32C_Macros): Add ADJNZ macros.
(subtype_mappings): Add entries for ADJNZ macros.
(insn_to_subtype): Check for adjnz and sbjnz insns.
(md_estimate_size_before_relax): Pass insn to insn_to_subtype.
(md_convert_frag): Convert adjnz and sbjnz.
 2007-03-29 23:56:39 +00:00
H.J. Lu
e72cf3ec8e gas/ 
2007-03-28  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (build_modrm_byte): For instructions with 2
	register operands, encode destination in i.rm.regmem if its
	RegMem bit is set.

opcodes/

2007-03-28  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.c (i386_optab): Change InvMem to RegMem for mov and
	movq.  Remove InvMem from sldt, smsw and str.

	* i386-opc.h (InvMem): Renamed to ...
	(RegMem): Update comments.
	(AnyMem): Remove InvMem.
 2007-03-29 04:27:54 +00:00
H.J. Lu
831480e942 Fix year. 2007-03-27 22:45:19 +00:00
Paul Brook
b74ed8f52a 2006-03-27 Paul Brook <paul@codesourcery.com> 
opcodes/
	* arm-dis.c (thumb_opcodes): Add entry for undefined insns (0xbe??).
 2007-03-27 21:09:53 +00:00
Paul Brook
4146fd53c0 2007-03-24 Paul Brook <paul@codesourcery.com> 
opcodes/
	* arm-dis.c (coprocessor_opcodes): Remove superfluous 0x.
	(print_insn_coprocessor): Handle %<bitfield>x.
 2007-03-24 02:51:28 +00:00
Paul Brook
b67020158a 2007-03-24 Paul Brook <paul@codesourcery.com> 
Mark Shinwell  <shinwell@codesourcery.com>

	gas/
	* config/tc-arm.c (operand_parse_code): Add OP_oRRw.
	(parse_operands): Don't expect comma if first operand missing.
	Handle OP_oRRw.
	(do_srs): Encode register number, checking it is r13.  Update comment.
	(insns): Update SRS entries to take a register.

	gas/testsuite/
	* gas/arm/archv6.s: Add new SRS tests.
	* gas/arm/archv6.d: Update expected output.
	* gas/arm/thumb32.s: Add new SRS tests.
	* gas/arm/thumb32.d: Update expected output.
	* gas/arm/srs-t2.d: New.
	* gas/arm/srs-t2.l: New.
	* gas/arm/srs-t2.s: New.
	* gas/arm/srs-arm.d: New.
	* gas/arm/srs-arm.l: New.
	* gas/arm/srs-arm.s: New.

	opcodes/
	* arm-dis.c (arm_opcodes): Print SRS base register.
 2007-03-24 01:29:00 +00:00
H.J. Lu
0003779b5d gas/ 
2003-03-23  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (md_begin): Allow '.' in mnemonic.

gas/testsuite/

2003-03-23  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/rex.s: Add tests for rex.WRXB.
	* gas/i386/rex.d: Updated.

	* gas/i386/rex.d: Replace rex64XYZ with rex.WRXB.
	* gas/i386/x86-64-io-intel.d : Likewise.
	* gas/i386/x86-64-io-suffix.d: Likewise.
	* gas/i386/x86-64-io.d: Likewise.
	* gas/i386/x86-64-opcode.d: Likewise.

opcodes/

2003-03-23  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (prefix_name): Replace rex64XYZ with rex.WRXB.

	* i386-opc.c (i386_optab): Add rex.wrxb.
 2007-03-23 16:17:21 +00:00
H.J. Lu
161a04f630 gas/ 
2003-03-21  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c: Replace REX_MODE64, REX_EXTX, REX_EXTY
	and REX_EXTZ with REX_W, REX_R, REX_X and REX_B respectively.

include/opcode/

2003-03-21  H.J. Lu  <hongjiu.lu@intel.com>

	* i386.h (REX_MODE64): Renamed to ...
	(REX_W): This.
	(REX_EXTX): Renamed to ...
	(REX_R): This.
	(REX_EXTY): Renamed to ...
	(REX_X): This.
	(REX_EXTZ): Renamed to ...
	(REX_B): This.

opcodes/

2003-03-21  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (REX_MODE64): Remove definition.
	(REX_EXTX): Likewise.
	(REX_EXTY): Likewise.
	(REX_EXTZ): Likewise.
	(USED_REX): Use REX_OPCODE instead of 0x40.
	Replace REX_MODE64, REX_EXTX, REX_EXTY and REX_EXTZ with REX_W,
	REX_R, REX_X and REX_B respectively.
 2007-03-21 21:23:44 +00:00
H.J. Lu
8b38ad713b gas/ 
2003-03-21  H.J. Lu  <hongjiu.lu@intel.com>

	PR binutils/4218
	* config/tc-i386.c (match_template): Properly handle 64bit mode
	"xchg %eax, %eax".

gas/testsuite/

2003-03-21  H.J. Lu  <hongjiu.lu@intel.com>

	PR binutils/4218
	* gas/i386/nops.s: Add testcases for nop r/m.
	* gas/i386/x86-64-nops.s: Likewise.

	* gas/i386/x86-64-opcode.s: Add testcases for xchg with %ax,
	%eax and %rax.

	* gas/i386/nops.d: Updated.
	* gas/i386/x86-64-nops.d: Likewise.
	* gas/i386/x86-64-opcode.d: Likewise.

opcodes/

2003-03-21  H.J. Lu  <hongjiu.lu@intel.com>

	PR binutils/4218
	* i386-dis.c (PREGRP38): New.
	(dis386): Use PREGRP38 for 0x90.
	(prefix_user_table): Add PREGRP38.
	(print_insn): Set uses_REPZ_prefix to 1 for pause.
	(NOP_Fixup1): Properly handle REX bits.
	(NOP_Fixup2): Likewise.

	* i386-opc.c (i386_optab): Allow %eax with xchg in 64bit.
	Allow register with nop.
 2007-03-21 20:45:14 +00:00
DJ Delorie
75b06e7b7a * m32c.cpu (f-dsp-40-u20, f-dsp-48-u20, Dsp-40-u20, Dsp-40-u20, 
mem20): New.
(src16-16-20-An-relative-*): New.
(dst16-*-20-An-relative-*): New.
(dst16-16-16sa-*): New
(dst16-16-16ar-*): New
(dst32-16-16sa-Unprefixed-*): New
(jsri): Fix operands.
(setzx): Fix encoding.

* m32c-asm.c: Regenerate.
* m32c-desc.c: Regenerate.
* m32c-desc.h: Regenerate.
* m32c-dis.h: Regenerate.
* m32c-ibld.c: Regenerate.
* m32c-opc.c: Regenerate.
* m32c-opc.h: Regenerate.
 2007-03-21 02:53:50 +00:00
H.J. Lu
c3fe08facb gas/ 
2007-03-15  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (md_begin): Use i386_regtab_size to scan
	i386_regtab.
	(parse_register): Use i386_regtab_size instead of ARRAY_SIZE
	on i386_regtab.

opcodes/

2007-03-15  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.c: Include "libiberty.h".
	(i386_regtab): Remove the last entry.
	(i386_regtab_size): New.
	(i386_float_regtab_size): Likewise.

	* i386-opc.h (i386_regtab_size): New.
	(i386_float_regtab_size): Likewise.
 2007-03-15 17:30:31 +00:00
H.J. Lu
0b1cf022c8 gas/ 
2007-03-15  H.J. Lu  <hongjiu.lu@intel.com>

	* Makefile.am: Run "make dep-am".
	* Makefile.in: Regenerated.

	* config/tc-i386.c: Include "opcodes/i386-opc.h" instead of
	"opcode/i386.h".
	(md_begin): Check reg_name != NULL for the last entry in
	i386_regtab.

	* config/tc-i386.h: Move many entries to opcode/i386.h and
	opcodes/i386-opc.h.

	* configure.in (need_opcodes): Set true for i386.
	* configure: Regenerated.

include/opcode/

2007-03-15  H.J. Lu  <hongjiu.lu@intel.com>

	* i386.h: Add entries from config/tc-i386.h and move tables
	to opcodes/i386-opc.h.

opcodes/

2007-03-15  H.J. Lu  <hongjiu.lu@intel.com>

	* Makefile.am (CFILES): Add i386-opc.c.
	(ALL_MACHINES): Add i386-opc.lo.
	Run "make dep-am".
	* Makefile.in: Regenerated.

	* configure.in: Add i386-opc.lo for bfd_i386_arch.
	* configure: Regenerated.

	* i386-dis.c: Include "opcode/i386.h".
	(MAXLEN): Renamed to MAX_MNEM_SIZE. Remove definition.
	(FWAIT_OPCODE): Remove definition.
	(UNIXWARE_COMPAT): Renamed to SYSV386_COMPAT. Remove definition.
	(MAX_OPERANDS): Remove definition.

	* i386-opc.c: New file.
	* i386-opc.h: Likewise.
 2007-03-15 14:31:24 +00:00
H.J. Lu
56eced12bf 2007-03-15 H.J. Lu <hongjiu.lu@intel.com> 
* Makefile.in: Regenerated.
 2007-03-15 14:20:32 +00:00
H.J. Lu
6f74c397de 2007-03-09 H.J. Lu <hongjiu.lu@intel.com> 
* i386-dis.c (OP_Rd): Renamed to ...
	(OP_R): This.
	(Rd): Updated.
	(Rm): Likewise.
 2007-03-09 23:22:31 +00:00
Alan Modra
1620f33de1 Regenerate. 2007-03-08 11:14:20 +00:00
Alan Modra
a6d04ec4ce * Makefile.am: Run "make dep-am". 
* Makefile.in: Regenerate.
	* po/POTFILES.in: Regenerate.
 2007-03-08 05:36:12 +00:00
Martin Schwidefsky
b5639b37c5 2007-03-06 Andreas Krebbel <krebbel1@de.ibm.com> 
* opcodes/s390-opc.c (INSTR_RRE_FR, INSTR_RRF_F0FF2, INSTR_RRF_F0FR,
	INSTR_RRF_UUFF, INSTR_RRF_0UFF, INSTR_RRF_FFFU,	INSTR_RRR_F0FF): New
	instruction formats added.
	(MASK_RRE_FR, MASK_RRF_F0FF2, MASK_RRF_F0FR, MASK_RRF_UUFF,
	MASK_RRF_0UFF, MASK_RRF_FFFU, MASK_RRR_F0FF): New instruction format
	masks added.
	* opcodes/s390-opc.txt (lpdfr - tgxt): Decimal floating point
	instructions added.
	* opcodes/s390-mkopc.c (s390_opcode_cpu_val): S390_OPCODE_Z9_EC added.
	(main): z9-ec cpu type option added.
	* include/opcode/s390.h (s390_opcode_cpu_val): S390_OPCODE_Z9_EC added.

2007-03-06  Andreas Krebbel  <krebbel1@de.ibm.com>

	* config/tc-s390.c (md_parse_option): z9-ec option added.

2007-03-06  Andreas Krebbel  <krebbel1@de.ibm.com>

	* gas/s390/zarch-z9-ec.d: New file.
	* gas/s390/zarch-z9-ec.s: New file.
	* gas/s390/s390.exp: Run the z9-ec testcases.
 2007-03-06 13:19:08 +00:00
DJ Delorie
b2e818b70d * s390-opc.c (INSTR_SS_L2RDRD): New. 
(MASK_SS_L2RDRD): New.
* s390-opc.txt (pka): Use it.

* gas/s390/esa-g5.s: Adjust for corrected PKA syntax.
* gas/s390/esa-g5.d: Adjust for corrected PKA syntax.
 2007-02-22 21:01:59 +00:00
Thiemo Seufer
8b082fb134 [ gas/ChangeLog ] 
* config/tc-mips.c (mips_set_options, mips_opts, file_ase_dspr2,
	ISA_SUPPORTS_DSPR2_ASE, MIPS_CPU_ASE_DSPR2): Add DSP R2 ASE support.
	(macro_build): Add case '2'.
	(macro): Expand M_BALIGN to nop, packrl.ph or balign.
	(validate_mips_insn): Add support for balign instruction.
	(mips_ip): Handle DSP R2 instructions. Support balign instruction.
	(OPTION_DSPR2, OPTION_NO_DSPR2, OPTION_COMPAT_ARCH_BASE,
	md_parse_option, mips_after_parse_args): Add -mdspr2 and -mno-dspr2
	command line options.
	(s_mipsset): Add support for .set dspr2 and .set nodspr2 directives.
	(md_show_usage): Add -mdspr2 and -mno-dspr2 help output.
	* doc/c-mips.texi, doc/as.texinfo: Document -mdspr2, -mno-dspr2,
	.set dspr2, .set nodspr2.

	[ gas/testsuite/ChangeLog ]
	* gas/mips/mips32-dspr2.s, gas/mips/mips32-dspr2.d: New test for
	DSP R2.
	* gas/mips/mips.exp: Run new test.

	[ include/opcode/Changelog ]
	* mips.h (OP_SH_BP, OP_MASK_BP): Add support for balign instruction.
	(INSN_DSPR2): Add flag for DSP R2 instructions.
	(M_BALIGN): New macro.

	[ opcodes/ChangeLog ]
	* mips-dis.c (mips_arch_choices): Add DSP R2 support.
	(print_insn_args): Add support for balign instruction.
	* mips-opc.c (D33): New shortcut for DSP R2 instructions.
	(mips_builtin_opcodes): Add DSP R2 instructions.

	[ sim/mips/ChangeLog ]
	* Makefile.in (IGEN_INCLUDE): Add dsp2.igen.
	* configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
	Add dsp2 to sim_igen_machine.
	* configure: Regenerate.
	* dsp.igen (do_ph_op): Add MUL support when op = 2.
	(do_ph_mulq): New function to support mulq_rs.ph and mulq_s.ph.
	(mulq_rs.ph): Use do_ph_mulq.
	(MFHI, MFLO, MTHI, MTLO): Move these instructions to mips.igen.
	* mips.igen: Add dsp2 model and include dsp2.igen.
	(MFHI, MFLO, MTHI, MTLO): Extend these instructions for
	for *mips32r2, *mips64r2, *dsp.
	(MADD, MADDU, MSUB, MSUBU, MULT, MULTU): Extend these instructions
	for *mips32r2, *mips64r2, *dsp2.
	* dsp2.igen: New file for MIPS DSP REV 2 ASE.

	[ sim/testsuite/sim/mips/ChangeLog ]
	* basic.exp: Run the dsp2 test.
	* utils-dsp.inc (dspckacc_astio, dspck_tsimm): New macro.
	* mips32-dsp2.s: New test.
 2007-02-20 13:28:56 +00:00
Martin Schwidefsky
929e4d1a15 2007-02-19 Andreas Krebbel <krebbel1@de.ibm.com> 
* s390-opc.c (INSTR_RRF_U0FR, MASK_RRF_U0FR): Removed.
	(INSTR_RRF_U0RF, MASK_RRF_U0RF): Added.
	* s390-opc.txt (cfxbr, cfdbr, cfebr, cgebr, cgdbr, cgxbr, cger, cgdr,
	cgxr, cfxr, cfdr, cfer): Instruction type set to INSTR_RRF_U0RF.

2007-02-19  Andreas Krebbel  <krebbel1@de.ibm.com>

        * gas/s390/esa-g5.d (cfxbr, cfebr, cfdbr): Exchanged floating
	point and fixed point operands.
	* gas/s390/esa-g5.s: Likewise.
	* gas/s390/zarch-z900.d (cfdr, cfer, cfxr, cgdbr, cgebr, cgxbr,
	cgdr, cger, cgxr): Likewise.
	* gas/s390/zarch-z900.s: Likewise.
 2007-02-19 17:46:11 +00:00
Martin Schwidefsky
b8e558488c 2007-02-19 Andreas Krebbel <krebbel1@de.ibm.com> 
* s390-opc.txt ("efpc", "sfpc"): Set to RRE_RR_OPT instruction type.
	* s390-opc.c (s390_operands): Add RO_28 as optional gpr.
	(INSTR_RRE_RR_OPT, MASK_RRE_RR_OPT): New instruction type for efpc
	and sfpc.
 2007-02-19 17:29:37 +00:00
Nick Clifton
af69206070 PR binutils/4045 
* avr-dis.c (comment_start): New variable, contains the prefix to use when
    printing addresses in comments.
  (print_insn_avr): Set comment_start to an empty space if there is no symbol
     table available as the generic address printing code will prefix the
     numeric value of the address with 0x.
 2007-02-16 10:24:48 +00:00
H.J. Lu
d25a0fc5da Remove extra space. 2007-02-13 21:45:27 +00:00
H.J. Lu
4efba78cb4 Remove trailing zeros in array initializers. 2007-02-13 21:29:31 +00:00
H.J. Lu
6ab3cda41f Add a space before `}' in struct initializer. 2007-02-13 21:18:39 +00:00
H.J. Lu
ce518a5f27 2007-02-13 H.J. Lu <hongjiu.lu@intel.com> 
* i386-dis.c: Updated to use an array of MAX_OPERANDS operands
	 in struct dis386.
 2007-02-13 20:58:17 +00:00
Dave Brolley
8c9c183d15 Fix entries for MeP submission. 2007-02-06 19:51:33 +00:00
Dave Brolley
bd2f2e55ad 2007-02-05 Dave Brolley <brolley@redhat.com> 
* mep-*: New support for Toshiba Media Processor (MeP).
        * Makefile.am: Add support for MeP.
        * configure.in: Likewise.
        * disassemble.c: Likewise.
        * Makefile.in: Regenerated.
        * configure: Regenerated.
 2007-02-05 20:04:22 +00:00
H.J. Lu
eb7834a66d Fix year in entries. 2007-02-05 19:37:12 +00:00
H.J. Lu
65ca155d27 ld/testsuite/ 
2076-02-05  H.J. Lu  <hongjiu.lu@intel.com>

	* ld-i386/pcrel16.d: Undo the last change.
	* ld-x86-64/pcrel16.d: Likewise.

opcodes/

2076-02-05  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (OP_J): Undo the last change. Properly handle 64K
	wrap around within the same segment in 16bit mode.
 2007-02-05 18:22:49 +00:00
H.J. Lu
6f38fab3aa Cosmetic change. 2007-02-03 00:55:42 +00:00
H.J. Lu
206717e8e5 ld/testsuite/ 
2076-02-02  H.J. Lu  <hongjiu.lu@intel.com>

	* ld-i386/pcrel16.d: Updated.
	* ld-x86-64/pcrel16.d: Likewise.

opcodes/

2076-02-02  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (OP_J): Mask to 16bit only if there is a data16
	prefix.
 2007-02-03 00:46:22 +00:00
H.J. Lu
c4f5c3d74c 2007-02-02 H.J. Lu <hongjiu.lu@intel.com> 
* avr-dis.c (avr_operand): Correct PR number in comment.
 2007-02-02 22:54:50 +00:00
H.J. Lu
fc523535b3 Fix typos in year. 2007-02-02 22:15:52 +00:00
H.J. Lu
f59a29b99f binutils/ 
2076-02-02  H.J. Lu  <hongjiu.lu@intel.com>

	* doc/binutils.texi (objdump): Document the new addr64 option
	for i386 disassembler.

include/

2076-02-02  H.J. Lu  <hongjiu.lu@intel.com>

	* dis-asm.h (print_i386_disassembler_options): New.

opcodes/

2076-02-02  H.J. Lu  <hongjiu.lu@intel.com>

	* disassemble.c (disassembler_usage): Call
	print_i386_disassembler_options for i386 disassembler.

	* i386-dis.c (print_i386_disassembler_options): New.
	(print_insn): Support the new addr64 option.
 2007-02-02 15:27:04 +00:00
Nick Clifton
64a3a6fcf9 * ppc-dis.c (powerpc_dialect): Handle ppc440. 
* ppc-dis.c (print_ppc_disassembler_options): Note the -M440 can be used.
 2007-02-02 12:37:41 +00:00
Alan Modra
ba4e851b3a * ppc-opc.c (insert_bdm): -Many comment. 
(valid_bo): Add "extract" param.  Accept both powerpc and power4
	BO fields when disassembling with -Many.
	(insert_bo, extract_bo, insert_boe, extract_boe): Adjust valid_bo call.
 2007-02-02 01:24:43 +00:00
H.J. Lu
10a2343ede Move 2006 ChangeLog entries to ChangeLog-2006. 2007-01-09 14:29:31 +00:00
Kazu Hirata
3bdcfdf41f bfd/ 
* archures.c (bfd_mach_cpu32_fido): Rename to bfd_mach_fido.
	* bfd-in2.h: Regenerate.
	* cpu-m68k.c (arch_info_struct): Use bfd_mach_fido instead of
	bfd_mach_cpu32_fido.
	(m68k_arch_features): Use fido_a instead of cpu32.
	(bfd_m68k_compatible): Reject the combination of Fido and
	ColdFire.  Accept the combination of CPU32 and Fido with a
	warning.
	* elf32-m68k.c (elf32_m68k_object_p,
	elf32_m68k_merge_private_bfd_data,
	elf32_m68k_print_private_bfd_data): Treat Fido as an
	architecture by itself.

binutils/
	* readelf.c (get_machine_flags): Treat Fido as an architecture
	by itself.

gas/
	* config/tc-m68k.c (m68k_archs, m68k_cpus): Treat Fido as an
	architecture by itself.
	(m68k_ip): Don't issue a warning for tbl instructions on fido.
	(m68k_elf_final_processing): Treat Fido as an architecture by
	itself.

include/elf/
	* m68k.h (EF_M68K_FIDO): New.
	(EF_M68K_ARCH_MASK): OR EF_M68K_FIDO.
	(EF_M68K_CPU32_FIDO_A, EF_M68K_CPU32_MASK): Remove.

include/opcode/
	* m68k.h (m68010up): OR fido_a.

opcodes/
	* m68k-opc.c (m68k_opcodes): Replace cpu32 with
	cpu32 | fido_a except on tbl instructions.
 2007-01-08 18:42:37 +00:00
Paul Brook
a028a6f534 2007-01-04 Paul Brook <paul@codesourcery.com> 
gas/
	* config/tc-arm.c (do_cpsi): Set mmod bit for 2 argument form.
	gas/testsuite/
	* gas/arm/archv6.s: Add more cpsie tests.
	* gas/arm/archv6.d: Ditto.
	opcodes/
	* arm-dis.c (arm_opcodes): Fix cpsie and cpsid entries.
 2007-01-04 20:08:36 +00:00
Andreas Schwab
baee4c9eb0 gas/testsuite/: 
* gas/m68k/cpu32.[sd]: New test.
	* gas/m68k/all.exp: Run it.

opcodes/:
	* m68k-opc.c: Fix encoding of signed bit in the cpu32 tbls insns.
 2007-01-04 17:14:50 +00:00
Julian Brown
62ac925e42 * arm-dis.c (neon_opcode): Fix disassembly for vshl, vqshl, vrshl, 
vqrshl instructions.
 2007-01-04 15:33:12 +00:00
Kazu Hirata
f7ec513bed gas/ 
* config/m68k-parse.h (m68k_register): Add CAC and MBB.
	* config/tc-m68k.c (fido_ctrl): New.
	(m68k_archs): Use fido_ctrl for -mfidoa.
	(m68k_cpus): Use fido_ctrl on fido-*-*.
	(m68k_ip): Add support for CAC and MBB.
	(init_table): Add CAC and MBB.

opcodes/
	* m68k-dis.c (print_insn_arg): Add support for cac and mbb.
 2006-12-27 07:15:02 +00:00
Kazu Hirata
6bd025df59 * m68k-opc.c (m68k_opcodes): Add sleep and trapx. 2006-12-27 07:10:10 +00:00
H.J. Lu
fb9c77c70e gas/testsuite/ 
2006-12-15  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/x86-64-inval.s: cmpxchg16b needs oword ptr, instead
	of xmmword ptr.
	* gas/i386/x86_64.s: Likewise.
	* gas/i386/x86-64-inval.l: Updated.

opcodes/

2006-12-15  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (o_mode): New for 16-byte operand.
	(intel_operand_size): Generate "OWORD PTR " for o_mode.
	(CMPXCHG8B_Fixup): Set bytemode to o_mode instead of x_mode.
 2006-12-15 13:11:56 +00:00
H.J. Lu
f5804c90c7 gas/testsuite/ 
2006-12-14  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/x86-64-inval.s: Add cmpxchg16b.
	* gas/i386/x86_64.s: Likewise.
	* gas/i386/x86-64-inval.l: Updated.
	* gas/i386/x86_64.d: Likewise.

opcodes/

2006-12-14  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (CMPXCHG8B_Fixup): New.
	(grps): Use CMPXCHG8B_Fixup for cmpxchg8b.
 2006-12-14 20:13:28 +00:00
H.J. Lu
75413a22c6 2006-12-11 H.J. Lu <hongjiu.lu@intel.com> 
* i386-dis.c (Eq): Replaced by ...
	(Mq): New. This.
	(Ma): Defined with OP_M instead of OP_E.
	(grps): Updated cmpxchg8b and vmptrst for Eq -> Mq.
	(OP_M): Added bound, cmpxchg8b and vmptrst to bad modrm list.
 2006-12-11 18:11:13 +00:00
Daniel Jacobowitz
d5fbea21a5 bfd/ 
* configure.in: Define GENINSRC_NEVER.
	* doc/Makefile.am (bfd.info): Remove srcdir prefix.
	(MAINTAINERCLEANFILES): Add info file.
	(DISTCLEANFILES): Pretend to add info file.
	* po/Make-in (.po.gmo): Put gmo files in objdir.
	* configure, Makefile.in, doc/Makefile.in: Regenerated.
binutils/
	* configure.in: Define GENINSRC_NEVER.
	* doc/Makefile.am (MAINTAINERCLEANFILES): Add info file.
	(DISTCLEANFILES): Pretend to add info file.
	* po/Make-in (.po.gmo): Put gmo files in objdir.
	* configure, Makefile.in, doc/Makefile.in: Regenerated.
gas/
	* configure.in: Define GENINSRC_NEVER.
	* doc/Makefile.am (as.info): Remove srcdir prefix.
	(MAINTAINERCLEANFILES): Add info file.
	(DISTCLEANFILES): Pretend to add info file.
	* po/Make-in (.po.gmo): Put gmo files in objdir.
	* configure, Makefile.in, doc/Makefile.in: Regenerated.
gprof/
	* configure.in: Define GENINSRC_NEVER.
	* doc/Makefile.am (gprof.info): Remove srcdir prefix.
	(MAINTAINERCLEANFILES): Add info file.
	(DISTCLEANFILES): Pretend to add info file.
	* po/Make-in (.po.gmo): Put gmo files in objdir.
	* configure, Makefile.in: Regenerated.
ld/
	* configure.in: Define GENINSRC_NEVER.
	* doc/Makefile.am (ld.info): Remove srcdir prefix.
	(MAINTAINERCLEANFILES): Add info file.
	(DISTCLEANFILES): Pretend to add info file.
	* po/Make-in (.po.gmo): Put gmo files in objdir.
	* configure, Makefile.in: Regenerated.
opcodes/
	* po/Make-in (.po.gmo): Put gmo files in objdir.
 2006-12-11 15:09:46 +00:00
H.J. Lu
5f754f58d9 2006-12-09 H.J. Lu <hongjiu.lu@intel.com> 
* i386-dis.c (X86_64_1): New.
	(X86_64_2): Likewise.
	(X86_64_3): Likewise.
	(dis386): Replace 0x60, 0x61 and 0x62 entries with x86-64
	tables.
	(x86_64_table): Add entries for 0x60, 0x61 and 0x62.
 2006-12-10 02:50:53 +00:00
H.J. Lu
7f4c972fa6 2006-12-09 H.J. Lu <hongjiu.lu@intel.com> 
* i386-dis.c: Adjust white spaces.
 2006-12-09 21:06:13 +00:00
Jan Beulich
d807a492c6 opcodes/ 
2006-12-04  Jan Beulich  <jbeulich@novell.com>

	* i386-dis.c (OP_J): Update used_prefixes in v_mode.

gas/testsuite/
2006-12-04  Jan Beulich  <jbeulich@novell.com>

	* gas/i386/opcode-intel.d: Fix wrong expectation. Make white space
	expectations more consistent.
 2006-12-04 08:53:29 +00:00
Jan Beulich
ed7841b3f0 opcodes/ 
2006-11-30  Jan Beulich  <jbeulich@novell.com>

	* i386-dis.c (SEG_Fixup): Delete.
	(Sv): Use OP_SEG.
	(putop): New suffix character 'D'.
	(dis386): Use it.
	(grps): Likewise.
	(OP_SEG): Handle bytemode other than w_mode.

gas/testsuite/
2006-11-30  Jan Beulich  <jbeulich@novell.com>

	* gas/i386/intel.d: Adjust.
	* gas/i386/naked.d: Adjust.
	* gas/i386/opcode.d: Adjust.
 2006-12-01 15:17:32 +00:00
Jan Beulich
52fd6d9416 opcodes/ 
2006-11-30  Jan Beulich  <jbeulich@novell.com>

	* i386-dis.c (zAX): New.
	(Xz): New.
	(Yzr): New.
	(z_mode): New.
	(z_mode_ax_reg): New.
	(putop): New suffix character 'G'.
	(dis386): Use it for in, out, ins, and outs.
	(intel_operand_size): Handle z_mode.
	(OP_REG): Delete unreachable case indir_dx_reg.
	(OP_IMREG): Fix Intel syntax output for case indir_dx_reg. Handle
	z_mode_ax_reg.
	(OP_ESreg): Fix Intel syntax operand size handling.
	(OP_DSreg): Likewise.

gas/testsuite/
2006-11-30  Jan Beulich  <jbeulich@novell.com>

	* gas/i386/x86-64-io.[sd]: New.
	* gas/i386/x86-64-io-intel.d: New.
	* gas/i386/x86-64-io-suffix.d: New.
	* gas/i386/i386.exp: Run new tests.
 2006-12-01 15:00:12 +00:00
Jan Beulich
a35ca55aee opcodes/ 
2006-11-30  Jan Beulich  <jbeulich@novell.com>

	* i386-dis.c (dis386): Use 'R' and 'O' for cbw/cwd unconditionally.
	(putop): For 'O' suffix, print 'q' in Intel mode, and mark data prefix
	used. For 'R' and 'W' suffix, simplify and fix Intel mode.

gas/testsuite/
2006-11-30  Jan Beulich  <jbeulich@novell.com>

	* gas/i386/intel.s: Use Intel syntax in Intel syntax test.
	* gas/i386/x86-64-cbw.[sd]: New.
	* gas/i386/x86-64-cbw-intel.d: New.
	* gas/i386/i386.exp: Run new tests.
 2006-12-01 14:56:11 +00:00
Paul Brook
00249aaae7 2006-11-29 Paul Brook <paul@codesourcery.com> 
gas/
	* config/tc-arm.c (do_vfp_sp_const, do_vfp_dp_const): Fix operans
	encoding.

	gas/testsuite/
	* gas/arm/vfpv3-const-conv.s: Improve test coverage.
	* gas/arm/vfpv3-const-conv.d: Adjust expected output.
	* gas/arm/vfp-neon-syntax_t2.d: Ditto.
	* gas/arm/vfp-neon-syntax.d: Ditto.

	opcodes/
	* arm-dis.c (coprocessor_opcodes): Fix bitfields for fconstd/fconstd.
 2006-11-29 16:26:56 +00:00
Daniel Jacobowitz
e821645dee opcodes/ 
* arm-dis.c (last_is_thumb): Delete.
	(enum map_type, last_type): New.
	(print_insn_data): New.
	(get_sym_code_type): Take MAP_TYPE argument.  Check the type of
	the right symbol.  Handle $d.
	(print_insn): Check for mapping symbols even without a normal
	symbol.  Adjust searching.  If $d is found see how much data
	to print.  Handle data.
gas/
	* config/tc-arm.h (md_cons_align): Define.
	(mapping_state): New prototype.
	* config/tc-arm.c (mapping_state): Make global.
gas/testsuite/
	* gas/arm/arm7t.d, gas/arm/neon-ldst-rm.d, gas/arm/thumb2_pool.d,
	gas/arm/tls.d: Update for $d support.
	* gas/arm/mapshort.d, gas/arm/mapshort.s: New test.
	* gas/elf/section2.e-armeabi: Update.
	* gas/elf/section2.e-armelf: New file.
	* gas/elf/elf.exp: Use it.
ld/testsuite/
	* ld-arm/mixed-app.d, ld-arm/tls-app.d, ld-arm/tls-lib.d: Update
	for $d support.
 2006-11-22 17:45:57 +00:00
Nathan Sidwell
869ddf2a18 gas/ 
* config/tc-m68k.c (m68k_ip):  Correct output of cpu aliases.
gas/testsuite/
	* gas/m68k/all.exp: Add mcf-trap.
	* gas/m68k/mcf-trap.[sd]: New.
opcodes/
	* m68k-opc.c (m68k_opcodes): Place trap instructions before set
	conditionals.  Add tpf coldfire instruction as alias for trapf.
 2006-11-16 07:22:25 +00:00
H.J. Lu
d81afd0c00 2006-11-09 H.J. Lu <hongjiu.lu@intel.com> 
* i386-dis.c (print_insn): Check PREFIX_REPNZ before
	PREFIX_DATA when prefix user table is used.
 2006-11-10 03:54:11 +00:00
H.J. Lu
eec0f4ca4c 2006-11-09 H.J. Lu <hongjiu.lu@intel.com> 
* i386-dis.c (twobyte_uses_SSE_prefix): Renamed to ...
	(twobyte_uses_DATA_prefix): This.
	(twobyte_uses_REPNZ_prefix): New.
	(twobyte_uses_REPZ_prefix): Likewise.
	(threebyte_0x38_uses_DATA_prefix): Likewise.
	(threebyte_0x38_uses_REPNZ_prefix): Likewise.
	(threebyte_0x38_uses_REPZ_prefix): Likewise.
	(threebyte_0x3a_uses_DATA_prefix): Likewise.
	(threebyte_0x3a_uses_REPNZ_prefix): Likewise.
	(threebyte_0x3a_uses_REPZ_prefix): Likewise.
	(print_insn): Updated checking usages of DATA/REPNZ/REPZ
	prefixes.
 2006-11-10 02:13:40 +00:00
Alan Modra
a9353e608e * ppc-opc.c: Restore COM to mfcr wrongly removed 2003-07-04. 2006-11-06 00:46:07 +00:00
Nick Clifton
06d2da930d * tc-score.c (do16_rdrs): Handle not! instruction especially. 
* score-opc.h (score_opcodes): Delete modifier '0x'.
* gas/score/rD_rA.d: Correct not! and not.c instruction disassembly.
* gas/score/b.d: Correct b! and b instruction disassembly.
 2006-11-01 10:29:49 +00:00
Paul Brook
2087ad8497 2006-10-30 Paul Brook <paul@codesourcery.com> 
binutils/
	* objdump.c (disassemble_section): Set info->symtab_pos.
	(disassemble_data): Set info->symtab and info->symtab_size.

	include/
	* dis-asm.h (disassemble_info): Add symtab, symtab_pos and
	symtab_size.

	opcodes/
	* arm-dis.c (last_is_thumb, last_mapping_sym, last_mapping_addr): New.
	(get_sym_code_type): New function.
	(print_insn): Search for mapping symbols.
 2006-10-31 20:21:57 +00:00
Nick Clifton
b138abaa40 * tc-score.c (data_op2): Check invalid operands. 
(my_get_expression): Const operand of some instructions can not be symbol in assembly.
  (get_insn_class_from_type): Handle instruction type Insn_internal.
  (do_macro_ldst_label): Modify inst.type.
  (Insn_PIC): Delete.
* score-inst.h (enum score_insn_type): Add Insn_internal.
* tc-score.c (data_op2): The immediate value in lw is 15 bit signed.
* score-dis.c (print_insn): Correct the error code to print correct PCE instruction disassembly.
 2006-10-31 09:54:41 +00:00
Peter Bergner
702f0fb48f 2006-10-26 Ben Elliston <bje@au.ibm.com> 
Anton Blanchard  <anton@samba.org>
	    Peter Bergner  <bergner@vnet.ibm.com>

	* ppc-opc.c (A_L, DCM, DGM, TE, RMC, R, SP, S, SH16, XRT_L, EH,
	AFRALFRC_MASK, Z, ZRC, Z_MASK, XLRT_MASK, XEH_MASK): Define.
	(POWER6): Define.
	(powerpc_opcodes): Extend "lwarx", "ldarx", "dcbf", "fres", "fres.",
	"frsqrtes", "frsqrtes." "fre", "fre.", "frsqrte" and "frsqrte.".
	Add "doze", "nap", "sleep", "rvwinkle", "dcbfl", "prtyw", "prtyd",
	"mfcfar", "cmpb", "lfdpx", "stfdpx", "mtcfar", "mffgpr", "mftgpr",
	"lwzcix", "lhzcix", "lbzcix", "ldcix", "lfiwax", "stwcix", "sthcix",
	"stbcix", "stdcix", "lfdp", "dadd", "dadd.", "dqua", "dqua.", "dmul",
	"dmul.", "drrnd", "drrnd.", "dscli", "dscli.", "dquai", "dquai.",
	"dscri", "dscri.", "drintx", "drintx.", "dcmpo", "dtstex", "dtstdc",
	"dtstdg", "dtstsf", "drintn", "drintn.", "dctdp", "dctdp.", "dctfix",
	"dctfix.", "ddedpd", "ddedpd.", "dxex", "dxex.", "dsub", "dsub.",
	"ddiv", "ddiv.", "dcmpu", "drsp", "drsp.", "dcffix", "dcffix.",
	"denbcd", "denbcd.", "diex", "diex.", "stfdp", "daddq", "daddq.",
	"dquaq", "dquaq.", "fcpsgn", "fcpsgn.", "dmulq", "dmulq.",
	"drrndq", "drrndq.", "dscliq", "dscliq.", "dquaiq", "dquaiq.",
	"dscriq", "dscriq.", "drintxq", "drintxq.", "dcmpoq", "dtstexq",
	"dtstdcq", "dtstdgq", "dtstsfq", "drintnq", "drintnq.",
	"dctqpq", "dctqpq.", "dctfixq", "dctfixq.", "ddedpdq", "ddedpdq.",
	"dxexq", "dxexq.", "dsubq", "dsubq.", "ddivq", "ddivq.", "dcmpuq",
	"drdpq", "drdpq.", "dcffixq", "dcffixq.", "denbcdq", "denbcdq.",
	"diexq" and "diexq." opcodes.
 2006-10-26 17:37:26 +00:00
Daniel Jacobowitz
a3202ebb06 * h8300-dis.c (bfd_h8_disassemble): Add missing consts. 2006-10-26 15:37:21 +00:00
Alan Modra
e9f5312993 New Cell SPU port. 2006-10-25 06:49:21 +00:00
Alan Modra
ede602d7c8 Add powerpc cell support. 2006-10-24 01:27:29 +00:00
Michael Meissner
7918206c55 Fix AMDFAM10 POPCNT instruction 2006-10-23 22:53:29 +00:00
Andrew Stubbs
f3b8f6287b 2006-10-20 Andrew Stubbs <andrew.stubbs@st.com> 
opcodes/

	* sh-dis.c (print_insn_sh): Remove 0x from output to prevent GDB
	duplicating it.

gas/testsuite/

	* gas/sh/pcrel-coff.d: Update patterns (remove 0x on addresses).
	* gas/sh/pcrel-hms.d: Likewise.
	* gas/sh/pcrel.d: Likewise.
	* gas/sh/pcrel2.d: Likewise.
	* gas/sh/pic.d: Likewise.
	* gas/sh/tlsd.d: Likewise.
	* gas/sh/tlsdnopic.d: Likewise.
	* gas/sh/tlsdpic.d: Likewise.
 2006-10-20 14:47:05 +00:00
Dave Brolley
d3f1a42773 2006-10-18 Dave Brolley <brolley@redhat.com> 
* configure.in (BFD_MACHINES): Add cgen-bitset.lo for bfd_sh_arch.
        * configure: Regenerated.
 2006-10-18 18:18:26 +00:00
Alan Modra
3bb0c887b3 Regenerate. 2006-09-29 08:05:35 +00:00
Joseph Myers
2d447fcaa9 bfd/ 
2006-09-26  Mark Shinwell  <shinwell@codesourcery.com>
            Joseph Myers  <joseph@codesourcery.com>
            Ian Lance Taylor  <ian@wasabisystems.com>
            Ben Elliston  <bje@wasabisystems.com>

	* archures.c: Add definition for bfd_mach_arm_iWMMXt2.
	* cpu-arm.c (processors): Add bfd_mach_arm_iWMMXt2.
	(arch_info_struct, bfd_arm_update_notes): Likewise.
	(architectures): Likewise.
	(bfd_arm_merge_machines): Check for iWMMXt2.
	* bfd-in2.h: Rebuild.

gas/
2006-09-26  Mark Shinwell  <shinwell@codesourcery.com>
            Joseph Myers  <joseph@codesourcery.com>
            Ian Lance Taylor  <ian@wasabisystems.com>
            Ben Elliston  <bje@wasabisystems.com>

	* config/tc-arm.c (arm_cext_iwmmxt2): New.
	(enum operand_parse_code): New code OP_RIWR_I32z.
	(parse_operands): Handle OP_RIWR_I32z.
	(do_iwmmxt_wmerge): New function.
	(do_iwmmxt_wldstd): Handle iwmmxt2 case where second operand is
	a register.
	(do_iwmmxt_wrwrwr_or_imm5): New function.
	(insns): Mark instructions as RIWR_I32z as appropriate.
	Also add torvsc<b,h,w>, wabs<b,h,w>, wabsdiff<b,h,w>,
	waddbhus<l,m>, waddhc, waddwc, waddsubhx, wavg4{r}, wmaddu{x,n},
	wmadds{x,n}, wmerge, wmiaxy{n}, wmiawxy{n}, wmul<sm,um>{r},
	wmulw<um,sm,l>{r}, wqmiaxy{n}, wqmulm{r}, wqmulwm{r}, wsubaddhx.
	(md_begin): Handle IWMMXT2.
	(arm_cpus): Add iwmmxt2.
	(arm_extensions): Likewise.
	(arm_archs): Likewise.

gas/testsuite/
2006-09-26  Mark Shinwell  <shinwell@codesourcery.com>
            Joseph Myers  <joseph@codesourcery.com>
            Ian Lance Taylor  <ian@wasabisystems.com>
            Ben Elliston  <bje@wasabisystems.com>

	* gas/arm/iwmmxt2.s: New file.
	* gas/arm/iwmmxt2.d: New file.

include/opcode/
2006-09-26  Mark Shinwell  <shinwell@codesourcery.com>
            Joseph Myers  <joseph@codesourcery.com>
            Ian Lance Taylor  <ian@wasabisystems.com>
            Ben Elliston  <bje@wasabisystems.com>

	* arm.h (ARM_CEXT_IWMMXT2, ARM_ARCH_IWMMXT2): Define.

opcodes/
2006-09-26  Mark Shinwell  <shinwell@codesourcery.com>
            Joseph Myers  <joseph@codesourcery.com>
            Ian Lance Taylor  <ian@wasabisystems.com>
            Ben Elliston  <bje@wasabisystems.com>

	* arm-dis.c (coprocessor_opcodes): The X-qualifier to WMADD may
	only be used with the default multiply-add operation, so if N is
	set, don't bother printing X.  Add new iwmmxt instructions.
	(IWMMXT_INSN_COUNT): Update.
	(iwmmxt_wwssnames): Qualify "wwss" names at index 2, 6, 10 and 14
	with a 'c' suffix.
	(print_insn_coprocessor): Check for iWMMXt2.  Handle format
	specifiers 'r', 'i'.
 2006-09-26 12:04:45 +00:00
H.J. Lu
c4b5fff932 2006-09-24 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com> 
PR binutils/3100
	* i386-dis.c (prefix_user_table): Fix the second operand of
	maskmovdqu instruction to allow only %xmm register instead of
	both %xmm register and memory.
 2006-09-24 17:25:47 +00:00
H.J. Lu
a7a8d8e58e Add PR binutils/3000 to its entry. 2006-09-24 17:13:59 +00:00
H.J. Lu
539e75adb5 gas/ 
2006-09-23  H.J. Lu  <hongjiu.lu@intel.com>

	PR binutils/3235
	* config/tc-i386.c (match_template): Check address size prefix
	to turn Disp64/Disp32/Disp16 operand into Disp32/Disp16/Disp32
	operand.

gas/testsuite/

2006-09-23  H.J. Lu  <hongjiu.lu@intel.com>

	PR binutils/3235
	* gas/i386/addr16.d: New file.
	* gas/i386/addr16.s: Likewise.
	* gas/i386/addr32.d: Likewise.
	* gas/i386/addr32.s: Likewise.

	* gas/i386/i386.exp: Add "addr16" and "addr32".

	* gas/i386/x86-64-addr32.s: Add tests for "add32 mov".
	* gas/i386/x86-64-addr32.d: Updated.

opcodes/

2006-09-23  H.J. Lu  <hongjiu.lu@intel.com>

	PR binutils/3235
	* i386-dis.c (OP_OFF64): Get 32bit offset if there is an
	address size prefix.
 2006-09-23 23:10:14 +00:00
Nick Clifton
1c0d3aa6ae Add support for Score target. 2006-09-16 23:51:50 +00:00
Nick Clifton
0112cd268b * bfd-in.h (STRING_AND_COMMA): New macro. Takes one constant string as its 
argument and emits the string followed by a comma and then the length of
  the string.
  (CONST_STRNEQ): New macro.  Checks to see if a variable string has a constant
  string as its initial characters.
  (CONST_STRNCPY): New macro.  Copies a constant string to the start of a
  variable string.
* bfd-in2.h: Regenerate.
* <remainign files>: Make use of the new macros.
 2006-09-16 18:12:17 +00:00
Paul Brook
428e3f1f4e 2006-09-04 Paul Brook <paul@codesourcery.com> 
gas/
	* config/tc-arm.c (do_neon_dyadic_if_i): Remove.
	(do_neon_dyadic_if_i_d): Avoid setting U bit.
	(do_neon_mac_maybe_scalar): Ditto.
	(do_neon_dyadic_narrow): Force operand type to NT_integer.
	(insns): Remove out of date comments.

	gas/testsuite/
	* gas/arm/neon-cov.s: Test .u and .s aliases for .i suffixes.
	* gas/arm/neon-cov.d: Adjust expected output.

	opcodes/
	* arm-dis.c (neon_opcode): Fix suffix on VMOVN.
 2006-09-05 14:07:22 +00:00
H.J. Lu
96fbad7318 2006-08-23 H.J. Lu <hongjiu.lu@intel.com> 
* i386-dis.c (three_byte_table): Expand to 256 elements.
 2006-08-23 14:48:49 +00:00
Michael Meissner
4d9567e059 Fix bug 3000 2006-08-14 23:45:59 +00:00
Richard Sandiford
777b13b958 opcodes/ 
* m68k-opc.c (m68k_opcodes): Fix operand specificer in the Coldfire
	"fdaddl" entry.

gas/testsuite/
	* gas/m68k/mcf-fpu.s: Add tests for all addressing modes.
	* gas/m68k/mcf-fpu.d: Update accordingly.
 2006-07-29 08:55:38 +00:00
Paul Brook
401a54cf6e 2006-07-19 Paul Brook <paul@codesourcery.com> 
gas/
	* config/tc-arm.c (insns): Fix rbit Arm opcode.
	gas/testsuite/
	* gas/arm/archv6t2.d: Adjust expected output for rbit.
	opcodes/
	* armd-dis.c (arm_opcodes): Fix rbit opcode.
 2006-07-19 12:53:33 +00:00
H.J. Lu
2b516b7297 gas/testsuite/ 
2006-07-18  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/opcode.s: Add sldt, smsw and str.
	* gas/i386/x86-64-opcode.s: Likewise.

	* gas/i386/opcode.d: Updated.
	* gas/i386/x86-64-opcode.d: Likewise.

opcodes/

2006-07-18  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (grps): Change "sldtQ", "strQ" and "smswQ" to
	"sldt", "str" and "smsw".
 2006-07-18 20:25:41 +00:00
H.J. Lu
10505f38ce Add missing ChangeLog entry. 2006-07-15 16:58:36 +00:00
H.J. Lu
a6bd098c72 2006-07-15 H.J. Lu <hongjiu.lu@intel.com> 
PR binutils/2829
	* i386-dis.c (GRP11_C6): NEW.
	(GRP11_C7): Likewise.
	(GRP12): Updated.
	(GRP13): Likewise.
	(GRP14): Likewise.
	(GRP15): Likewise.
	(GRP16): Likewise.
	(GRPAMD): Likewise.
	(GRPPADLCK1): Likewise.
	(GRPPADLCK2): Likewise.
	(dis386): Use GRP11_C6 and GRP11_C7 for entres 0xc6 and 0xc7,
	respectively.
	(grps): Add entries for GRP11_C6 and GRP11_C7.
 2006-07-15 16:33:24 +00:00
Michael Meissner
050dfa73de Add amdfam10 instructions 2006-07-13 22:25:48 +00:00
Julian Brown
e8b42ce4f8 * arm-dis.c (coprocessor): Alter fmsrr disassembly syntax. 2006-07-05 17:08:47 +00:00
H.J. Lu
1596541188 gas/testsuite/ 
2006-06-12  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/i386.exp: Run nops and x86-64-nops.

	* gas/i386/nops.d: New file.
	* gas/i386/nops.s: Likewise.
	* gas/i386/x86-64-nops.d: Likewise.
	* gas/i386/x86-64-nops.s: Likewise.

include/opcode/

2006-06-12  H.J. Lu  <hongjiu.lu@intel.com>

	* i386.h (i386_optab): Add "nop" with memory reference.

opcodes/

2006-06-12  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (dis386_twobyte): Use "nopQ" for 0x1f.
	(twobyte_has_modrm): Set 1 for 0x1f.
 2006-06-12 18:59:37 +00:00
H.J. Lu
46e883c5a9 gas/ 
2006-06-12  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (process_suffix): Don't add rex64 for
	"xchg %rax,%rax".

gas/testsuite/

2006-06-12  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/opcode.s: Add "xchg %ax,%ax".
	* gas/i386/opcode.d: Updated.

	* gas/i386/x86-64-opcode.s: Add xchg %ax,%ax, xchg %eax,%eax,
	xchg %rax,%rax, rex64 xchg %rax,%rax and xchg %rax,%r8.
	* gas/i386/x86-64-opcode.d: Updated.

include/opcode/

2006-06-12  H.J. Lu  <hongjiu.lu@intel.com>

	* i386.h (i386_optab): Update comment for 64bit NOP.

opcodes/

2006-06-12  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (NOP_Fixup): Removed.
	(NOP_Fixup1): New.
	(NOP_Fixup2): Likewise.
	(dis386): Use NOP_Fixup1 and NOP_Fixup2 on 0x90.
 2006-06-12 18:55:44 +00:00
Julian Brown
4e9d3b813b * arm-dis.c (print_insn_neon): Disassemble 32-bit immediates as signed 
on 64-bit hosts.
 2006-06-12 15:31:28 +00:00
H.J. Lu
b3882df925 2006-06-10 H.J. Lu <hongjiu.lu@intel.com> 
* i386.c (GRP10): Renamed to ...
	(GRP12): This.
	(GRP11): Renamed to ...
	(GRP13): This.
	(GRP12): Renamed to ...
	(GRP14): This.
	(GRP13): Renamed to ...
	(GRP15): This.
	(GRP14): Renamed to ...
	(GRP16): This.
	(dis386_twobyte): Updated.
	(grps): Likewise.
 2006-06-10 18:20:39 +00:00
Nick Clifton
5f4df3dd7b Updated Finnish translation 2006-06-09 13:40:51 +00:00
Joseph Myers
6648b7cff9 bfd/doc: 
* bfd.texinfo: Remove local @tex code.

bfd:
	* po/Make-in (pdf, ps): New dummy targets.

binutils:
	* po/Make-in (pdf, ps): New dummy targets.

gas:
	* po/Make-in (pdf, ps): New dummy targets.

gprof:
	* po/Make-in (pdf, ps): New dummy targets.

ld:
	* po/Make-in (pdf, ps): New dummy targets.

opcodes:
	* po/Make-in (pdf, ps): New dummy targets.
 2006-06-07 15:38:01 +00:00
Paul Brook
c22aaad1c7 2006-06-06 Paul Brook <paul@codesourcery.com> 
opcodes/
	* arm-dis.c (coprocessor_opcodes): Add %c to unconditional arm
	instructions.
	(neon_opcodes): Add conditional execution specifiers.
	(thumb_opcodes): Ditto.
	(thumb32_opcodes): Ditto.
	(arm_conditional): Change 0xe to "al" and add "" to end.
	(ifthen_state, ifthen_next_state, ifthen_address): New.
	(IFTHEN_COND): Define.
	(print_insn_coprocessor, print_insn_neon): Print thumb conditions.
	(print_insn_arm): Change %c to use new values of arm_conditional.
	(print_insn_thumb16): Print thumb conditions.  Add %I.
	(print_insn_thumb32): Print thumb conditions.
	(find_ifthen_state): New function.
	(print_insn): Track IT block state.
gas/testsuite/
	* gas/arm/thumb2_bcond.d: Update expected output.
	* gas/arm/thumb32.d: Ditto.
	* gas/arm/vfp1_t2.d: Ditto.
	* gas/arm/vfp1xD_t2.d: Ditto.
binutils/testsuite/
	* binutils-all/arm/objdump.exp: New file.
	* binutils-all/arm/thumb2-cond.s: New test.
 2006-06-07 14:08:19 +00:00
Alan Modra
9622b051cf include/opcode/ 
* ppc.h (PPC_OPCODE_POWER6): Define.
	Adjust whitespace.
gas/
	* config/tc-ppc.c (parse_cpu): Handle "-mpower6".
	(md_show_usage): Document it.
	(ppc_setup_opcodes): Test power6 opcode flag bits.
	* doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
opcodes/
	* ppc-dis.c (powerpc_dialect): Handle power6 option.
	(print_ppc_disassembler_options): Mention power6.
 2006-06-07 05:23:59 +00:00
Thiemo Seufer
65263ce323 [ gas/ChangeLog ] 
* config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
	(CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
	(macro_build): Update comment.
	(mips_ip): Allow DSP64 instructions for MIPS64R2.
	(mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
	CPU_HAS_MDMX.
	(mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
	MIPS_CPU_ASE_MDMX flags for sb1.

	[ gas/testsuite/ChangeLog ]
	* gas/mips/mips64-dsp.s, gas/mips/mips64-dsp.d: New DSP64 tests.
	* gas/mips/mips.exp: Run DSP64 tests.

	[ opcodes/ChangeLog ]
	* mips-dis.c: Disassemble DSP64 instructions for MIPS64R2.
	* mips-opc.c: Add DSP64 instructions.
 2006-06-06 10:49:48 +00:00
Alan Modra
92ce91bb61 * m68hc11-dis.c (print_insn): Warning fix. 2006-06-06 02:48:34 +00:00
Daniel Jacobowitz
4cfe2c59ff bfd/, binutils/, gas/, gprof/, ld/, opcodes/ 
* po/Make-in (top_builddir): Define.
 2006-06-05 14:04:05 +00:00
Alan Modra
7ff1a5b533 * Makefile.am: Run "make dep-am". 
* Makefile.in: Regenerate.
	* config.in: Regenerate.
 2006-06-05 12:28:18 +00:00
Daniel Jacobowitz
20e95c23ab Configury changes: update src repository (binutils, gdb, and rda) to use 
config/gettext-sister.m4 instead of the old gettext.m4.  Regenerate all
affected autotools files.  Include intl in gdb releases again.
 2006-05-31 15:14:46 +00:00
Nick Clifton
eebf07fbf5 Update Spanish translation 2006-05-30 11:01:59 +00:00
Richard Sandiford
a596001ece include/opcodes/ 
* m68k.h (mcf_mask): Define.

opcodes/
	* m68k-opc.c (m68k_opcodes): Fix the masks of the Coldfire fmovemd
	and fmovem entries.  Put register list entries before immediate
	mask entries.  Use "l" rather than "L" in the fmovem entries.
	* m68k-dis.c (match_insn_m68k): Remove the PRIV argument and work it
	out from INFO.
	(m68k_scan_mask): New function, split out from...
	(print_insn_m68k): ...here.  If no architecture has been set,
	first try printing an m680x0 instruction, then try a Coldfire one.

gas/testsuite/
	* gas/m68k/mcf-fpu.s: Add fmovemd and fmovem instructions.
	* gas/m68k/mcf-fpu.d: Adjust accordingly.
 2006-05-25 08:09:03 +00:00
Nick Clifton
4a4d496a37 Updated Vietnamese and Irish translations 2006-05-24 07:54:45 +00:00
Nick Clifton
a854efa328 * crx-dis.c (EXTRACT): Make macro work on 64-bit hosts. 2006-05-22 08:40:09 +00:00
Nick Clifton
0bd7906139 Updated Dutch translation 2006-05-22 08:33:35 +00:00
Nick Clifton
7ff7c29e1f Remove ChangeLog entries, since the template files were already up to date. 2006-05-22 08:30:57 +00:00
Nick Clifton
5002adadc5 Update translation templates 2006-05-22 08:25:15 +00:00
Alan Modra
00988f494c * avr-dis.c: Formatting fix. 2006-05-17 23:44:58 +00:00
Thiemo Seufer
9b3f89ee00 [ gas/ChangeLog ] 
* config/tc-mips.c (macro_build): Test for currently active
	mips16 option.
	(mips16_ip): Reject invalid opcodes.

	[ opcodes/ChangeLog ]
	* mips16-opc.c (I1, I32, I64): New shortcut defines.
	(mips16_opcodes): Change membership of instructions to their
	lowest baseline ISA.

	[ gas/testsuite/ChangeLog ]
	* gas/mips/mips.exp: Run new tests.
	* gas/mips/mips16e.s, gas/mips/mips16e.d, gas/mips/mips16e-64.s,
	gas/mips/mips16e-64.d, gas/mips/mips16e-64.l: New tests.
 2006-05-14 15:35:22 +00:00
H.J. Lu
cb6d34334f gas/testsuite/ 
2006-05-09  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/i386.exp: Run x86-64-gidt.

	* gas/i386/x86-64-gidt.d: New file.
	* gas/i386/x86-64-gidt.s: Likewise.

opcodes/

2006-05-09  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (grps): Update sgdt/sidt for 64bit.
 2006-05-09 16:05:40 +00:00
Julian Brown
1f3c39b9e6 * arm-dis.c (coprocessor_opcodes): Don't interpret fldmx/fstmx as 
vldm/vstm.
 2006-05-05 18:56:01 +00:00
Thiemo Seufer
d43b4baf07 [ gas/ChangeLog ] 
* config/tc-mips.c (macro_build): Add case 'k' to handle cache
	instruction.
	(macro): Add new case M_CACHE_AB.

	[ opcodes/ChangeLog ]
	* mips-opc.c: Add macro for cache instruction.

	[ include/opcode/ChangeLog ]
	* mips.h (enum): Add macro M_CACHE_AB.
 2006-05-05 15:41:23 +00:00
Thiemo Seufer
39a7806dae [ gas/testsuite/ChangeLog ] 
2006-05-04  Thiemo Seufer  <ths@mips.com>
            Nigel Stephens  <nigel@mips.com>

        * gas/mips/mips.exp: Run mips32-dsp tests only for mips32r2.
        * gas/mips/set-arch.d: Adjust according to opcode table changes.

[ include/opcode/ChangeLog ]
2006-05-04  Thiemo Seufer  <ths@mips.com>
            Nigel Stephens  <nigel@mips.com>
            David Ung  <davidu@mips.com>

        * mips.h: Add INSN_SMARTMIPS define.

[ opcodes/ChangeLog ]
2006-05-04  Thiemo Seufer  <ths@mips.com>
            Nigel Stephens  <nigel@mips.com>
            David Ung  <davidu@mips.com>

        * mips-dis.c (mips_arch_choices): Add smartmips instruction
        decoding to MIPS32 and MIPS32R2.  Limit DSP decoding to release
        2 ISAs.  Add MIPS3D decoding to MIPS32R2.  Add MT decoding to
        MIPS64R2.
        * mips-opc.c: fix random typos in comments.
        (INSN_SMARTMIPS): New defines.
        (mips_builtin_opcodes): Add paired single support for MIPS32R2.
        Move bc3f, bc3fl, bc3t, bc3tl downwards.  Move flushi, flushd,
        flushid, wb upwards.  Move cfc3, ctc3 downwards.  Rework the
        FP_S and FP_D flags to denote single and double register
        accesses separately.  Move dmfc3, dmtc3, mfc3, mtc3 downwards.
        Allow jr.hb and jalr.hb for release 1 ISAs.  Allow luxc1, suxc1
        for MIPS32R2.  Add SmartMIPS instructions.  Add two-argument
        variants of bc2f, bc2fl, bc2t, bc2tl.  Add mfhc2, mthc2 to
        release 2 ISAs.
        * mips16-opc.c (mips16_opcodes): Add sdbbp instruction.
 2006-05-04 10:47:05 +00:00
Thiemo Seufer
104b4fab38 2006-05-03 Thiemo Seufer <ths@mips.com> 
[ opcodes/ChangeLog ]
        * mips-opc.c (mips_builtin_opcodes): Fix mftr argument order.

        [ gas/testsuite/ChangeLog ]
        * gas/mips/mips32-mt.d: Fix mftr argument order.
 2006-05-03 20:59:20 +00:00
Thiemo Seufer
022fac6d2a * mips-dis.c (print_insn_args): Force mips16 to odd addresses. 
(print_mips16_insn_arg): Force mips16 to odd addresses.
 2006-05-02 11:12:41 +00:00
Thiemo Seufer
9bcd4f993c [ gas/ChangeLog ] 
2006-04-30  Thiemo Seufer  <ths@mips.com>
            David Ung  <davidu@mips.com>

        * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
        (mips_immed): New table that records various handling of udi
        instruction patterns.
        (mips_ip): Adds udi handling.

[ include/opcode/ChangeLog ]
2006-04-30  Thiemo Seufer  <ths@mips.com>
            David Ung  <davidu@mips.com>

        * mips.h: Defines udi bits and masks.  Add description of
        characters which may appear in the args field of udi
        instructions.

[ opcodes/ChangeLog ]
2006-04-30  Thiemo Seufer  <ths@mips.com>
            David Ung  <davidu@mips.com>

        * mips-opc.c (mips_builtin_opcodes): Add udi instructions
        "udi0" to "udi15".
        * mips-dis.c (print_insn_args): Adds udi argument handling.
 2006-04-30 18:34:39 +00:00
Jim Wilson
f095b97b59 Fix buglet noticed while looking at PR 1298. 
* m68k-dis.c (match_insn_m68k): Restore fprintf_func before printing
error message.
 2006-04-29 03:11:31 +00:00
Thiemo Seufer
bdb09db1cf Don't mis-spell your boss' name... 2006-04-28 13:38:49 +00:00
Thiemo Seufer
59c455b37c [ opcodes/ChangeLog ] 
2006-04-28  Thiemo Seufer  <ths@mips.com>
            David Ung  <davidu@mips.com>
            Nigel Stevens  <nigel@mips.com>

	* mips-dis.c (mips_cp0sel_names_mips3264r2): Add MT register
        names.

[ gas/testsuite/ChangeLog ]
2006-04-28  Thiemo Seufer  <ths@mips.com>
            David Ung  <davidu@mips.com>
            Nigel Stevens  <nigel@mips.com>

	* gas/mips/cp0sel-names-mips32r2.d,
	gas/mips/cp0sel-names-mips64r2.d: Update for MT register names.
 2006-04-28 13:17:00 +00:00
Thiemo Seufer
cc0ca239ed * mips-dis.c (print_insn_args): Add mips_opcode argument. 
(print_insn_mips):  Adjust print_insn_args call.
 2006-04-28 12:59:30 +00:00
Thiemo Seufer
0d09bfe6d3 * mips-dis.c (print_insn_args): Print $fcc only for FP 
instructions, use $cc elsewise.
 2006-04-28 12:19:31 +00:00
Thiemo Seufer
654c225a6d * opcodes/mips-dis.c (mips16_to_32_reg_map, mips16_reg_names): 
Map MIPS16 registers to O32 names.
	(print_mips16_insn_arg): Use mips16_reg_names.
 2006-04-28 11:42:28 +00:00
Julian Brown
0dbde4cf38 * arm-dis.c (print_insn_neon): Disassemble floating-point constant 
VMOV.
 2006-04-26 16:02:07 +00:00
Julian Brown
16980d0b05 * opcodes/arm-dis.c (coprocessor_opcodes): Add %A, %B, %k, convert 
%<code>[zy] into %[zy]<code>.  Expand meaning of %<bitfield>['`?].
	Add unified load/store instruction names.
	(neon_opcode_table): New.
	(arm_opcodes): Expand meaning of %<bitfield>['`?].
	(arm_decode_bitfield): New.
	(print_insn_coprocessor): Add pc argument. Add %A & %B specifiers.
	Use arm_decode_bitfield and adjust numeric specifiers. Adjust %z & %y.
	(print_insn_neon): New.
	(print_insn_arm): Adjust print_insn_coprocessor call. Call
	print_insn_neon. Use arm_decode_bitfield and adjust numeric specifiers.
	(print_insn_thumb32): Likewise.
 2006-04-26 15:40:55 +00:00
Alan Modra
ec3fcc5688 * Makefile.am: Run "make dep-am". 
* Makefile.in: Regenerate.
 2006-04-19 12:10:21 +00:00
Alan Modra
7c6646cd4b * avr-dis.c (avr_operand): Warning fix. 2006-04-19 02:15:05 +00:00
Alan Modra
241a6c40c8 bfd/ 
* warning.m4 (--enable-werror, -build-warnings): Format help messages.
	* configure: Regenerate.
binutils/
	* configure: Regenerate.
gas/
	* configure.in (--enable-targets): Indent help message.
	* configure: Regenerate.
gprof/
	* configure: Regenerate.
ld/
	* configure: Regenerate.
opcodes/
	* configure: Regenerate.
 2006-04-19 02:06:15 +00:00
Daniel Jacobowitz
e740356690 Update POTFILES.in. 2006-04-16 18:25:11 +00:00
Nick Clifton
52f16a0ef4 PR binutils/2454 
* avr-dis.c (avr_operand): Arrange for a comment to appear before the symolic
form of an address, so that the output of objdump -d can be reassembled.
 2006-04-12 13:09:10 +00:00
DJ Delorie
e78efa90d6 * m32c.opc (parse_unsigned_bitbase): Take a new parameter which 
decides if this function accepts symbolic constants or not.
(parse_signed_bitbase): Likewise.
(parse_unsigned_bitbase8): Pass the new parameter.
(parse_unsigned_bitbase11): Likewise.
(parse_unsigned_bitbase16): Likewise.
(parse_unsigned_bitbase19): Likewise.
(parse_unsigned_bitbase27): Likewise.
(parse_signed_bitbase8): Likewise.
(parse_signed_bitbase11): Likewise.
(parse_signed_bitbase19): Likewise.
* m32c-asm.c: Regenerate.
 2006-04-10 21:19:14 +00:00
Carlos O'Donell
108a6f8eb4 2006-04-06 Carlos O'Donell <carlos@codesourcery.com> 
* Makefile.tpl: Add install-html target.
	* Makefile.def: Add install-html target.
	* Makefile.in: Regenerate.
	* configure.in: Add --with-datarootdir, --with-docdir,
	and --with-htmldir options.
	* configure: Regenerate.

bfd/

2006-04-06  Carlos O'Donell  <carlos@codesourcery.com>

	* po/Make-in: Add install-html target.
	* Makefile.am: Rename docdir to bfddocdir. Add datarootdir, docdir
	htmldir. Add install-html and install-html-recursive targets.
	* Makefile.in: Regenerate.
	* configure.in: AC_SUBST for datarootdir, docdir and htmldir.
	* configure: Regenerate.

bfd/doc/

2006-04-06  Carlos O'Donell  <carlos@codesourcery.com>

	* Makefile.am: Add install-html and install-html-am targets.
	Define datarootdir, docdir and htmldir.
	* Makefile.in: Regenerate.

binutils/

2006-04-06  Carlos O'Donell  <carlos@codesourcery.com>

	* po/Make-in: Add install-html target.
	* Makefile.am: Add install-html and install-html-recursive targets.
	* Makefile.in: Regenerate.
	* configure.in: AC_SUBST datarootdir, docdir and htmldir.
	* configure: Regenerate.
	* doc/Makefile.am: Add install-html and install-html-am targets.
	* doc/Makefile.in: Regenerate.

etc/

2006-04-06  Carlos O'Donell  <carlos@codesourcery.com>

	* Makefile.in: Add install-html target. Add htmldir,
	docdir and datarootdir.
	* configure.texi: Document install-html target.
	* configure.in: AC_SUBST datarootdir, docdir, htmldir.
	* configure: Regenerate.

gas/

2006-04-06  Carlos O'Donell  <carlos@codesourcery.com>

	* po/Make-in: Add install-html target.
	* Makefile.am: Add install-html and install-html-recursive targets.
	* Makefile.in: Regenerate.
	* configure.in: AC_SUBST datarootdir, docdir, htmldir.
	* configure: Regenerate.
	* doc/Makefile.am: Add install-html and install-html-am targets.
	* doc/Makefile.in: Regenerate.

gprof/

2006-04-06  Carlos O'Donell  <carlos@codesourcery.com>

	* po/Make-in: Add install-html target.
	* Makefile.am: Add install-html, install-html-am and
	install-html-recursive targets.
	* Makefile.in: Regenerate.
	* configure.in: AC_SUBST datarootdir, docdir, htmldir.
	* configure: Regenerate.

intl/

2006-04-06  Carlos O'Donell  <carlos@codesourcery.com>

	* intl/Makefile.in: Add html info and dvi and install-html to .PHONY
	Add install-html target.

ld/

2006-04-06  Carlos O'Donell  <carlos@codesourcery.com>

	* Makefile.am: Add install-html, install-html-am, and
	install-html-recursive targets.
	* Makefile.in: Regenerate.
	* configure.in: AC_SUBST datarootdir, docdir, htmldir.
	* configure: Regenerate.
	* po/Make-in: Add install-html target.

opcodes/

2006-04-06  Carlos O'Donell  <carlos@codesourcery.com>

	* Makefile.am: Add install-html target.
	* Makefile.in: Regenerate.
 2006-04-06 21:49:35 +00:00
Nick Clifton
a135cb2ce1 Updated Vietnamese translation. 2006-04-06 10:09:41 +00:00
Alan Modra
47426b4127 * pdp11-opc.c (pdp11_opcodes): Fix opcode for SEC instruction. 2006-03-31 11:43:14 +00:00
Bernd Schmidt
331f1cbe1c * bfin-dis.c (decode_dsp32shiftimm_0): Simplify and correct the 
logic to identify halfword shifts.
 2006-03-16 19:09:48 +00:00
Paul Brook
c16d2bf065 2006-03-16 Paul Brook <paul@codesourcery.com> 
gas/
	* config/tc-arm.c (insns): Add "svc".
gas/testsuite/
	* gas/arm/svc.d: New test.
	* gas/arm/svc.s: New test.
	* gas/arm/inst.d: Accept svc mnemonic.
	* gas/arm/thumb.d: Ditto.
	* gas/arm/wince_inst.d: Ditto.
opcodes/
	* arm-dis.c (arm_opcodes): Rename swi to svc.
	(thumb_opcodes): Ditto.
 2006-03-16 15:08:48 +00:00
DJ Delorie
5398310abc * m32c-asm.c: Regenerate. 
* m32c-desc.c: Likewise.
* m32c-desc.h: Likewise.
* m32c-dis.c: Likewise.
* m32c-ibld.c: Likewise.
* m32c-opc.c: Likewise.
* m32c-opc.h: Likewise.
 2006-03-14 04:23:52 +00:00
DJ Delorie
5348b81e4c i* m32c-desc.c: Regenerate. 
* m32c-opc.c: Likewise.
* m32c-opc.h: Likewise.
 2006-03-14 00:30:59 +00:00
DJ Delorie
253d272cfc * m32c.cpu (mul.l): New. 
(mulu.l): New.
* m32c-desc.c: Regenerate with mul.l, mulu.l.
* m32c-opc.c: Likewise.
* m32c-opc.h: Likewise.
 2006-03-11 02:23:19 +00:00
Nick Clifton
f530741d16 Update Swedish translations 2006-03-09 17:28:11 +00:00
H.J. Lu
35c52694b9 gas/testsuite/ 
2006-03-07  H.J. Lu  <hongjiu.lu@intel.com>

	PR binutils/2428
	* gas/i386/i386.exp: Add rep, rep-suffix, x86-64-rep and
	x86-64-rep-suffix.

	* gas/i386/naked.d: Replace repz with rep.
	* gas/i386/x86_64.d: Likewise.

	* gas/i386/rep-suffix.d: New file.
	* gas/i386/rep-suffix.s: Likewise.
	* gas/i386/rep.d: Likewise.
	* gas/i386/rep.s: Likewise.
	* gas/i386/x86-64-rep-suffix.d: Likewise.
	* gas/i386/x86-64-rep-suffix.s: Likewise.
	* gas/i386/x86-64-rep.d: Likewise.
	* gas/i386/x86-64-rep.s: Likewise.

opcodes/

2006-03-07  H.J. Lu  <hongjiu.lu@intel.com>

	PR binutils/2428
	* i386-dis.c (REP_Fixup): New function.
	(AL): Remove duplicate.
	(Xbr): New.
	(Xvr): Likewise.
	(Ybr): Likewise.
	(Yvr): Likewise.
	(indirDXr): Likewise.
	(ALr): Likewise.
	(eAXr): Likewise.
	(dis386): Updated entries of ins, outs, movs, lods and stos.
 2006-03-07 20:18:06 +00:00
Nick Clifton
ed963e2de8 * cgen-ibld.in (insert_normal): Cope with attempts to insert a signed 32-bit 
value into an unsigned 32-bit field when the host is a 64-bit machine.
 2006-03-05 08:38:53 +00:00
Nick Clifton
c7d41dc5a0 Fix parseing functions to return an error message if the parse failed 2006-03-03 15:57:43 +00:00
Carlos O'Donell
f7d9e5c379 bfd/doc/ 
2006-10-14  Carlos O'Donell  <carlos@codesourcery.com>

       * Makefile.am: Add html target.
       * Makefile.in: Regenerate.

bfd/
2006-10-14  Carlos O'Donell  <carlos@codesourcery.com>

       * po/Make-in: Add html target.

binutils/
2006-10-14  Carlos O'Donell  <carlos@codesourcery.com>

       * po/Make-in: Add html target.

gas/
2006-10-14  Carlos O'Donell  <carlos@codesourcery.com>

       * doc/Makefile.am: Add html target.
       * doc/Makefile.in: Regenerate.
       * po/Make-in: Add html target.

gprof/
2006-10-14  Carlos O'Donell  <carlos@codesourcery.com>

       * po/Make-in: Add html target.

ld/
2006-10-14  Carlos O'Donell  <carlos@codesourcery.com>

       * Makefile.am: Add html target.
       * Makefile.in: Regenerate.
       * po/Make-in: Add html target.

opcodes/
2006-10-14  Carlos O'Donell  <carlos@codesourcery.com>

       * po/Make-in: Add html target.

etc/
2006-10-14  Carlos O'Donell  <carlos@codesourcery.com>

       * Makefile.in: TEXI2HTML uses makeinfo. Define
       HTMLFILES. Add html targets.
       * configure.texi: Use ifnottex. Add alternative
       image format specifier as jpg.
       * standards.texi: Use ifnottex.

intl/
2006-10-14  Carlos O'Donell  <carlos@codesourcery.com>

       * intl/Makefile.in: Add html target.
 2006-02-27 16:26:26 +00:00
H.J. Lu
331d2d0d9c gas/ 
2006-02-27  H.J. Lu <hongjiu.lu@intel.com>

	* gas/config/tc-i386.c (output_insn): Support Intel Merom New
	Instructions.

	* gas/config/tc-i386.h (CpuMNI): New.
	(CpuUnknownFlags): Add CpuMNI.

gas/testsuite/

2006-02-27  H.J. Lu <hongjiu.lu@intel.com>

	* gas/i386/i386.exp: Add merom and x86-64-merom.

	* gas/i386/merom.d: New file.
	* gas/i386/merom.s: Likewise.
	* gas/i386/x86-64-merom.d: Likewise.
	* gas/i386/x86-64-merom.s: Likewise.

include/opcode/

2006-02-27  H.J. Lu <hongjiu.lu@intel.com>

	* i386.h (i386_optab): Support Intel Merom New Instructions.

opcodes/

2006-02-27  H.J. Lu <hongjiu.lu@intel.com>

	* i386-dis.c (IS_3BYTE_OPCODE): New for 3-byte opcodes used by
	Intel Merom New Instructions.
	(THREE_BYTE_0): Likewise.
	(THREE_BYTE_1): Likewise.
	(three_byte_table): Likewise.
	(dis386_twobyte): Use THREE_BYTE_0 for entry 0x38. Use
	THREE_BYTE_1 for entry 0x3a.
	(twobyte_has_modrm): Updated.
	(twobyte_uses_SSE_prefix): Likewise.
	(print_insn): Handle 3-byte opcodes used by Intel Merom New
	Instructions.
 2006-02-27 15:35:37 +00:00
David S. Miller
ff3f9d5b2a 2006-02-24 David S. Miller <davem@sunset.davemloft.net> 
* sparc-dis.c (v9_priv_reg_names): Add "gl" entry.
	(v9_hpriv_reg_names): New table.
	(print_insn_sparc): Allow values up to 16 for '?' and '!'.
	New cases '$' and '%' for read/write hyperprivileged register.
	* sparc-opc.c (sparc_opcodes): Add new entries for UA2005
	window handling and rdhpr/wrhpr instructions.
 2006-02-25 01:33:24 +00:00
DJ Delorie
6772dd07c4 [include/elf] 
* m32c.h: Add relax relocs.

[cpu]
	* m32c.cpu (RL_TYPE): New attribute, with macros.
	(Lab-8-24): Add RELAX.
	(unary-insn-defn-g, binary-arith-imm-dst-defn,
	binary-arith-imm4-dst-defn): Add 1ADDR attribute.
	(binary-arith-src-dst-defn): Add 2ADDR attribute.
	(jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a,
	jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP
	attribute.
	(jsri16, jsri32): Add 1ADDR attribute.
	(jsr32.w, jsr32.a): Add JUMP attribute.

[opcodes]
	* m32c-desc.c: Regenerate with linker relaxation attributes.
	* m32c-desc.h: Likewise.
	* m32c-dis.c: Likewise.
	* m32c-opc.c: Likewise.

[gas]
	* config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
	(tc_gen_reloc): Don't define.
	* config/tc-m32c.c (rl_for, relaxable): New convenience macros.
	(OPTION_LINKRELAX): New.
	(md_longopts): Add it.
	(m32c_relax): New.
	(md_parse_options): Set it.
	(md_assemble): Emit relaxation relocs as needed.
	(md_convert_frag): Emit relaxation relocs as needed.
	(md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
	(m32c_apply_fix): New.
	(tc_gen_reloc): New.
	(m32c_force_relocation): Force out jump relocs when relaxing.
	(m32c_fix_adjustable): Return false if relaxing.

[bfd]
	* elf32-m32c.c (m32c_elf_howto_table): Add relaxation relocs.
	(m32c_elf_relocate_section): Don't relocate them.
	(compare_reloc): New.
	(relax_reloc): Remove.
	(m32c_offset_for_reloc): New.
	(m16c_addr_encodings): New.
	(m16c_jmpaddr_encodings): New.
	(m32c_addr_encodings): New.
	(m32c_elf_relax_section): Relax jumps and address displacements.
	(m32c_elf_relax_delete_bytes): Adjust for internal syms.  Fix up
	short jumps.

	* reloc.c: Add m32c relax relocs.
	* libbfd.h: Regenerate.
 2006-02-24 22:10:36 +00:00
Paul Brook
62b3e31101 2006-02-24 Paul Brook <paul@codesourcery.com> 
gas/
	* config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
	arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
	(struct asm_barrier_opt): Define.
	(arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
	(parse_psr): Accept V7M psr names.
	(parse_barrier): New function.
	(enum operand_parse_code): Add OP_oBARRIER.
	(parse_operands): Implement OP_oBARRIER.
	(do_barrier): New function.
	(do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
	(do_t_cpsi): Add V7M restrictions.
	(do_t_mrs, do_t_msr): Validate V7M variants.
	(md_assemble): Check for NULL variants.
	(v7m_psrs, barrier_opt_names): New tables.
	(insns): Add V7 instructions.  Mark V6 instructions absent from V7M.
	(md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
	(arm_cpu_option_table): Add Cortex-M3, R4 and A8.
	(arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
	(struct cpu_arch_ver_table): Define.
	(cpu_arch_ver): New.
	(aeabi_set_public_attributes): Use cpu_arch_ver.  Set
	Tag_CPU_arch_profile.
	* doc/c-arm.texi: Document new cpu and arch options.
gas/testsuite/
	* gas/arm/thumb32.d: Fix expected msr and mrs output.
	* gas/arm/arch7.d: New test.
	* gas/arm/arch7.s: New test.
	* gas/arm/arch7m-bad.l: New test.
	* gas/arm/arch7m-bad.d: New test.
	* gas/arm/arch7m-bad.s: New test.
include/opcode/
	* arm.h: Add V7 feature bits.
opcodes/
	* arm-dis.c (arm_opcodes): Add V7 instructions.
	(thumb32_opcodes): Ditto.  Handle V7M MSR/MRS variants.
	(print_arm_address): New function.
	(print_insn_arm): Use it.  Add 'P' and 'U' cases.
	(psr_name): New function.
	(print_insn_thumb32): Add 'U', 'C' and 'D' cases.
 2006-02-24 15:36:36 +00:00
H.J. Lu
59cf82fe74 bfd/ 
2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>

	* cpu-ia64-opc.c (ins_immu5b): New.
	(ext_immu5b): Likewise.
	(elf64_ia64_operands): Add IMMU5b.

gas/

2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.

gas/testsuite/

2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/ia64/opc-i.s: Add tests for tf.
	* gas/ia64/pseudo.s: Likewise.
	* gas/ia64/opc-i.d: Updated.
	* gas/ia64/pseudo.d: Likewise.

include/opcode/

2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>

	* ia64.h (ia64_opnd): Add IA64_OPND_IMMU5b.

opcodes/

2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>

	* ia64-opc-i.c (bXc): New.
	(mXc): Likewise.
	(OpX2TaTbYaXcC): Likewise.
	(TF). Likewise.
	(TFCM). Likewise.
	(ia64_opcodes_i): Add instructions for tf.

	* ia64-opc.h (IMMU5b): New.

	* ia64-asmtab.c: Regenerated.
 2006-02-23 21:36:18 +00:00
H.J. Lu
19a7219fd1 Update copyright years. 2006-02-23 14:49:32 +00:00
H.J. Lu
7f3dfb9cf7 gas/ 
2006-02-22  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-ia64.c (specify_resource): Add the rule 17 from
	SDM 2.2.

gas/testsuite/

2006-02-22  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/ia64/dv-raw-err.s: Add check for vmsw.0.
	* gas/ia64/dv-raw-err.l: Updated.

	* gas/ia64/opc-b.s: Add vmsw.0 and vmsw.1.
	* gas/ia64/opc-b.d: Updated.

opcodes/

2006-02-22  H.J. Lu  <hongjiu.lu@intel.com>

	* ia64-gen.c (lookup_regindex): Handle ".vm".
	(print_dependency_table): Handle '\"'.

	* ia64-ic.tbl: Updated from SDM 2.2.
	* ia64-raw.tbl: Likewise.
	* ia64-waw.tbl: Likewise.
	* ia64-asmtab.c: Regenerated.

	* ia64-opc-b.c (ia64_opcodes_b): Add vmsw.0 and vmsw.1.
 2006-02-23 00:17:24 +00:00
Nick Clifton
d70c5fc7c5 Add support for the Infineon XC16X. 2006-02-17 14:36:28 +00:00
H.J. Lu
a1cfb73ee0 gas/testsuite/ 
2006-02-11  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/i386.exp: Add "x86-64-drx" and "x86-64-drx-suffix".

	* gas/i386/x86-64-crx-suffix.d: Minor update.

	* gas/i386/x86-64-drx-suffix.d: New file.
	* gas/i386/x86-64-drx.d: Likewise.
	* gas/i386/x86-64-drx.s: Likewise.

opcodes/

2006-02-11  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (dis386_twobyte): Use "movZ" for debug register
	moves.
 2006-02-11 18:08:35 +00:00
H.J. Lu
6dd5059a06 gas/testsuite/ 
2006-02-11  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/i386.exp: Add "x86-64-crx" and "x86-64-crx-suffix".

	* gas/i386/x86-64-crx-suffix.d: New file.
	* gas/i386/x86-64-crx.d: Likewise.
	* gas/i386/x86-64-crx.s: Likewise.

opcodes/

2006-02-11  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c ('Z'): Add a new macro.
	(dis386_twobyte): Use "movZ" for control register moves.
 2006-02-11 17:00:59 +00:00
Nick Clifton
8536c657ff Fix %hi() operator for 64-bit hosts. 2006-02-10 12:05:12 +00:00
Nathan Sidwell
266abb8f72 * bfd/archures.c (bfd_mach_mcf5200, bfd_mach_mcf5206e, 
bfd_mach_mcf5307, bfd_mach_mcf5407, bfd_mach_mcf528x,
	bfd_mach_mcfv4e, bfd_mach_mcf521x, bfd_mach_mcf5249,
	bfd_mach_mcf547x, bfd_mach_mcf548x): Remove.
	(bfd_mach_mcf_isa_a, bfd_mach_mcf_isa_a_div,
	bfd_mach_mcf_isa_a_div_mac, bfd_mach_mcf_isa_a_div_emac,
	bfd_mach_mcf_isa_aplus, bfd_mach_mcf_isa_aplus_mac,
	bfd_mach_mcf_isa_aplus_emac, bfd_mach_mcf_isa_aplus_usp,
	bfd_mach_mcf_isa_aplus_usp_mac, bfd_mach_mcf_isa_aplus_usp_emac,
	bfd_mach_mcf_isa_b, bfd_mach_mcf_isa_b_mac, bfd_mach_mcf_isa_b_emac,
	bfd_mach_mcf_isa_b_usp_float, bfd_mach_mcf_isa_b_usp_float_mac,
	bfd_mach_mcf_isa_b_usp_float_emac): New.
	(bfd_default_scan): Update coldfire mapping.
	* bfd/bfd-in.h (bfd_m68k_mach_to_features,
	bfd_m68k_features_to_mach): Declare.
	* bfd/bfd-in2.h: Rebuilt.
	* bfd/cpu-m68k.c (arch_info_struct): Add new coldfire machines,
	adjust legacy names.
	(m68k_arch_features): New.
	(bfd_m68k_mach_to_features,
	bfd_m68k_features_to_mach): Define.
	* bfd/elf32-m68k.c (elf32_m68k_object_p): New.
	(elf32_m68k_merge_private_bfd_data): Merge the CF EF flags.
	(elf32_m68k_print_private_bfd_data): Print the CF EF flags.
	(elf_backend_object_p): Define.
	* bfd/ieee.c (ieee_write_processor): Update coldfire machines.
	* bfd/libbfd.h: Rebuilt.

	* gas/config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
	mcf5329_control_regs): New.
	(not_current_architecture, selected_arch, selected_cpu): New.
	(m68k_archs, m68k_extensions): New.
	(archs): Renamed to ...
	(m68k_cpus): ... here.  Adjust.
	(n_arches): Remove.
	(md_pseudo_table): Add arch and cpu directives.
	(find_cf_chip, m68k_ip): Adjust table scanning.
	(no_68851, no_68881): Remove.
	(md_assemble): Lazily initialize.
	(select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
	(md_init_after_args): Move functionality to m68k_init_arch.
	(mri_chip): Adjust table scanning.
	(md_parse_option): Reimplement 'm' processing to add -march & -mcpu
	options with saner parsing.
	(m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
	m68k_init_arch): New.
	(s_m68k_cpu, s_m68k_arch): New.
	(md_show_usage): Adjust.
	(m68k_elf_final_processing): Set CF EF flags.
	* gas/config/tc-m68k.h (m68k_init_after_args): Remove.
	(tc_init_after_args): Remove.
	* gas/doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
	(M68k-Directives): Document .arch and .cpu directives.

	* gas/testsuite/gas/m68k/all.exp: Add arch-cpu-1 test.
	* gas/testsuite/gas/m68k/arch-cpu-1.[sd]: New.

	* include/elf/m68k.h (EF_CPU32, EF_M68000, EF_CFV4E): Rename to ...
	(EF_M68K_CPU32, EF_M68K_M68000, EF_M68K_CFV4E): ... here.
	(EF_M68K_ISA_MASK, EF_M68K_ISA_A, EF_M68K_M68K_ISA_A_PLUS,
	EF_M68K_ISA_B, EF_M68K_HW_DIV, EF_M68K_MAC_MASK, EF_M68K_MAC,
	EF_M68K_EMAC, EF_M68K_USP, EF_M68K_FLOAT): New.

	* include/opcode/m68k.h (m68008, m68ec030, m68882): Remove.
	(m68k_mask): New.
	(cpu_m68k, cpu_cf): New.
	(mcf5200, mcf5206e, mcf521x, mcf5249, mcf528x, mcf5307, mcf5407,
	mcf5470, mcf5480): Rename to cpu_<foo>. Add m680x0 variants.

	* opcodes/m68k-dis.c (print_insn_m68k): Use
	bfd_m68k_mach_to_features.

	* binutils/readelf.c (get_machine_flags): Add logic for EF_M68K flags.
 2006-02-07 19:01:10 +00:00
David Ung
f1a64f4922 * mips-opc.c: Add I33 masks to these MIPS32R2 instructions: prefx, 
ceil.l.d, ceil.l.s, cvt.d.l, cvt.l.d, cvt.l.s, cvt.s.l, floor.l.d,
floor.l.s, ldxc1, lwxc1, madd.d, madd.s, msub.d, msub.s, nmadd.d,
nmadd.s, nmsub.d, nmsub.s, recip.d, recip.s, round.l.d, rsqrt.d,
rsqrt.s, sdxc1, swxc1, trunc.l.d, trunc.l.s.
 2006-01-26 15:14:57 +00:00
Arnold Metselaar
9e919b5f1d fixes related to indexed operands 2006-01-18 13:48:46 +00:00
Arnold Metselaar
c9021189f6 Use unsigned char to hold data to be disassembled. 2006-01-17 21:15:56 +00:00
Andreas Schwab
d99b646536 PR binutils/1486 
binutils/:
	* configure.in: Don't define DISASSEMBLER_NEEDS_RELOCS.
	* configure: Regenerate.
	* objdump.c (struct objdump_disasm_info): Don't check for
	DISASSEMBLER_NEEDS_RELOCS.
	(objdump_print_addr): Likewise.
	(disassemble_bytes): Check disassembler_needs_relocs from
	disassemble_info at run-time instead of DISASSEMBLER_NEEDS_RELOCS
	at compile-time.
	(disassemble_section): Likewise.
	(disassemble_data): Initialize it.

include/:
	* dis-asm.h (struct disassemble_info): Add
	disassembler_needs_relocs.

objdump/:
	* disassemble.c (disassemble_init_for_target): Set
	disassembler_needs_relocs for bfd_arch_arm.
 2006-01-17 17:39:20 +00:00
Alan Modra
e88d958a4f split changelogs 2006-01-16 23:15:07 +00:00
Paul Brook
c2fe93275a 2006-01-16 Paul Brook <paul@codesourcery.com> 
opcodes/
	* m68k-opc.c(m68k_opcodes): Fix opcodes for ColdFire f?abss,
	f?add?, and f?sub? instructions.

gas/testsuite/
	* gas/m68k/all.exp: Add mcf-fpu.
	* gas/m68k/mcf-fpu.d: New file.
	* gas/m68k/mcf-fpu.s: New file.
 2006-01-16 16:23:30 +00:00
Nick Clifton
32fba81dfe Add new Chinese (simplified) translation 2006-01-16 16:15:17 +00:00
Paul Brook
1b3a26b59c 2006-01-05 Paul Brook <paul@codesourcery.com> 
* m68k-opc.c (m68k_opcodes): Add missing ColdFire fdsqrtd entry.
 2006-01-15 16:35:21 +00:00
DJ Delorie
db313fa614 * m32c-desc.c: Regenerate. 
* m32c-opc.c: Regenerate.
* m32c-opc.h: Regenerate.
 2006-01-06 23:25:36 +00:00
DJ Delorie
54d46aca35 * cgen-ibld.in (extract_normal): Avoid memory range errors. 
* m32c-ibld.c: Regenerated.
 2006-01-03 22:06:18 +00:00
Alan Modra
c85a332d60 * Makefile.am: Run "make dep-am". 
* Makefile.in: Regenerate.
	* po/POTFILES.in: Regenerate.
 2005-12-27 01:20:06 +00:00
Nick Clifton
54758c3e39 Fix PicoJava opcodes 2005-12-22 17:09:39 +00:00
Nathan Sidwell
d031aafbfe Second part of ms1 to mt renaming. 
* bfd/archures.c (bfd_arch_mt): Renamed.
	(bfd_mt_arch): Renamed.
	(bfd_archures_list): Adjusted.
	* bfd/bfd-in2.h: Rebuilt.
	* bfd/config.bfd (mt): Remove special case targ_archs.
	(mt-*-elf): Rename bfd_elf32_mt_vec.
	* bfd/configure: Rebuilt.
	* bfd/configure.in (bfd_elf32_mt_vec): Renamed.
	(selarchs) Remove mt special case.
	* bfd/cpu-mt.c (arch_info_struct): Adjust.
	(bfd_mt_arch): Renamed, adjust.
	* bfd/elf32-mt.c (mt_reloc_type_lookup, mt_info_to_howto_rela,
	mt_elf_relocate_hi16, mt_final_link_relocate, mt_relocate_section,
	mt_elf_howto_table): Renamed, adjusted.
	(mt_elf_gc_mark_hook, mt_elf_gc_sweep_hook, mt_elf_check_relocs,
	elf32_mt_machine, mt_elf_object_p, mt_elf_set_private_flags,
	mt_elf_copy_private_bfd_data, mt_elf_merge_private_bfd_data,
	mt_elf_print_private_bfd_data): Renamed, adjusted.
	(TARGET_BIG_SYM, TARGET_BIG_NAME, ELF_ARCH, ELF_MACHINE_CODE,
	ELF_MAXPAGESIZE, elf_info_to_howto, elf_backend_relocate_section,
	bfd_elf32_bfd_reloc_type_lookup, elf_backend_gc_mark_hook,
	elf_backend_gc_sweep_hook, elf_backend_check_relocs,
	eld_backend_object_p, bfd_elf32_bfd_set_private_flags,
	bfd_elf32_bfd_copy_private_bfd_data,
	bfd_elf32_bfd_merge_private_bfd_data,
	bfd_elf32_bfd_print_private_bfd_data): Adjusted.
	* bfd/libbfd.h: Regenerated.
	* bfd/reloc.c (BFD_RELOC_MT_PC16, BFD_RELOC_MT_HI16,
	BFD_RELOC_MT_LO16, BFD_RELOC_MT_GNU_VTINHERIT,
	BFD_RELOC_MT_GNU_VTENTRY, BFD_RELOC_MT_PCINSN8): Renamed.
	* bfd/targets.c (bfd_elf32_mt_vec): Renamed.
	(_bfd_target_vector): Adjusted.
	* binutils/readelf.c (guess_is_rela): Use EM_MT.
	(dump_relocations, get_machine_name): Adjust.

	* cpu/mt.cpu (define-arch, define-isa): Set name to mt.
	(define-mach): Adjust.
	* cpu/mt.opc (CGEN_ASM_HASH): Update.
	(mt_asm_hash, mt_cgen_insn_supported): Renamed.
	(parse_loopsize, parse_imm16): Adjust.

	* gas/configure: Rebuilt.
	* gas/configure.in (mt): Remove special case.
	* gas/config/tc-mt.c (opcodes/mt-desc.h, opcodes/mt-opc.h): Change
	#includes.
	(mt_insn, mt_mach, mt_mach_bitmask, mt_flags, mt_architectures):
	Rename, adjust.
	(md_parse_option, md_show_usage, md_begin, md_assemble,
	md_cgen_lookup_reloc, md_atof): Adjust.
	(mt_force_relocation, mt_apply_fix, mt_fix_adjustable): Rename, adjust.
	* gas/config/tc-mt.h (TC_MT): Rename.
	(LISTING_HEADER, TARGET_ARCH, TARGET_FORMAT): Adjust.
	(md_apply_fix): Adjust.
	(mt_apply_fix, mt_fix_adjustable, mt_force_relocation): Rename.
	(TC_FORCE_RELOCATION, tc_fix_adjustable): Adjust.

	* gdb/mt-tdep.c (mt_arch_constants, mt_gdb_regnums): Rename, adjust.
	(mt_register_name, mt_register_type, mt_register_reggroup_p,
	mt_return_value, mt_skip_prologue, mt_breapoint_from_pc,
	mt_pseudo_register_read, mt_pseudo_register_write, mt_frame_align,
	mt_registers_info, mt_push_dummy_call, mt_unwind_cache,
	mt_frame_unwind_cache, mt_unwind_pc, mt_unwind_dummy_id,
	mt_frame_this_id, mt_frame_prev_register, mt_frame_base_address,
	mt_frame_unwind, mt_frame_sniffer, mt_frame_base, mt_gdbarch_init,
	_initialize_mt_tdep): Rename & adjust.

	* include/dis-asm.h (print_insn_mt): Renamed.

	* include/elf/common.h (EM_MT): Renamed.
	* include/elf/mt.h: Rename relocs, cpu & other defines.

	* ld/emulparams/elf32mt.sh (ARCH, OUTPUT_FORMAT): Adjust.

	* opcodes/Makefile.am (HFILES, CFILES, ALL_MACHINES): Adjust.
	(stamp-mt): Adjust rule.
	(mt-asm.lo, mt-desc.lo, mt-dis.lo, mt-ibld.lo, mt-opc.lo): Rename &
	adjust.
	* opcodes/Makefile.in: Rebuilt.
	* opcodes/configure: Rebuilt.
	* opcodes/configure.in (bfd_mt_arch): Rename & adjust.
	* opcodes/disassemble.c (ARCH_mt): Renamed.
	(disassembler): Adjust.
	* opcodes/mt-asm.c: Renamed, rebuilt.
	* opcodes/mt-desc.c: Renamed, rebuilt.
	* opcodes/mt-desc.h: Renamed, rebuilt.
	* opcodes/mt-dis.c: Renamed, rebuilt.
	* opcodes/mt-ibld.c: Renamed, rebuilt.
	* opcodes/mt-opc.c: Renamed, rebuilt.
	* opcodes/mt-opc.h: Renamed, rebuilt.

	* sid/Makefile.in: Rebuilt.
	* sid/aclocal.m4: Rebuilt.
	* sid/configure: Rebuilt.
	* sid/sid.spec: Adjust.
	* sid/bsp/Makefile.am: Adjust.
	* sid/bsp/Makefile.in: Rebuilt.
	* sid/bsp/aclocal.m4: Rebuilt.
	* sid/bsp/configrun-sid.in: Adjust.
	* sid/bsp/pregen/Makefile.in: Rebuilt.
	* sid/bsp/pregen/mt-gdb.conf: Renamed & rebuilt.
	* sid/bsp/pregen/mt-gloss.conf: Renamed & rebuilt.
	* sid/bsp/pregen/pregen-configs.in: Adjust.
	* sid/component/aclocal.m4: Rebuilt.
	* sid/component/configure: Rebuilt.
	* sid/component/tconfig.in: Adjust.
	* sid/component/bochs/aclocal.m4: Rebuilt.
	* sid/component/cache/Makefile.in: Rebuilt.
	* sid/component/cgen-cpu/Makefile.in: Rebuilt.
	* sid/component/cgen-cpu/aclocal.m4: Rebuilt.
	* sid/component/cgen-cpu/compCGEN.cxx: Adjust.
	* sid/component/cgen-cpu/configure: Rebuilt.
	* sid/component/cgen-cpu/configure.in: Rebult.
	* sid/component/cgen-cpu/mt/Makefile.am: Adjust.
	* sid/component/cgen-cpu/mt/Makefile.in: Rebuilt.
	* sid/component/cgen-cpu/mt/hw-cpu-mt.txt: Adjust.
	* sid/component/cgen-cpu/mt/mt-cpu.h: Rebuilt.
	* sid/component/cgen-cpu/mt/mt-decode.cxx: Rebuilt.
	* sid/component/cgen-cpu/mt/mt-decode.h: Rebuilt.
	* sid/component/cgen-cpu/mt/mt-defs.h: Rebuilt.
	* sid/component/cgen-cpu/mt/mt-desc.h: Rebuilt.
	* sid/component/cgen-cpu/mt/mt-sem.cxx: Rebuilt.
	* sid/component/cgen-cpu/mt/mt-write.cxx: Rebuilt.
	* sid/component/cgen-cpu/mt/mt.cxx: Adjust.
	* sid/component/cgen-cpu/mt/mt.h: Adjust.
	* sid/component/consoles/Makefile.in: Rebuilt.
	* sid/component/families/aclocal.m4: Rebuilt.
	* sid/component/families/configure: Rebuilt.
	* sid/component/gdb/Makefile.in: Rebuilt.
	* sid/component/gloss/Makefile.in: Rebuilt.
	* sid/component/glue/Makefile.in: Rebuilt.
	* sid/component/ide/Makefile.in: Rebuilt.
	* sid/component/interrupt/Makefile.in: Rebuilt.
	* sid/component/lcd/Makefile.in: Rebuilt.
	* sid/component/lcd/testsuite/Makefile.in: Rebuilt.
	* sid/component/loader/Makefile.am: Rebuilt.
	* sid/component/loader/Makefile.in: Rebuilt.
	* sid/component/mapper/Makefile.in: Rebuilt.
	* sid/component/mapper/testsuite/Makefile.in: Rebuilt.
	* sid/component/memory/Makefile.in: Rebuilt.
	* sid/component/mmu/Makefile.in: Rebuilt.
	* sid/component/parport/Makefile.in: Rebuilt.
	* sid/component/profiling/Makefile.in: Rebuilt.
	* sid/component/rtc/Makefile.in: Rebuilt.
	* sid/component/sched/Makefile.in: Rebuilt.
	* sid/component/testsuite/Makefile.in: Rebuilt.
	* sid/component/timers/aclocal.m4: Rebuilt.
	* sid/component/timers/configure: Rebuilt.
	* sid/component/uart/Makefile.in: Rebuilt.
	* sid/component/uart/testsuite/Makefile.in: Rebuilt.
	* sid/config/config.sub: Adjust.
	* sid/config/info.tcl.in: Adjust.
	* sid/config/sidtargets.m4: Adjust.
	* sid/doc/Makefile.in: Rebuilt.
	* sid/main/dynamic/Makefile.am: Rebuilt.
	* sid/main/dynamic/Makefile.in: Rebuilt.
	* sid/main/dynamic/aclocal.m4: Rebuilt.
	* sid/main/dynamic/configure: Rebuilt.
 2005-12-16 10:23:12 +00:00
DJ Delorie
eda87aba05 * m32c.cpu (jsri): Fix order so register names aren't treated as 
symbols.
(indexb, indexbd, indexbs, indexl, indexld, indexls, indexw,
indexwd, indexws): Fix encodings.

* m32c-desc.c: Regenerate.
* m32c-opc.c: Regenerate.
* m32c-opc.h: Regenerate.
 2005-12-14 03:30:07 +00:00
Nathan Sidwell
4970f871a7 Rename ms1 to mt, part 1 
* config.sub: Replace ms1 arch with mt.  Allow ms1 as alias.
	* configure.in: Replace ms1 arch with mt.
	* configure: Rebuilt.

	* bfd/Makefile.am (ALL_MACHINES, ALL_MACHINES_CFILES,
	BFD32_BACKENDS, BFD32_BACKENDS_CFILES): Replace ms1 with mt.
	(cpu_mt.lo, elf32-mt.lo): Update target and dependency names.
	* bfd/Makefile.in: Rebuilt.
	* bfd/config.bfd: Replace ms1 arch with mt.
	* bfd/configure.in: Replace ms1 files with mt files.
	* bfd/configure: Rebuilt.
	* bfd/elf32-mt.c: Renamed from elf32-ms1.c.  Update include files.
	* bfd/cpu-mt.c: Renamed from cpu-ms1.c.

	* cpu/mt.cpu: Rename from ms1.cpu.
	* cpu/mt.opc: Rename from ms1.opc.

	* binutils/Makefile.am: Replace ms1 files with mt files.
	* binutils/Makefile.in: Rebuilt.
	* binutils/readelf.c (elf/mt.h): Adjust #include.

	* gas/configure.in: Replace ms1 arch with mt arch.
	* gas/configure: Rebuilt.
	* gas/configure.tgt: Replace ms1 arch with mt arch.
	* gas/config/tc-mt.c: Renamed from tc-ms1.c: Update include files.

	* gas/doc/Makefile.am (CPU_DOCS): Replace ms1 files with mt files.
	* gas/doc/Makefile.in: Rebuilt.

	* gas/testsuite/gas/mt: Renamed from ms1 dir.  Update file names as
	needed.
	* gas/testsuite/gas/mt/errors.exp: Replace ms1 arch with mt arch.
	* gas/testsuite/gas/mt/mt.exp: Replace ms1 arch with mt arch.
	* gas/testsuite/gas/mt/relocs.exp: Replace ms1 arch with mt arch.

	* gdb/configure.tgt: Replace ms1 arch with mt arch.
	* gdb/config/mt: Renamed from ms1 dir.  Update file names as needed.
	* gdb/config/mt/mt.mt (TDEPFILES): Replace ms1 file with mt file.

	* include/elf/mt.h: Renamed from ms1.h

	* ld/Makefile.am (ALL_EMULATIONS): Replace ms1 files with mt files.
	(eelf32mt.c): Update target name and dependencies.
	* ld/Makefile.in: Rebuilt.
	* ld/configure.tgt: Replace ms1 arch with mt arch.
	* ld/emulparams/elf32mt.sh: Renamed from elf32ms1.sh. Update
	comment.

	* libgloss/configure.in: Replace ms1 arch with mt arch.
	* libgloss/configure: Rebuilt.
	* libgloss/mt: Renamed from ms1 dir.

	* newlib/configure.host: Replace ms1 arch with mt arch.
	* newlib/libc/machine/mt: Renamed from ms1 dir.

	* opcodes/Makefile.am (CLEANFILES, CGEN_CPUS, MT_DEPS): Replace ms1
	with mt.
	* opcodes/Makefile.in: Rebuilt.
	* opcodes/configure.in: Replace ms1 files with mt files.
	* opcodes/configure: Rebuilt.

	* sid/component/cgen-cpu/mt: Renamed from ms1 dir.  Update file
	names as appropriate.
	* sid/component/cgen-cpu/mt/Makefile.am: Replace ms1 files with mt
	files.
	* sid/component/cgen-cpu/mt/Makefile.in: Rebuilt.
 2005-12-12 11:25:08 +00:00
Jan Beulich
272c92178a opcodes/ 
2005-12-08  Jan Beulich  <jbeulich@novell.com>

	* i386-dis.c (MAXLEN): Reduce to architectural limit.
	(fetch_data): Check for sufficient buffer size.
 2005-12-08 15:21:05 +00:00
Jan Beulich
422673a90b opcodes/ 
2005-12-08  Jan Beulich  <jbeulich@novell.com>

	* i386-dis.c (OP_ST): Remove prefix in Intel mode.
 2005-12-08 11:28:11 +00:00
Alan Modra
6e50d963b0 * i386-dis.c (dofloat): Handle %rip-relative floating point addressing. 2005-12-08 09:59:40 +00:00
Hans-Peter Nilsson
cf54500c3c * cris-opc.c (cris_opcodes) <"move" "s,P">: Define using 
MOVE_M_TO_PREG_OPCODE and MOVE_M_TO_PREG_ZBITS instead of constants.
 2005-12-07 12:56:13 +00:00
H.J. Lu
cb712a9ecd gas/ 
2005-12-06  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/1874
	* config/tc-i386.c (match_template): Handle monitor.
	(process_suffix): Likewise.

gas/testsuite/

2005-12-06  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/1874
	* gas/i386/i386.exp: Add x86-64-prescott for 64bit.

	* gas/i386/prescott.s: Test address size override for monitor.
	* gas/i386/prescott.d: Updated.

	* gas/i386/x86-64-prescott.d: New file.
	* gas/i386/x86-64-prescott.s: Likewise.

include/opcode/

2005-12-06  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/1874
	* i386.h (i386_optab): Add 64bit support for monitor and mwait.

opcodes/

2005-12-06  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/1874
	* i386-dis.c (address_mode): New enum type.
	(address_mode): New variable.
	(mode_64bit): Removed.
	(ckprefix): Updated to check address_mode instead of mode_64bit.
	(prefix_name): Likewise.
	(print_insn): Likewise.
	(putop): Likewise.
	(print_operand_value): Likewise.
	(intel_operand_size): Likewise.
	(OP_E): Likewise.
	(OP_G): Likewise.
	(set_op): Likewise.
	(OP_REG): Likewise.
	(OP_I): Likewise.
	(OP_I64): Likewise.
	(OP_OFF): Likewise.
	(OP_OFF64): Likewise.
	(ptr_reg): Likewise.
	(OP_C): Likewise.
	(SVME_Fixup): Likewise.
	(print_insn): Set address_mode.
	(PNI_Fixup): Add 64bit and address size override support for
	monitor and mwait.
 2005-12-06 12:40:57 +00:00
Hans-Peter Nilsson
cdedc9f07f * cris-dis.c (bytes_to_skip): Handle new parameter prefix_matchedp. 
(print_with_operands): Check for prefix when [PC+] is seen.
 2005-12-05 23:27:01 +00:00
Dave Brolley
3609e0feb6 2005-12-02 Dave Brolley <brolley@redhat.com> 
* configure.in (cgen_files): Add cgen-bitset.lo.
        (ta): Add cgen-bitset.lo when arch==bfd_cris_arch.
        * Makefile.am (CFILES): Add cgen-bitset.c.
        (ALL_MACHINES): Add cgen-bitset.lo.
        (cgen-bitset.lo): New target.
        * cgen-opc.c (cgen_bitset_create, cgen_bitset_init, cgen_bitset_clear)
        (cgen_bitset_add, cgen_bitset_set, cgen_bitset_contains)
        (cgen_bitset_compare, cgen_bitset_intersect_p, cgen_bitset_copy)
        (cgen_bitset_union): Moved from here ...
        * cgen-bitset.c: ... to here. New file.
        * Makefile.in: Regenerated.
        * configure: Regenerated.
 2005-12-02 20:09:42 +00:00
Jim Wilson
aa2273ba99 Fix 32-bit host/target --enable-targets=all build failure from Doug Evans. 
* ia64-gen.c (_opcode_int64_low, _opcode_int64_high,
opcode_fprintf_vma): New.
(print_main_table): New opcode_fprintf_vma instead of fprintf_vma.
 2005-11-23 04:58:37 +00:00
Alan Modra
ce7a772b48 * ppc-opc.c (powerpc_opcodes): Add frin,friz,frip,frim. Correct 
frsqrtes.
 2005-11-15 21:33:04 +00:00
Thiemo Seufer
0499d65b9b * mips.h: Assign 'm'/'M' codes to MIPS16e save/restore 
instructions.  Define MIPS16_ALL_ARGS and MIPS16_ALL_STATICS for
        save/restore encoding of the args field.

        * mips16-opc.c: Add MIPS16e save/restore opcodes.
        * mips-dis.c (print_mips16_insn_arg): Handle printing of 'm'/'M'
        codes for save/restore.

        * config/tc-mips.c (mips16_ip): Add handling of 'm' and 'M' codes
        for the MIPS16e save/restore instructions.

        * gas/mips/mips.exp: Run new save/restore tests.
        * gas/testsuite/gas/mips/mips16e-save.s: New test for generating
        different styles of save/restore instructions.
        * gas/testsuite/gas/mips/mips16e-save.d: New.
 2005-11-14 02:25:39 +00:00
Andreas Schwab
dc82c973b3 * m68k-dis.c (print_insn_m68k): Only match FPU insns with 
coprocessor ID 1.
 2005-11-10 14:32:28 +00:00
Nick Clifton
dbb33a874e * m32c-desc.c: Regenerated. 2005-11-08 16:16:47 +00:00
Nathan Sidwell
6f84a2a649 bfd: 
Add ms2.
	* archures.c (bfd_mach_ms2): Define.
	* cpu-ms1.c (arch_info_struct): Add ms2 stanza.
	* elf32-ms1.c (elf32_ms1_machine): Add ms2 case.
	(ms1_elf_merge_private_bfd_data): Remove unused variables.  Add
	correct merging logic, with workaround.
	(ms1_elf_print_private_bfd_data): Add ms2 case.
	* reloc.c (BFD_RELOC_MS1_PCINSN8): Add ms2 specific reloc.
	* libbfd.h: Regenerated.
	* bfd-in2.h: Regenerated.

cpu:
	Add ms2
	* ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and
	model.
	(f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr,
	f-cb2incr, f-rc3): New fields.
	(LOOP): New instruction.
	(JAL-HAZARD): New hazard.
	(imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr):
	New operands.
	(mul, muli, dbnz, iflush): Enable for ms2
	(jal, reti): Has JAL-HAZARD.
	(ldctxt, ldfb, stfb): Only ms1.
	(fbcb): Only ms1,ms1-003.
	(wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs,
	fbcbincrs, mfbcbincrs): Enable for ms2.
	(loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns.
	* ms1.opc (parse_loopsize): New.
	(parse_imm16): hi16/lo16 relocs are applicable to IMM16L.
	(print_pcrel): New.

gas:
	Add ms2.
	* config/tc-ms1.c (ms1_mach_bitmask): Initialize to MS1.
	(ms1_architectures): Add ms2.
	(md_parse_option): Add ms2.
	(md_show_usage): Add ms2.
	(md_assemble): Add JAL_HAZARD detection logic.
	(md_cgen_lookup_reloc): Add MS1_OPERAND_LOOPSIZE case.
	* doc/c-ms1.texi: New.
	* doc/all.texi: Add MS1.
	* doc/Makefile.am (CPU_DOCS): Add c-ms1.texi.
	* doc/Makefile.in: Rebuilt.
	* doc/Makefile: Rebuilt.

gas/testsuite:
	Add ms2.
	* gas/ms1/allinsn.d: Adjust pcrel disassembly.
	* gas/ms1/errors.exp: Fix target triplet.
	* gas/ms1/ms1-16-003.d: Adjust pcrel disassembly.
	* gas/ms1/ms1-16-003.s: Tweak label.
	* gas/ms1/ms1.exp: Adjust target triplet.  Add ms2 test.
	* gas/ms1/ms2.d, gas/ms1/ms2.s: New.
	* gas/ms1/relocs.d: Adjust expected machine name and pcrel
	disassembly.
	* gas/ms1/relocs.exp: Adjust target triplet.

include:
	Add ms2.
	* elf/ms1.h (EF_MS1_CPU_MS2): New.


opcodes:
	Add ms2.
	* ms1-asm.c, ms1-desc.c, ms1-desc.h, ms1-dis.c, ms1-ibld.c,
	ms1-opc.c, ms1-opc.h: Regenerated.
 2005-11-08 11:15:13 +00:00
Steve Ellcey
a541e3cedd * configure: Regenerate after modifying bfd/warning.m4. 2005-11-07 22:21:48 +00:00
Alan Modra
3e7d61b225 * i386-dis.c (ckprefix): Handle rex on fwait. Don't print 
ignored rex prefixes here.
	(print_insn): Instead, handle them similarly to fwait followed
	by non-fp insns.
 2005-11-07 00:19:12 +00:00
H.J. Lu
a92e0d0a05 2005-11-02 H.J. Lu <hongjiu.lu@intel.com> 
* iq2000-desc.c: Regenerated.
	* iq2000-desc.h: Likewise.
	* iq2000-dis.c: Likewise.
	* iq2000-opc.c: Likewise.
 2005-11-02 16:58:31 +00:00
Paul Brook
36b0c57df5 2005-11-02 Paul Brook <paul@codesourcery.com> 
* arm-dis.c (print_insn_thumb32): Word align blx target address.
 2005-11-02 16:53:11 +00:00
Alan Modra
9a2ff3f50c * arm-dis.c (print_insn): Warning fix. 2005-10-31 06:10:33 +00:00
H.J. Lu
9e5169a8fa ld/ 
binutils/
opcodes/

2005-10-30  H.J. Lu  <hongjiu.lu@intel.com>

	* Makefile.am: Run "make dep-am".
	* Makefile.in: Regenerated.

	* dep-in.sed: Replace " ./" with " ".
 2005-10-30 17:40:28 +00:00
Dave Brolley
fb53f5a81a 2005-10-28 Dave Brolley <brolley@redhat.com> 
* All CGEN-generated sources: Regenerate.

        Contribute the following changes:
        2005-09-19  Dave Brolley  <brolley@redhat.com>

        * disassemble.c (disassemble_init_for_target): Add 'break' to case for
        bfd_arch_tic4x. Use cgen_bitset_create and cgen_bitset_set for
        bfd_arch_m32c case.

        2005-02-16  Dave Brolley  <brolley@redhat.com>

        * cgen-dis.in: Rename CGEN_ISA_MASK to CGEN_BITSET. Rename
        cgen_isa_mask_* to cgen_bitset_*.
        * cgen-opc.c: Likewise.

        2003-11-28  Richard Sandiford  <rsandifo@redhat.com>

        * cgen-dis.in (print_insn_@arch@): Fix comparison with cached isas.
        * *-dis.c: Regenerate.

        2003-06-05  DJ Delorie  <dj@redhat.com>

        * cgen-dis.in (print_insn_@arch@): Copy prev_isas, don't assign
        it, as it may point to a reused buffer. Set prev_isas when we
        change cpus.

        2002-12-13  Dave Brolley  <brolley@redhat.com>

        * cgen-opc.c (cgen_isa_mask_create): New support function for
        CGEN_ISA_MASK.
        (cgen_isa_mask_init): Ditto.
        (cgen_isa_mask_clear): Ditto.
        (cgen_isa_mask_add): Ditto.
        (cgen_isa_mask_set): Ditto.
        (cgen_isa_supported): Ditto.
        (cgen_isa_mask_compare): Ditto.
        (cgen_isa_mask_intersection): Ditto.
        (cgen_isa_mask_copy): Ditto.
        (cgen_isa_mask_combine): Ditto.
        * cgen-dis.in (libiberty.h): #include it.
        (isas): Renamed from 'isa' and now (CGEN_ISA_MASK *).
        (print_insn_@arch@): Use CGEN_ISA_MASK and support functions.
        * Makefile.am (CGENDEPS): Add utils-cgen.scm and attrs.scm.
        * Makefile.in: Regenerated.
 2005-10-28 19:49:22 +00:00
DJ Delorie
c6552317c1 * m32c.cpu (Imm-8-s4n, Imm-12-s4n): New. 
(arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn,
arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which
imm operand is needed.
(adjnz, sbjnz): Pass the right operands.
(unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach,
unary-insn): Add -g variants for opcodes that need to support :G.
(not.BW:G, push.BW:G): Call it.
(stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb,
stzx16-imm8-imm8-abs16): Fix operand typos.
* m32c.opc (m32c_asm_hash): Support bnCND.
(parse_signed4n, print_signed4n): New.

* m32c-asm.c: Regenerate.
* m32c-desc.c: Regenerate.
* m32c-desc.h: Regenerate.
* m32c-dis.c: Regenerate.
* m32c-ibld.c: Regenerate.
* m32c-opc.c: Regenerate.
* m32c-opc.h: Regenerate.
 2005-10-27 23:54:17 +00:00
DJ Delorie
f75eb1c004 * m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New. 
(mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn,
mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn):
dsp8[sp] is signed.
(mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff).
(mov.BW:S r0,r1): Fix typo r1l->r1.
(tst): Allow :G suffix.
* m32c.opc (parse_signed24): New, for -0x800000..0xffffff.

* m32c-asm.c: Regenerate.
* m32c-desc.c: Regenerate.
* m32c-desc.h: Regenerate.
* m32c-dis.c: Regenerate.
* m32c-ibld.c: Regenerate.
* m32c-opc.c: Regenerate.
* m32c-opc.h: Regenerate.
 2005-10-26 14:59:12 +00:00
Paul Brook
f1022c90ad 2005-10-26 Paul Brook <paul@codesourcery.com> 
gas/
	* config/tc-arm.c (insns): Correct "sel" entry.
gas/testsuite/
	* gas/arm/archv6.d: Adjust expected output.
opcodes/
	* arm-dis.c (arm_opcodes): Correct "sel" entry.
 2005-10-26 14:09:29 +00:00
Alan Modra
e277c00b2d * m32r.opc (parse_hi16): Do not assume a 32-bit host word size. 2005-10-26 07:49:05 +00:00
DJ Delorie
92e0a9414c * m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by 
making one a macro of the other.

* m32c-asm.c: Regenerate.
* m32c-desc.c: Regenerate.
* m32c-desc.h: Regenerate.
* m32c-dis.c: Regenerate.
* m32c-ibld.c: Regenerate.
* m32c-opc.c: Regenerate.
* m32c-opc.h: Regenerate.
 2005-10-25 18:52:02 +00:00
Nick Clifton
3c9b82baee Add support for the Z80 processor family 2005-10-25 17:40:19 +00:00
Alan Modra
3caac5b897 Regenerate 2005-10-25 02:20:17 +00:00
Jan Beulich
6a2375c6b2 include/opcode/ 
2005-10-24  Jan Beulich  <jbeulich@novell.com>

	* ia64.h (enum ia64_opnd): Move memory operand out of set of
	indirect operands.

bfd/
2005-10-24  Jan Beulich  <jbeulich@novell.com>

	* cpu-ia64-opc.c (elf64_ia64_operands): Move memory operand out of
	set of indirect operands.

gas/
2005-10-24  Jan Beulich  <jbeulich@novell.com>

	* config/tc-ia64.c (enum reg_symbol): Delete IND_MEM.
	(dot_rot): Change type of num_* variables. Check for positive count.
	(ia64_optimize_expr): Re-structure.
	(md_operand): Check for general register.

gas/testsuite/
2005-10-24  Jan Beulich  <jbeulich@novell.com>

	* gas/ia64/index.[sl]: New.
	* gas/ia64/rotX.[sl]: New.
	* gas/ia64/ia64.exp: Run new tests.

opcodes/
2005-10-24  Jan Beulich  <jbeulich@novell.com>

	* ia64-asmtab.c: Regenerate.
 2005-10-24 07:42:50 +00:00
DJ Delorie
a1a280bb84 [cpu] 
* m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing.
(indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl,
indexld, indexls): .w variants have `1' bit.
(rot32.b): QI, not SI.
(rot32.w): HI, not SI.
(xchg16): HI for .w variant.

[opcodes]
* m32c-asm.c: Regenerate.
* m32c-desc.c: Regenerate.
* m32c-desc.h: Regenerate.
* m32c-dis.c: Regenerate.
* m32c-ibld.c: Regenerate.
* m32c-opc.c: Regenerate.
* m32c-opc.h: Regenerate.
 2005-10-22 00:03:13 +00:00
Nick Clifton
b7d4853035 bfin-dis.c: Tidy up code, removing redundant constructs. 2005-10-21 16:28:18 +00:00
Martin Schwidefsky
8dd744b6c0 * s390-opc.txt: Add unnormalized hfp multiply and multiply-and-add 
instructions.
 2005-10-19 15:05:10 +00:00
Nick Clifton
e74eb924c2 * m32r.opc (parse_slo16): Fix bad application of previous patch. 2005-10-19 14:44:17 +00:00
Jie Zhang
471e4e36fc * bfin-dis.c (print_insn_bfin): Do proper endian transform when 
reading instruction from memory.
 2005-10-18 16:39:41 +00:00
Nick Clifton
5e03663f3d m32r.opc (parse_slo16): Better version of previous patch. 2005-10-18 07:53:17 +00:00
Nick Clifton
ab7c9a26e5 m32r.opc (parse_slo16): Do not assume a 32-bit host word size. 2005-10-14 08:33:27 +00:00
Richard Earnshaw
19590ef7f6 2005-10-08 James Lemke <jim@wasabisystems.com> 
* arm-dis.c (coprocessor_opcodes): Fix mask for various Maverick CDP
	operations.
 2005-10-08 14:52:07 +00:00
Daniel Jacobowitz
6edfbbad08 bfd/ 
* elf32-arm.c (elf32_arm_check_relocs): Avoid aliasing warnings from
	GCC.
	(elf32_arm_size_dynamic_sections): Likewise.
	* ecofflink.c (bfd_ecoff_debug_one_external): Likewise.
	* elf32-hppa.c (elf32_hppa_check_relocs): Likewise.
	* elf32-m32r.c (m32r_elf_check_relocs): Likewise.
	* elf32-m68k.c (elf_m68k_check_relocs): Likewise.
	* elf32-ppc.c (ppc_elf_check_relocs): Likewise.
	* elf32-s390.c (elf_s390_check_relocs): Likewise.
	(elf_s390_size_dynamic_sections): Likewise.
	* elf32-sh.c (sh_elf_check_relocs): Likewise.
	* elf64-ppc.c (ppc64_elf_check_relocs, dec_dynrel_count)
	(ppc64_elf_size_dynamic_sections): Likewise.
	* elf64-s390.c (elf_s390_check_relocs): Likewise.
	(elf_s390_size_dynamic_sections): Likewise.
	* elfxx-mips.c (_bfd_mips_elf_finish_dynamic_sections): Likewise.
	* elfxx-sparc.c (_bfd_sparc_elf_check_relocs): Likewise.
	(_bfd_sparc_elf_size_dynamic_sections): Likewise.
	* ieee.c (ieee_slurp_section_data): Likewise.
	* oasys.c (oasys_slurp_section_data): Likewise.
opcodes/
	* ppc-dis.c (struct dis_private): Remove.
	(powerpc_dialect): Avoid aliasing warnings.
	(print_insn_big_powerpc, print_insn_little_powerpc): Likewise.
 2005-10-06 19:21:14 +00:00
Nick Clifton
095f284399 oops - delayed commit for addtion of Irish translation for gprof and opcodes 2005-10-03 10:52:38 +00:00
H.J. Lu
fdd3b9b33b 2005-09-30 H.J. Lu <hongjiu.lu@intel.com> 
* Makefile.am: Run "make dep-am".
	* Makefile.in: Regenerated.
	* aclocal.m4: Likewise.
	* configure: Likewise.
 2005-09-30 18:05:59 +00:00
Catherine Moore
4b7f6baa0b * Makefile.am: Bfin support. 
* Makefile.in: Regenerated.
	* aclocal.m4: Regenerated.
	* bfin-dis.c: New file.
	* configure.in: Bfin support.
	* configure: Regenerated.
	* disassemble.c (ARCH_bfin): Define.
	(disassembler): Add case for bfd_arch_bfin.
 2005-09-30 15:28:52 +00:00
Jan Beulich
1a114b1284 gas/testsuite/ 
2005-09-28  Jan Beulich  <jbeulich@novell.com>

	* gas/i386/x86-64-stack.s, gas/i386/x86-64-stack.d,
	gas/i386/x86-64-stack-suffix.d, gas/i386/x86-64-stack-intel.d: New.
	* gas/i386/i386.exp: Run new tests.

ld/testsuite/
2005-09-28  Jan Beulich  <jbeulich@novell.com>

	* ld-x86-64/tlspic.dd: Adjust.

opcodes/
2005-09-28  Jan Beulich  <jbeulich@novell.com>

	* i386-dis.c (stack_v_mode): Renamed from branch_v_mode.
	(indirEv): Use it.
	(stackEv): New.
	(Ob64, Ov64): Rename to Ob, Ov. Delete unused original definitions.
	(dis386): Document and use new 'V' meta character. Use it for
	single-byte push/pop opcode forms. Use stackEv for mod-r/m push/pop
	opcode forms. Correct typo in 'pop ss'. Replace Ob64/Ov64 by Ob/Ov.
	(putop): 'q' suffix for 'T' and 'U' meta depends on DFLAG. Mark
	data prefix as used whenever DFLAG was examined. Handle 'V'.
	(intel_operand_size): Use stack_v_mode.
	(OP_E): Use stack_v_mode, but handle only the special case of
	64-bit mode without operand size override here; fall through to
	v_mode case otherwise.
	(OP_REG): Special case rAX_reg ... rDI_reg only when 64-bit mode
	and no operand size override is present.
	(OP_J): Use get32s for obtaining the displacement also when rex64
	is present.
 2005-09-28 15:34:53 +00:00
Paul Brook
3eb17e6bd2 2005-09-08 Paul Brook <paul@codesourcery.com> 
bfd/
	* reloc.c: Rename BFD_RELOC_ARM_SMI to BFD_RELOC_ARM_SMC.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Regenerate.
opcodes/
	* arm-dis.c (arm_opcodes, thumb32_opcodes): Rename smi to smc.
gas/
	* config/tc-arm.c (do_smi, do_t_smi): Rename ...
	(do_smc, do_t_smc): ... to this.
	(insns): Remane smi to smc.
	(md_apply_fix, tc_gen_reloc): Rename BFD_RELOC_ARM_SMI to
	BFD_RELOC_ARM_SMC.
gas/testsuite/
	* gas/arm/arch6zk.d: Rename smi to smc.
	* gas/arm/arch6zk.s: Ditto.
	* gas/arm/thumb32.d: Ditto.
	* gas/arm/thumb32.s: Ditto.
 2005-09-08 12:49:27 +00:00
Chao-ying Fu
61cc026711 * mips-opc.c (MT32): New define. 
(mips_builtin_opcodes): Move "bc0f", "bc0fl", "bc0t", "bc0tl" to the
bottom to avoid opcode collision with "mftr" and "mttr".
Add MT instructions.
* mips-dis.c (mips_arch_choices): Enable INSN_MT for mips32r2.
(print_insn_args): Add supports for +t, +T, !, $, *, &, g operand
formats.
 2005-09-06 18:46:57 +00:00
Paul Brook
b13dd07a55 2005-09-02 Paul Brook <paul@codesourcery.com> 
* arm-dis.c (coprocessor_opcodes): Add null terminator.
 2005-09-02 14:54:27 +00:00
Paul Brook
8f06b2d82f 2005-09-02 Paul Brook <paul@codesourcery.com> 
bfd/
	* libbdf.h: Regenerate.
	* bfd-in2.h: Regenerate.
	* reloc.c: Add BFD_RELOC_ARM_T32_CP_OFF_IMM and
	BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
gas/
	* config/tc-arm.c (encode_arm_cp_address): Use
	BFD_RELOC_ARM_T32_CP_OFF_IMM in thumb mode.
	(do_iwmmxt_wldstbh): Use BFD_RELOC_ARM_T32_CP_OFF_IMM_S2 in thumb
	mode.
	(md_assemble): Only allow coprocessor instructions when Thumb-2 is
	available.
	(cCE, cC3): Define.
	(insns): Use them for coprocessor instructions.
	(md_pcrel_from_section): Handle BFD_RELOC_ARM_T32_CP_OFF_IMM.
	(get_thumb32_insn): New function.
	(put_thumb32_insn): New function.
	(md_apply_fix): Handle BFD_RELOC_ARM_T32_CP_OFF_IMM and
	BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
gas/testsuite/
	* gas/arm/vfp-bad_t2.d, gas/arm/vfp-bad_t2.l, arm/vfp-bad_t2.s,
	gas/arm/vfp1_t2.d, gas/arm/vfp1_t2.s, gas/arm/vfp1xD_t2.d,
	gas/arm/vfp1xD_t2.s, gas/arm/vfp2_t2.d, gas/arm/vfp2_t2.s): New files.
opcodes/
	* arm-dis.c (coprocessor_opcodes): New.
	(arm_opcodes, thumb32_opcodes): Remove coprocessor insns.
	(print_insn_coprocessor): New function.
	(print_insn_arm): Use print_insn_coprocessor.  Remove coprocessor
	format characters.
	(print_insn_thumb32): Use print_insn_coprocessor.
 2005-09-02 13:12:45 +00:00
Paul Brook
a2dfd01fa7 2005-08-30 Paul Brook <paul@codesourcery.com> 
opcodes/
	* arm-dis.c (thumb_opcodes): Disassemble sub(3) as subs.
gas/testsuite/
	* gas/arm/thumb.d: Change "sub rn, rn, rn" to "subs rn, rn, rn".
	* gas/arm/thumb32.d: Ditto.
 2005-08-30 11:21:59 +00:00
Jan Beulich
3f31e633c2 opcodes/ 
2005-08-26  Jan Beulich  <jbeulich@novell.com>

	* i386-dis.c (intel_operand_size): New, broken out from OP_E for
	re-use.
	(OP_E): Call intel_operand_size, move call site out of mode
	dependent code.
	(OP_OFF): Call intel_operand_size if suffix_always. Remove
	ATTRIBUTE_UNUSED from parameters.
	(OP_OFF64): Likewise.
	(OP_ESreg): Call intel_operand_size.
	(OP_DSreg): Likewise.
	(OP_DIR): Use colon rather than semicolon as separator of far
	jump/call operands.

gas/testsuite/
2005-08-26  Jan Beulich  <jbeulich@novell.com>

	* gas/i386/intelok.d: Adjust.
 2005-08-26 15:33:43 +00:00
Chao-ying Fu
fd25c5a9db * mips-opc.c (WR_a, RD_a, MOD_a, DSP_VOLA, D32): New define. 
(mips_builtin_opcodes): Add DSP instructions.
* mips-dis.c (mips_arch_choices): Enable INSN_DSP for mips32, mips32r2,
mips64, mips64r2.
(print_insn_args): Add supports for 3, 4, 5, 6, 7, 8, 9, 0, :, ', @
operand formats.
 2005-08-25 18:12:44 +00:00
David Ung
dd8b7c222e * mips16-opc.c (mips16_opcodes): Add the MIPS16e jalrc/jrc 
instructions to the table.
 2005-08-23 11:06:10 +00:00
Alan Modra
848cf006a0 Remove a29k files. 2005-08-18 03:59:24 +00:00
Alan Modra
c17ae8a24e Remove a29k support. 2005-08-18 03:51:51 +00:00
Daniel Jacobowitz
36ae0db314 gas/ 
* config/tc-ppc.c (parse_cpu): Add -me300 support.
	(md_show_usage): Likewise.
	* doc/c-ppc.texi (PowerPC-Opts): Document it.
include/opcode/
	* ppc.h (PPC_OPCODE_E300): Define.
opcodes/
	* ppc-dis.c (powerpc_dialect): Handle e300.
	(print_ppc_disassembler_options): Likewise.
	* ppc-opc.c (PPCE300): Define.
	(powerpc_opcodes): Mark icbt as available for the e300.
binutils/
	* doc/binutils.texi (objdump): Document -M e300.
 2005-08-15 15:37:15 +00:00
Dave Anglin
63a3357b7b * hppa-dis.c (print_insn_hppa): Don't print '%' before register names. 
Use "rp" instead of "%r2" in "b,l" insns.
 2005-08-14 01:15:34 +00:00
Martin Schwidefsky
ad101263eb * s390-dis.c (print_insn_s390): Print unsigned operands with %u. 
* s390-mkopc.c (s390_opcode_cpu_val): Add support for cpu type z9-109.
	(main): Likewise.
	* s390-opc.c (I32_16, U32_16, M_16): Add defines 32 bit immediates
	and 4 bit optional masks.
	(INSTR_RIL_RI, INSTR_RIL_RU, INSTR_RRF_M0RR, INSTR_RSE_CCRD,
	INSTR_RSY_CCRD, INSTR_SSF_RRDRD): Add new instruction formats.
	(MASK_RIL_RI, MASK_RIL_RU, MASK_RRF_M0RR, MASK_RSE_CCRD,
	MASK_RSY_CCRD, MASK_SSF_RRDRD): Likewise.
	(s390_opformats): Likewise.
	* s390-opc.txt: Add new instructions for cpu type z9-109.
 2005-08-12 18:03:03 +00:00
Dave Anglin
f1fa109355 * hppa-dis.c (print_insn_hppa): Prefix 21-bit values with "L%". 2005-08-05 17:52:06 +00:00
Paul Brook
e9f89963c4 2005-07-29 Paul Brook <paul@codesourcery.com> 
bfd/
	* reloc.c: Add BFD_RELOC_ARM_T32_ADD_PC12.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Regenerate.
gas/
	* config/tc-arm.c (T16_32_TAB): Add "addr". Fix encoding of push and
	pop.
	(do_t_addr): Implement 32-bit variant.
	(do_t_push_pop): Make some errors warnings.  Handle single register
	32-bit case.
	(insns): Use tCE for adr.
	(md_pcrel_from_section): Handle BFD_RELOC_ARM_T32_ADD_PC12.
	(md_apply_fix): Ditto.
gas/testsuite/
	* gas/arm/thumb32.d: Fix expected output for writeback addressing
	modes.  Add single high reg push/pop test.
	* gas/asm/thumb32.s: Add single high reg push/pop test.
opcodes/
	* arm-dis.c: Fix disassebly of thumb2 writeback addressing modes.
 2005-07-29 17:39:39 +00:00
Paul Brook
92e90b6eb3 2005-07-29 Paul Brook <paul@codesourcery.com> 
bfd/
	* reloc.c (BFD_RELOC_ARM_T32_IMM12): Add.
	* bfd-in2.h: Regeenrate.
	* libbfd.h: Regenerate.
gas/
	* config/tc-arm.c (parse_tb): New function.
	(enum operand_parse_code): Add OP_TB.
	(parse_operands): Handle OP_TB.
	(do_t_add_sub_w, do_t_tb): New functions.
	(insns): Add entries for addw, subw, tbb and tbh.
	(md_apply_fix): Handle BFD_RELOC_ARM_T32_IMM12.
gas/testsuite/
	* gas/arm/thumb32.s: Add tests for addw, subw, tbb and tbh.
	* gas/arm/thumb32.d: Ditto.
opcodes/
	* arm-dis.c (thumb32_opc): Fix addressing mode for tbh.
	(print_insn_thumb32): Fix decoding of thumb2 'I' operands.
 2005-07-29 17:28:33 +00:00
Alan Modra
c5f5f1f476 missed from 2005-07-18 commit 2005-07-26 11:08:59 +00:00
DJ Delorie
fd54057a29 [bfd] 
* reloc.c: Remove unused M32C relocs, add BFD_RELOC_M32C_HI8.
	* libbfd.h: Regenerate.
	* bfd-in2.h: Regenerate.

	* elf32-m32c.c (m32c_elf_howto_table): Add R_M32C_8, R_M32C_LO16,
	R_M32C_HI8, R_M32C_HI16.
	(m32c_reloc_map): Likewise.
	(m32c_elf_relocate_section): Add R_M32C_HI8 and R_M32C_HI16.

[cpu]
	* m32c.opc (parse_unsigned8): Add %dsp8().
	(parse_signed8): Add %hi8().
	(parse_unsigned16): Add %dsp16().
	(parse_signed16): Add %lo16() and %hi16().
	(parse_lab_5_3): Make valuep a bfd_vma *.

[gas]
	* config/tc-m32c.c (md_cgen_lookup_reloc): Add 8 bit operands.
	Support %mod() modifiers from opcodes.
	* doc/c-m32c.texi (M32C-Modifiers): New section.

[include/elf]

	* m32c.h: Add R_M32C_8, R_M32C_LO16, R_M32C_HI8, and R_M32C_HI16.

[opcodes]
	* m32c-asm.c Regenerate.
	* m32c-dis.c Regenerate.
 2005-07-26 03:21:53 +00:00
DJ Delorie
760c0f6a1a * disassemble.c (disassemble_init_for_target): M32C ISAs are 
enums, so convert them to bit masks, which attributes are.
 2005-07-20 19:36:54 +00:00
Nick Clifton
85da3a565d Add ChangeLog entries for yesterdays deltas (oops!) 2005-07-19 10:01:32 +00:00
H.J. Lu
22cbf2e74a gas/testsuite/ 
2005-07-18  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/i386.exp: Add suffix.

	* gas/i386/suffix.d: New file.
	* gas/i386/suffix.s: Likewise.

opcodes/

2005-07-18  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (PNI_Fixup): Update comment.
	(VMX_Fixup): Properly handle the suffix check.
 2005-07-19 04:11:19 +00:00
Nick Clifton
e729279b04 Fix building for MS1 and M32C. 
Restore alpha- sorting to the architecture tables.
 2005-07-18 14:13:36 +00:00
Dave Anglin
0aea0460fe * hppa-dis.c (print_insn_hppa): Add space after 'w' in wide-mode 
mfctl disassembly.
 2005-07-17 02:26:26 +00:00
Alan Modra
0f82ff91a0 bfd/ 
* Makefile.am: Run "make dep-am".
	* Makefile.in: Regenerate.
opcodes/
	* Makefile.am: Run "make dep-am".
	(stamp-m32c): Fix cpu dependencies.
	* Makefile.in: Regenerate.
	* ip2k-dis.c: Regenerate.
binutils/
	* Makefile.am: Run "make dep-am".
	* Makefile.in: Regenerate.
gas/
	* Makefile.am: Run "make dep-am".
	* Makefile.in: Regenerate.
ld/
	* Makefile.am: Run "make dep-am".
	(emipsidt.c, emipsidtl.c): Depend on generic.em.
	* Makefile.in: Regenerate.
 2005-07-16 02:03:55 +00:00
H.J. Lu
90700ea20f gas/ 
2007-07-15  H.J. Lu <hongjiu.lu@intel.com>

	* gas/config/tc-i386.h (CpuVMX): New.
	(CpuUnknownFlags): Add CpuVMX.

gas/testsuite/

2007-07-15  H.J. Lu <hongjiu.lu@intel.com>

	* gas/i386/i386.exp: Add vmx and x86-64-vmx.

	* gas/i386/vmx.d: New file.
	* gas/i386/vmx.s: Likewise.
	* gas/i386/x86-64-vmx.d: Likewise.
	* gas/i386/x86-64-vmx.s: Likewise.

include/opcode/

2007-07-15  H.J. Lu <hongjiu.lu@intel.com>

	* i386.h (i386_optab): Support Intel VMX Instructions.

opcodes/

2007-07-15  H.J. Lu <hongjiu.lu@intel.com>

	* i386-dis.c (OP_VMX): New. Handle Intel VMX Instructions.
	(VMX_Fixup): New. Fix up Intel VMX Instructions.
	(Em): New.
	(Gm): New.
	(VM): New.
	(dis386_twobyte): Updated entries 0x78 and 0x79.
	(twobyte_has_modrm): Likewise.
	(grps): Use OP_VMX in the "sgdtIQ" entry. Updated GRP9.
	(OP_G): Handle m_mode.
 2005-07-15 13:49:53 +00:00
Jim Blandy
49f58d10f8 ChangeLog: 
2005-07-14  Jim Blandy  <jimb@redhat.com>

	* configure.in: Add cases for Renesas m32c.
	* configure: Regenerated.

bfd/ChangeLog:
2005-07-14  Jim Blandy  <jimb@redhat.com>

	Add support for m32c-*-elf (Renesas m32c and m16c).
	* Makefile.am (ALL_MACHINES): Add cpu-m32c.lo.
	(ALL_MACHINES_CFILES): Add cpu-m32c.c.
	(BFD32_BACKENDS): Add elf32-m32c.lo.
	(BFD32_BACKENDS_CFILES): Add elf32-m32c.c.
	(cpu-m32c.lo, elf32-m32c.lo): New rules, generated by 'make dep-am'.
	* Makefile.in: Regenerated.
	* archures.c (bfd_arch_m32c, bfd_mach_m16c, bfd_mach_m32c): New
	arch and mach codes.
	(bfd_m32c_arch): New arch info object.
	(bfd_archures_list): List bfd_m32c_arch.
	* bfd-in2.h: Regenerated.
	* config.bfd: Add case for the m32c.
	* configure.in: Add case for the m32c.
	* configure: Regenerated.
	* cpu-m32c.c, elf32-m32c.c: New files.
	* libbfd.h: Regenerated.
	* targets.c (bfd_elf32_m32c_vec): Declare.
	(_bfd_target_vector): List bfd_elf32_m32c_vec.

binutils/ChangeLog:
2005-07-14  Jim Blandy  <jimb@redhat.com>

	* readelf.c: #include "elf/m32c.h"
	(guess_is_rela, dump_relocations, get_machine_name): Add cases for
	EM_M32C.
	* Makefile.am (readelf.o): Update dependencies.
	* Makefile.in: Regenerated.

cpu/ChangeLog:
2005-07-14  Jim Blandy  <jimb@redhat.com>

	* m32c.cpu, m32c.opc: Machine description for the Renesas M32C.

gas/ChangeLog:
2005-07-14  Jim Blandy  <jimb@redhat.com>

	Add support for the Renesas M32C.
	* Makefile.am (CPU_TYPES): List m32c.
	(TARGET_CPU_CFILES): List config/tc-m32c.c.
	(TARGET_CPU_HFILES): List config/tc-m32c.h.
	* configure.in: Add case for m32c.
	* configure.tgt: Add cases for m32c and m32c-*-elf.
	* configure: Regenerated.
	* config/tc-m32c.c, config/tc-m32c.h: New files.
	* doc/Makefile.am (CPU_DOCS): Add c-m32c.texi.
	* doc/Makefile.in: Regenerated.
	* doc/all.texi: Set M32C.
	* doc/as.texinfo: Add text for the M32C-specific options and line
	comment characters, and refer to c-m32c.texi.
	* doc/c-m32c.texi: New file.

include/ChangeLog:
2005-07-14  Jim Blandy  <jimb@redhat.com>

	* dis-asm.h (print_insn_m32c): New declaration.

include/elf/ChangeLog:
2005-07-14  Jim Blandy  <jimb@redhat.com>

	Add support for Renesas M32C and M16C.
	* common.h (EM_M32C): New machine number.
	* m32c.h: New file.

ld/ChangeLog:
2005-07-14  Jim Blandy  <jimb@redhat.com>

	Add support for the Renesas M32C and M16C.
	* Makefile.am (ALL_EMULATIONS): Add eelf32m32c.o.
	(eelf32m32c.c): New target.
	* Makefile.in: Regenerated.
	* configure.tgt: Add case for m32c-*-elf.
	* emulparams/elf32m32c.sh: New file.

opcodes/ChangeLog:
2005-07-14  Jim Blandy  <jimb@redhat.com>

	Add support for the Renesas M32C and M16C.
	* m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New.
	* m32c-desc.h, m32c-opc.h: New.
	* Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h.
	(CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c,
	m32c-opc.c.
	(ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo,
	m32c-ibld.lo, m32c-opc.lo.
	(CLEANFILES): List stamp-m32c.
	(M32C_DEPS): List stamp-m32c, if CGEN_MAINT.
	(CGEN_CPUS): Add m32c.
	(m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c)
	(m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS.
	(m32c_opc_h): New variable.
	(stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo)
	(m32c-opc.lo): New rules.
	* Makefile.in: Regenerated.
	* configure.in: Add case for bfd_m32c_arch.
	* configure: Regenerated.
	* disassemble.c (ARCH_m32c): New.
	[ARCH_m32c]: #include "m32c-desc.h".
	(disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c.
	(disassemble_init_for_target) [ARCH_m32c]: Same.

	* cgen-ops.h, cgen-types.h: New files.
	* Makefile.am (HFILES): List them.
	* Makefile.in: Regenerated.
 2005-07-14 22:52:28 +00:00
Jim Wilson
0fd3a4776c Kaveh Ghazi's printf format attribute checking patch. 
bfd:
	* elf32-xtensa.c (vsprint_msg): Add format attribute.  Fix
	format bugs.
	* vms.h (_bfd_vms_debug): Add format attribute.
	(_bfd_vms_debug, _bfd_hexdump): Fix typos.

binutils:
	* bucomm.h (report): Add format attribute.
	* dlltool.c (inform): Likewise.
	* dllwrap.c (display, inform, warn): Likewise.
	* objdump.c (objdump_sprintf): Likewise.
	* readelf.c (error, warn): Likewise.  Fix format bugs.

gas:
	* config/tc-tic30.c (debug): Add format attribute.  Fix format
	bugs.

include:
	* dis-asm.h (fprintf_ftype): Add format attribute.

opcodes:
	* arc-dis.c, arm-dis.c, cris-dis.c, crx-dis.c, d10v-dis.c,
	d30v-dis.c, fr30-dis.c, h8300-dis.c, h8500-dis.c, i860-dis.c,
	ia64-dis.c, ip2k-dis.c, m10200-dis.c, m10300-dis.c,
	m88k-dis.c, mcore-dis.c, mips-dis.c, ms1-dis.c, or32-dis.c,
	ppc-dis.c, sh64-dis.c, sparc-dis.c, tic4x-dis.c, tic80-dis.c,
	v850-dis.c: Fix format bugs.
	* ia64-gen.c (fail, warn): Add format attribute.
	* or32-opc.c (debug): Likewise.
 2005-07-07 19:27:52 +00:00
Nick Clifton
22f8fcbd5c arm-dis.c (opcode32 arm_opcodes): Fix ARM VFP fadds instruction disassembly 
pattern.
vfp1xD.d: Adjust expected fadds disassemblies now that the dissassembler has
  been fixed.
 2005-07-07 11:37:10 +00:00
Alan Modra
d125c27b97 * Makefile.am (stamp-m32r): Fix path to cpu files. 
(stamp-m32r, stamp-iq2000): Likewise.
	* Makefile.in: Regenerate.
	* m32r-asm.c: Regenerate.
	* po/POTFILES.in: Remove arm-opc.h.  Add ms1-asm.c, ms1-desc.c,
	ms1-desc.h, ms1-dis.c, ms1-ibld.c, ms1-opc.c, ms1-opc.h.
 2005-07-06 08:19:39 +00:00
Nick Clifton
3ec2b351bd Fix compile time warnings from a GCC 4.0 compiler 2005-07-05 15:07:46 +00:00
Jan Beulich
3012383869 gas/ 
2005-07-05  Jan Beulich  <jbeulich@novell.com>

	* config/tc-i386.h (CpuSVME): New.
	(CpuUnknownFlags): Include CpuSVME.
	* config/tc-i386.c (cpu_arch): Add .pacifica and .svme. Add opteron
	as alias of sledgehammer.
	(md_assemble): Include invlpga in the check for insns with two source
	operands.
	(process_operands): Include SVME insns in the check for ignored
	segment overrides. Adjust diagnostic.
	(i386_index_check): Special-case SVME insns with memory operands.

gas/testsuite/
2005-07-05  Jan Beulich  <jbeulich@novell.com>

	* gas/i386/svme.d: New.
	* gas/i386/svme.s: New.
	* gas/i386/svme64.d: New.
	* gas/i386/i386.exp: Run new tests.

include/opcode/
2005-07-05  Jan Beulich  <jbeulich@novell.com>

	* i386.h (i386_optab): Add new insns.

opcodes/
2005-07-05  Jan Beulich  <jbeulich@novell.com>

	* i386-dis.c (SVME_Fixup): New.
	(grps): Use it for the lidt entry.
	(PNI_Fixup): Call OP_M rather than OP_E.
	(INVLPG_Fixup): Likewise.
 2005-07-05 07:16:54 +00:00
H.J. Lu
b0eec63e04 2005-07-04 H.J. Lu <hongjiu.lu@intel.com> 
* tic30-dis.c (cnvt_tmsfloat_ieee): Use HUGE_VALF if defined.
 2005-07-04 17:51:36 +00:00
Nick Clifton
47b0e7ad8c Update function declarations to ISO C90 formatting 2005-07-01 11:16:33 +00:00
Ben Elliston
cc16ba8c4f * m68k-dis.c: Use ISC C90. 
* m68k-opc.c: Formatting fixes.
 2005-06-23 11:18:26 +00:00
David Ung
4b185e973e * mips16-opc.c (mips16_opcodes): Add the following MIPS16e 
instructions to the table; seb/seh/sew/zeb/zeh/zew.
 2005-06-16 17:01:12 +00:00
Dave Brolley
ac18822241 2005-06-15 Dave Brolley <brolley@redhat.com> 
Contribute Morpho ms1 on behalf of Red Hat
        * ms1-asm.c, ms1-desc.c, ms1-dis.c, ms1-ibld.c, ms1-opc.c,
        ms1-opc.h: New files, Morpho ms1 target.

        2004-05-14  Stan Cox  <scox@redhat.com>

        * disassemble.c (ARCH_ms1): Define.
        (disassembler): Handle bfd_arch_ms1

        2004-05-13  Michael Snyder  <msnyder@redhat.com>

        * Makefile.am, Makefile.in: Add ms1 target.
        * configure.in: Ditto.
 2005-06-15 16:23:54 +00:00
Zack Weinberg
6b5d3a4d35 opcodes: 
* arm-opc.h: Delete; fold contents into ...
	* arm-dis.c: ... here.  Move includes of internal COFF headers
	next to includes of internal ELF headers.
	(streq, WORD_ADDRESS, BDISP, BDISP23): Delete, unused.
	(struct arm_opcode): Rename struct opcode32.  Make 'assembler' const.
	(struct thumb_opcode): Rename struct opcode16.  Make 'assembler' const.
	(arm_conditional, arm_fp_const, arm_shift, arm_regname, regnames)
	(iwmmxt_wwnames, iwmmxt_wwssnames):
	Make const.
	(regnames): Remove iWMMXt coprocessor register sets.
	(iwmmxt_regnames, iwmmxt_cregnames): New statics.
	(get_arm_regnames): Adjust fourth argument to match above changes.
	(set_iwmmxt_regnames): Delete.
	(print_insn_arm): Constify 'c'.  Use ISO syntax for function
	pointer calls.  Expand sole use of BDISP.  Use iwmmxt_regnames
	and iwmmxt_cregnames, not set_iwmmxt_regnames.
	(print_insn_thumb16, print_insn_thumb32): Constify 'c'.  Use
	ISO syntax for function pointer calls.
include:
	* dis-asm.h (get_arm_regnames): Update prototype.
 2005-06-08 17:27:41 +00:00
Zack Weinberg
4a5329c63a * arm-dis.c: Split up the comments describing the format codes, so 
that the ARM and 16-bit Thumb opcode tables each have comments
	preceding them that describe all the codes, and only the codes,
	valid in those tables.  (32-bit Thumb table is already like this.)
	Reorder the lists in all three comments to match the order in
	which the codes are implemented.
	Remove all forward declarations of static functions.  Convert all
	function definitions to ISO C format.
	(print_insn_arm, print_insn_thumb16, print_insn_thumb32):
	Return nothing.
	(print_insn_thumb16): Remove unused case 'I'.
	(print_insn): Update for changed calling convention of subroutines.
 2005-06-07 22:16:52 +00:00
Jan Beulich
3d456fa193 gas/testsuite/ 
2005-05-25  Jan Beulich  <jbeulich@novell.com>

	* gas/i386/intelok.d: Account for 32-bit displacements being shown
	in hex.

opcodes/
2005-05-25  Jan Beulich  <jbeulich@novell.com>

	* i386-dis.c (OP_E): In Intel mode, display 32-bit displacements in
	hex (but retain it being displayed as signed). Remove redundant
	checks. Add handling of displacements for 16-bit addressing in Intel
	mode.
 2005-05-25 06:50:23 +00:00
Jan Beulich
2888cb7a54 opcodes/ 
2005-05-25  Jan Beulich  <jbeulich@novell.com>

	* i386-dis.c (prefix_name): Remove pointless mode_64bit check.
	(OP_E): Remove redundant REX_EXTZ handling. Remove pointless
	masking of 'rm' in 16-bit memory address handling.
 2005-05-25 06:47:58 +00:00
Alan Modra
1ed8e1e4fb * ppc-dis.c (powerpc_dialect): Handle "-Mpower5". 
(print_ppc_disassembler_options): Document it.
	* ppc-opc.c (SCV_LEV): Define.
	(LEV): Allow optional operand.
	(POWER5): Define.
	(powerpc_opcodes): Extend "sc".  Adjust "svc" and "svcl".  Add
	"hrfid", "popcntb", "fsqrtes", "fsqrtes.", "fre" and "fre.".
 2005-05-19 07:00:40 +00:00
Kelley Cook
49cc2e69fc 2005-05-19 Kelley Cook <kcook@gcc.gnu.org> 
* Makefile.in:  Regenerate.
 2005-05-19 03:18:04 +00:00
Zack Weinberg
c19d120533 include/elf: 
* arm.h: Import complete list of official relocation names
	and numbers from AAELF.  Define FAKE_RELOCs for old names.
	Remove a few old names no longer used anywhere.

bfd:
	* elf32-arm.c: Wherever possible, use official reloc names
	from AAELF.
	(elf32_arm_howto_table, elf32_arm_tls_gd32_howto)
	(elf32_arm_tls_ldo32_howto, elf32_arm_tls_ldm32_howto)
	(elf32_arm_tls_le32_howto, elf32_arm_tls_ie32_howto)
	(elf32_arm_vtinherit_howto, elf32_arm_vtentry_howto)
	(elf32_arm_pc11_howto, elf32_arm_thm_pc9_howto, elf32_arm_got_prel)
	(elf32_arm_r_howto): Replace with elf32_arm_howto_table_1,
	elf32_arm_howto_table_2, and elf32_arm_howto_table_3.
	Add many new relocations from AAELF.
	(elf32_arm_howto_from_type): Update to match.
	(elf32_arm_reloc_map): Add entries for R_ARM_THM_JUMP24,
	R_ARM_THM_JUMP11, R_ARM_THM_JUMP19, R_ARM_THM_JUMP8,
	R_ARM_THM_JUMP6, R_ARM_GNU_VTINHERIT, and R_ARM_GNU_VTENTRY.
	(elf32_arm_reloc_type_lookup): Use elf32_arm_howto_from_type.
	(elf32_arm_final_link_relocate): Add support for
	R_ARM_THM_JUMP24, R_ARM_THM_JUMP19, R_ARM_THM_JUMP6.  Remove
	case entries redundant with default.

	* reloc.c: Reorganize ARM relocations.  Add Thumb
	assembler-internal relocations BFD_RELOC_ARM_T32_OFFSET_U8,
	BFD_RELOC_ARM_T32_OFFSET_IMM, BFD_RELOC_ARM_T32_IMMEDIATE.
	Add visible relocations BFD_RELOC_THUMB_PCREL_BRANCH7,
	BFD_RELOC_THUMB_BRANCH20, BFD_RELOC_THUMB_BRANCH25.
	Delete unused relocations BFD_RELOC_ARM_GOT12, BFD_RELOC_ARM_COPY.
	* bfd-in2.h, libbfd.h: Regenerate.

opcodes:
	* arm-dis.c (thumb_opcodes): Add disassembly for V6T2 16-bit
	instructions.  Adjust disassembly of some opcodes to match
	unified syntax.
	(thumb32_opcodes): New table.
	(print_insn_thumb): Rename print_insn_thumb16; don't handle
	two-halfword branches here.
	(print_insn_thumb32): New function.
	(print_insn): Choose among print_insn_arm, print_insn_thumb16,
	and print_insn_thumb32.  Be consistent about order of
	halfwords when printing 32-bit instructions.

gas:
	* hash.c (hash_lookup): Add len parameter.  All callers changed.
	(hash_find_n): New interface.
	* hash.h: Prototype hash_find_n.
	* sb.c: Include as.h.
	(scrub_from_sb, sb_to_scrub, scrub_position): New statics.
	(sb_scrub_and_add_sb): New interface.
	* sb.h: Prototype sb_scrub_and_add_sb.
	* input-scrub.c (input_scrub_include_sb): Use sb_scrub_and_add_sb.

	* config/tc-arm.h (TC_FORCE_RELOCATION_LOCAL): Remove
	reference to BFD_RELOC_ARM_GOT12 which is never generated.
	* config/tc-arm.c: Rewrite, adding Thumb-2 support.

gas/testsuite:
	* gas/arm/arm.exp: Convert all existing "gas_test" tests to
	"run_dump_test" tests.  Run more tests unconditionally.  Run new tests.
	* gas/arm/arch4t.s, gas/arm/arch6zk.s, gas/arm/arm3.s, gas/arm/arm6.s
	* gas/arm/arm7dm.s, gas/arm/bignum1.s, gas/arm/float.s
	* gas/arm/immed.s, gas/arm/iwmmxt.s, gas/arm/offset.s, gas/arm/thumb.s:
	Adjust to work as a dump test.
	* gas/arm/arch4t.d, gas/arm/arch6zk.d, gas/arm/arm3.d, gas/arm/arm6.d
	* gas/arm/arm7dm.d, gas/arm/bignum1.d, gas/arm/float.d
	* gas/arm/immed.d, gas/arm/iwmmxt.d, gas/arm/offset.d, gas/arm/thumb.d:
	New files.

	* gas/arm/armv1-bad.l, gas/arm/armv1-bad.s: Remove tests for
	diagnostics that don't happen in the first pass anymore.

	* gas/arm/iwmmxt-bad.l, gas/arm/r15-bad.l, gas/arm/req.l
	* gas/arm/vfp-bad.l:
	Update expected diagnostics.
	* gas/arm/pic.d: Update expected reloc name.
	* gas/arm/thumbv6.d: CPY no longer appears in disassembly.
	* gas/arm/r15-bad.s: Avoid two-argument mul.
	* gas/arm/req.s: Adjust comments.
	* gas/arm/maverick.d, gas/arm/maverick.s: Avoid inappropriate
	use of PC.

	* gas/arm/macro-1.d, gas/arm/macro1.s
	* gas/arm/t16-bad.l, gas/arm/t16-bad.s
	* gas/arm/tcompat.d, gas/arm/tcompat.s
	* gas/arm/tcompat2.d, gas/arm/tcompat2.s
	* gas/arm/thumb32.d, gas/arm/thumb32.s
	New test pair.

ld/testsuite:
	* ld-arm/mixed-app.d: Adjust expected disassembly a little.
 2005-05-18 05:40:12 +00:00
H.J. Lu
003519a7c2 gas/testsuite/ 
2005-05-07  H.J. Lu  <hongjiu.lu@intel.com>

	PR 843
	* gas/i386/i386.exp: Add x86-64-branch.

	* gas/i386/x86-64-branch.d: New.
	* gas/i386/x86-64-branch.s: New.

opcodes/

2005-05-07  H.J. Lu  <hongjiu.lu@intel.com>

	PR 843
	* i386-dis.c (branch_v_mode): New.
	(indirEv): Use branch_v_mode instead of v_mode.
	(OP_E): Handle branch_v_mode.
 2005-05-07 13:30:02 +00:00
H.J. Lu
920a34a7b2 2005-05-07 H.J. Lu <hongjiu.lu@intel.com> 
* d10v-dis.c (dis_2_short): Support 64bit host.
 2005-05-07 13:26:28 +00:00
Nick Clifton
5de773c13e Update Dutch translation 2005-05-07 07:52:54 +00:00
Nick Clifton
f432110413 Update the address and phone number of the FSF 2005-05-07 07:34:31 +00:00
Jim Wilson
10b076a2ee Fix ia64-hpux build failure. 
* ia64-opc.c: Include sysdep.h before libiberty.h.
 2005-05-05 21:45:58 +00:00
Nick Clifton
022716b6cc * configure.in (ALL_LINGUAS): Add vi. 
* configure: Regenerate.
* po/vi.po: New.
 2005-05-05 09:17:37 +00:00
Jerome Guitton
db5152b48d * configure.in: Fix the check for basename declaration. 
* configure: Regenerate.
 2005-04-26 10:24:45 +00:00
Alan Modra
eed0d89a39 * ppc-opc.c (RTO): Define. 
(powerpc_opcodes <tlbsx, tlbsx., tlbre>): Combine PPC403 and BOOKE
	entries to suit PPC440.
 2005-04-19 04:50:37 +00:00
Mark Kettenis
791fe84908 gas/ChangeLog: 
* config/tc-i386.c (md_begin): Allow hyphens in mnemonics.
include/opcode/ChangeLog:
* i386.h: Insert hyphens into selected VIA PadLock extensions.
Add xcrypt-ctr.  Provide aliases without hyphens.
opcodes/ChangeLog:
* i386-dis.c: Insert hyphens into selected VIA PadLock extensions.
Add xcrypt-ctr.
 2005-04-18 20:59:20 +00:00
Nick Clifton
ffe58f7c73 * po/fi.po: New translation: Finnish. 
* configure.in (ALL_LINGUAS): Add fi.
* configure: Regenerate.
 2005-04-14 09:48:24 +00:00
Alan Modra
9e9b66a956 bfd/ 
* Makefile.am (NO_WERROR): Define.
	* warning.m4: New file
	* acinclude.m4: Include warning.m4.
	* configure.in: Invoke AM_BINUTILS_WARNINGS.
	* Makefile.in: Regenerate.
	* configure: Regenerate.
bfd/doc/
	* Makefile.in: Regenerate.
binutils/
	* Makefile.am (NO_WERROR): Define.  Use instead of -Wno-error.
	* configure.in: Include ../bfd/warning.m4 contents.
	* Makefile.in: Regenerate.
	* configure: Regenerate.
	* doc/Makefile.in: Regenerate.
gas/
	* Makefile.am (NO_WERROR): Define.  Use instead of -Wno-error.
	* acinclude.m4: Include ../bfd/warning.m4.
	* configure.in: Invoke AM_BINUTILS_WARNINGS.
	* Makefile.in: Regenerate.
	* configure: Regenerate.
	* doc/Makefile.in: Regenerate.
gprof/
	* Makefile.am (NO_WERROR): Define.
	* acinclude.m4: Include ../bfd/warning.m4.
	* configure.in: Invoke AM_BINUTILS_WARNINGS.
	* Makefile.in: Regenerate.
	* aclocal.m4: Regenerate.
	* configure: Regenerate.
ld/
	* Makefile.am (NO_WERROR): Define.  Use instead of -Wno-error.
	* configure.in: Include ../bfd/warning.m4 contents.
	* Makefile.in: Regenerate.
	* configure: Regenerate.
opcodes/
	* Makefile.am (NO_WERROR): Define.
	* configure.in: Invoke AM_BINUTILS_WARNINGS.
	* Makefile.in: Regenerate.
	* aclocal.m4: Regenerate.
	* configure: Regenerate.
 2005-04-14 05:26:44 +00:00
Nick Clifton
9494d73902 Initialise value to zero to avoid a compile time warning. 2005-04-04 10:09:52 +00:00
Jan Beulich
6128c599ed opcodes/ 
2005-04-01  Jan Beulich  <jbeulich@novell.com>

	* i386-dis.c (PNI_Fixup): Neither mwait nor monitor have any
	visible operands in Intel mode. The first operand of monitor is
	%rax in 64-bit mode.
 2005-04-01 16:06:40 +00:00
Jan Beulich
373ff435a8 include/opcode/ 
2005-04-01  Jan Beulich  <jbeulich@novell.com>

	* i386.h (i386_optab): Add rdtscp.

opcodes/
2005-04-01  Jan Beulich  <jbeulich@novell.com>

	* i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
	easier future additions.
 2005-04-01 16:03:40 +00:00
Jerome Guitton
4bd6089634 * configure.in: Check for basename. 
* configure: Regenerate.
        * config.in: Ditto.
 2005-03-31 16:52:54 +00:00
H.J. Lu
4cc91dba12 gas/testsuite/ 
2005-03-29  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/i386.exp: Run segment and inval-seg for i386. Run
	x86-64-segment and x86-64-inval-seg for x86-64.

	* gas/i386/intel.d: Expect movw for moving between memory and
	segment register.
	* gas/i386/naked.d: Likewise.
	* gas/i386/opcode.d: Likewise.
	* gas/i386/x86-64-opcode.d: Likewise.

	* gas/i386/opcode.s: Use movw for moving between memory and
	segment register.
	* gas/i386/x86-64-opcode.s: Likewise.

	* : Likewise.

	* gas/i386/inval-seg.l: New.
	* gas/i386/inval-seg.s: New.
	* gas/i386/segment.l: New.
	* gas/i386/segment.s: New.
	* gas/i386/x86-64-inval-seg.l: New.
	* gas/i386/x86-64-inval-seg.s: New.
	* gas/i386/x86-64-segment.l: New.
	* gas/i386/x86-64-segment.s: New.

include/opcode/

2005-03-29  H.J. Lu  <hongjiu.lu@intel.com>

	* i386.h (i386_optab): Don't allow the `l' suffix for moving
	moving between memory and segment register. Allow movq for
	moving between general-purpose register and segment register.

opcodes/

2005-03-29  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (SEG_Fixup): New.
	(Sv): New.
	(dis386): Use "Sv" for 0x8c and 0x8e.
 2005-03-29 19:30:47 +00:00
Nick Clifton
ec72cfe589 Add VAX specific disassembler option -Mentry: to specify a function entry 
address, and add code to test this new option.
 2005-03-29 16:13:48 +00:00
H.J. Lu
85064c7906 2005-03-23 H.J. Lu <hongjiu.lu@intel.com> 
* cris-dis.c (print_with_operands): Use ~31L for long instead
	of ~31.
 2005-03-23 19:21:16 +00:00
H.J. Lu
de7141c7b1 2005-03-20 H.J. Lu <hongjiu.lu@intel.com> 
* mmix-opc.c (O): Revert the last change.
	(Z): Likewise.
 2005-03-20 17:12:16 +00:00
H.J. Lu
e493ab45b1 2005-03-19 H.J. Lu <hongjiu.lu@intel.com> 
* mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
	(Z): Likewise.
 2005-03-19 18:29:14 +00:00
Hans-Peter Nilsson
d8d7c45959 * mmix-opc.c (O, Z): Force expression as unsigned long. 2005-03-19 04:23:24 +00:00
Nick Clifton
ebdb038304 Change wording of error message to "percent-operand" from "%operand" as the 
latter confuses xgettext into thinking that it is a C printf formating directive,
which	prevents proper translation.
 2005-03-18 16:12:38 +00:00
Nick Clifton
569acd2ce2 Rename switch to enable/disable -Werror to --enable-werror/--disable-werror 
for compatibility with gcc.
 2005-03-16 17:18:17 +00:00
Nick Clifton
1ad12f975f Enable -Werror by default 2005-03-16 16:17:14 +00:00
Alan Modra
4eb30afc41 * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when 
BOOKE.
 2005-03-16 02:38:39 +00:00
Alan Modra
729ae8d20e Commit new Spanish translation. 2005-03-15 05:25:37 +00:00
Alan Modra
ea8409f729 Commit new French translation. 2005-03-14 23:39:09 +00:00
Nick Clifton
4f495e616d Use ".word 0x0012 # Entry mask: r1 r2 >" instead of just "Entry mask: < r1 ... >" 2005-03-14 09:35:26 +00:00
Zack Weinberg
885fc2570f gas: 
* config/tc-arm.c (tinsns): Add ARMv6K instructions sev, wfe,
	wfi, yield.
opcodes:
	* arm-dis.c (thumb_opcodes): Add ARMv6K instructions nop, sev,
	wfe, wfi, yield.
gas/testsuite:
	* gas/arm/thumbv6k.d, gas/arm/thumbv6k.s: New dump test.
	* gas/arm/arm.exp: Run it.
 2005-03-12 18:25:47 +00:00
Zack Weinberg
b9fd58c7eb Revert accidental commit of V6K ops 2005-03-12 18:17:42 +00:00
Zack Weinberg
0a003adc41 include: 
* opcode/arm.h: Adjust comments for ARM_EXT_V4T and ARM_EXT_V5T.
	Add ARM_EXT_V6T2, ARM_ARCH_V6T2, ARM_ARCH_V6KT2, ARM_ARCH_V6ZT2,
	and ARM_ARCH_V6ZKT2.
opcodes:
	* arm-dis.c (arm_opcodes): Document %E and %V.
	Add entries for v6T2 ARM instructions:
	bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
	(print_insn_arm): Add support for %E and %V.
 2005-03-12 18:14:05 +00:00
Alan Modra
da99ee721e opcodes/ 
* ppc-opc.c (insert_sprg, extract_sprg): New Functions.
	(powerpc_operands <SPRG>): Call the above.  Bit field is 5 bits.
	(SPRG_MASK): Delete.
	(XSPRG_MASK): Mask off extra bits now part of sprg field.
        (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask.  Move
	mfsprg4..7 after msprg and consolidate.

gas/testsuite
	* gas/ppc/booke.s: Add new m[t,f]sprg testcases.
	* gas/ppc/booke.d: Likewise.
 2005-03-10 12:52:30 +00:00
Alan Modra
220abb21d1 * vax-dis.c (entry_mask_bit): New array. 
(print_insn_vax): Decode function entry mask.
 2005-03-09 13:08:26 +00:00