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MIPS/opcodes: Remove an incorrect MT ASE reference in MFC0/MTC0 decoding

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The `sel' operand of CP0 move instructions is a part of the base ISA and
has nothing to do with the MT ASE.

	opcodes/
	* mips-dis.c (print_insn_args) <default>: Remove an MT ASE
	reference in CP0 move operand decoding.
This commit is contained in:
Maciej W. Rozycki 2017-05-15 13:04:19 +01:00
parent a54d5f8bb3
commit fdfb475260
2 changed files with 6 additions and 1 deletions
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5
opcodes/ChangeLog
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@ -1,3 +1,8 @@
2017-05-15 Maciej W. Rozycki <macro@imgtec.com>
* mips-dis.c (print_insn_args) <default>: Remove an MT ASE
reference in CP0 move operand decoding.
2017-05-12 Maciej W. Rozycki <macro@imgtec.com>
* mips16-opc.c (decode_mips16_operand) <'6'>: Switch the operand

2
opcodes/mips-dis.c
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@ -1641,7 +1641,7 @@ print_insn_args (struct disassemble_info *info,
&& s[2] == 'H'
&& opcode->name[strlen (opcode->name) - 1] == '0')
{
/* Coprocessor register 0 with sel field (MT ASE). */
/* Coprocessor register 0 with sel field. */
const struct mips_cp0sel_name *n;
unsigned int reg, sel;