diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 02408b238b..4816a4e3c9 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,8 @@
+2017-05-15  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* mips-dis.c (print_insn_args) <default>: Remove an MT ASE
+	reference in CP0 move operand decoding.
+
 2017-05-12  Maciej W. Rozycki  <macro@imgtec.com>
 
 	* mips16-opc.c (decode_mips16_operand) <'6'>: Switch the operand
diff --git a/opcodes/mips-dis.c b/opcodes/mips-dis.c
index 289f50160a..ab92add7a4 100644
--- a/opcodes/mips-dis.c
+++ b/opcodes/mips-dis.c
@@ -1641,7 +1641,7 @@ print_insn_args (struct disassemble_info *info,
 	      && s[2] == 'H'
 	      && opcode->name[strlen (opcode->name) - 1] == '0')
 	    {
-	      /* Coprocessor register 0 with sel field (MT ASE).  */
+	      /* Coprocessor register 0 with sel field.  */
 	      const struct mips_cp0sel_name *n;
 	      unsigned int reg, sel;