• Joined on 2020-03-04
MatCat created repository MatCat.OpenSource/MUSH2021 2021-06-23 04:05:45 -04:00
MatCat pushed to master at MatCat.OpenSource/8SA1Sim 2021-04-15 03:37:03 -04:00
11862865f8 Support for negative and overflow, ISA work, display registers for clearing and forcing update (on SIM only for force update), memory editor, and more
MatCat pushed to master at MatCat.OpenSource/8SA1Sim 2021-04-13 04:43:34 -04:00
24161774d9 WIP to branch instuctions, implementing OVERFLOW status register flag, implamented Thread Interupt feature
MatCat pushed to master at MatCat.OpenSource/8SA1Sim 2021-04-13 00:14:13 -04:00
77056cfc49 Added most PLx instructions
MatCat pushed to master at MatCat.OpenSource/8SA1Sim 2021-04-12 03:17:23 -04:00
af38b37429 Added mnemonic and instruction count to the isa page
MatCat pushed to master at MatCat.OpenSource/8SA1Sim 2021-04-12 03:07:36 -04:00
e9a253a4d1 STx, Tx, and PHx pretty much done
MatCat pushed to master at MatCat.OpenSource/8SA1Sim 2021-04-12 00:35:53 -04:00
95ee08a318 STx instructions mostly done
MatCat pushed to master at MatCat.OpenSource/8SA1Sim 2021-04-11 19:22:50 -04:00
91c53ef074 WIP STx
MatCat pushed to master at MatCat.OpenSource/8SA1Sim 2021-04-11 16:56:22 -04:00
44df24f36e LDx mostly done except offsets
MatCat pushed to master at MatCat.OpenSource/8SA1Sim 2021-04-10 18:34:00 -04:00
55cfeb3c15 Refacotred isa file formats, added more instructions
MatCat pushed to master at MatCat.OpenSource/8SA1Sim 2021-04-10 14:49:10 -04:00
3213553372 Refacotred ISA opcodes
MatCat pushed to master at MatCat.OpenSource/8SA1Sim 2021-04-10 14:47:55 -04:00
baf56330a3 Refacotred ISA opcodes
MatCat pushed to master at MatCat.OpenSource/8SA1Sim 2021-04-10 14:47:02 -04:00
dfd3736e70 Refacotred ISA opcodes
MatCat pushed to master at MatCat.OpenSource/8SA1Sim 2021-04-10 04:08:04 -04:00
14ebbbd9e8 More instructions, more docs, more yay
MatCat pushed to master at MatCat.OpenSource/8SA1Sim 2021-04-09 05:11:02 -04:00
6168e57ab1 Fixed bug in return code
MatCat pushed to master at MatCat.OpenSource/8SA1Sim 2021-04-09 04:46:34 -04:00
a76e01aca1 Refactoring of the display and some 24 bit instructions
MatCat pushed to master at MatCat.OpenSource/8sa1-binutils-gdb 2021-04-08 19:49:32 -04:00
06a88b3b39 Avoid sequence point warning in h8300 sim
32a046ab0d Add system includes in sim
81e6e8ae40 Do not use old-style definitions in sim
83a559f7b9 Remove unused variable un darwin_nat_target::resume
b7f507caf0 Fix DTB generation mechanism and build failure
MatCat created repository MatCat.OpenSource/8sa1-binutils-gdb 2021-04-08 19:45:01 -04:00
MatCat pushed to master at MatCat.OpenSource/8SA1Sim 2021-04-08 02:14:10 -04:00
a572229c87 Working on ISA documentation
MatCat pushed to master at MatCat.OpenSource/8SA1Sim 2021-04-08 02:07:07 -04:00
d21c723894 Working on ISA documentation