MatCat.OpenSource/8sa1-binutils-gdb
1
0
Fork 0
Code Issues Pull Requests Projects Releases Wiki Activity
fe554d200d
8sa1-binutils-gdb/gdb/features/Makefile
Andrew Burgess b5ffee3181 gdb/riscv: Add target description support 
This commit adds target description support for riscv.

I've used the split feature approach for specifying the architectural
features, and the CSR feature is auto-generated from the riscv-opc.h
header file.

If the target doesn't provide a suitable target description then GDB
will build one by looking at the bfd headers.

This commit does not implement target description creation for the
Linux or FreeBSD native targets, both of these will need to add
read_description methods into their respective target classes, which
probe the target features, and then call
riscv_create_target_description to build a suitable target
description.  Until this is done Linux and FreeBSD will get the same
default target description based on the bfd that bare-metal targets
get.

I've only added feature descriptions for 32 and 64 bit registers, 128
bit registers (for RISC-V) are not supported in the reset of GDB yet.

This commit removes the special reading of the MISA register in order
to establish the target features, this was only used for figuring out
the f-register size, and even that wasn't done consistently.  We now
rely on the target to tell us what size of registers it has (or look
in the BFD as a last resort).  The result of this is that we should
now support RV64 targets with 32-bit float, though I have not
extensively tested this combination yet.

	* Makefile.in (ALL_TARGET_OBS): Add arch/riscv.o.
	(HFILES_NO_SRCDIR): Add arch/riscv.h.
	* arch/riscv.c: New file.
	* arch/riscv.h: New file.
	* configure.tgt: Add cpu_obs list of riscv, move riscv-tdep.o into
	this list, and add arch/riscv.o.
	* features/Makefile: Add riscv features.
	* features/riscv/32bit-cpu.c: New file.
	* features/riscv/32bit-cpu.xml: New file.
	* features/riscv/32bit-csr.c: New file.
	* features/riscv/32bit-csr.xml: New file.
	* features/riscv/32bit-fpu.c: New file.
	* features/riscv/32bit-fpu.xml: New file.
	* features/riscv/64bit-cpu.c: New file.
	* features/riscv/64bit-cpu.xml: New file.
	* features/riscv/64bit-csr.c: New file.
	* features/riscv/64bit-csr.xml: New file.
	* features/riscv/64bit-fpu.c: New file.
	* features/riscv/64bit-fpu.xml: New file.
	* features/riscv/rebuild-csr-xml.sh: New file.
	* riscv-tdep.c: Add 'arch/riscv.h' include.
	(riscv_gdb_reg_names): Delete.
	(csr_reggroup): New global.
	(struct riscv_register_alias): Delete.
	(struct riscv_register_feature): New structure.
	(riscv_register_aliases): Delete.
	(riscv_xreg_feature): New global.
	(riscv_freg_feature): New global.
	(riscv_virtual_feature): New global.
	(riscv_csr_feature): New global.
	(riscv_create_csr_aliases): New function.
	(riscv_read_misa_reg): Delete.
	(riscv_has_feature): Delete.
	(riscv_isa_xlen): Simplify, just return cached xlen.
	(riscv_isa_flen): Simplify, just return cached flen.
	(riscv_has_fp_abi): Update for changes in struct gdbarch_tdep.
	(riscv_register_name): Update to make use of tdesc_register_name.
	Look up xreg and freg names in the new globals riscv_xreg_feature
	and riscv_freg_feature.  Don't supply csr aliases here.
	(riscv_fpreg_q_type): Delete.
	(riscv_register_type): Use tdesc_register_type in almost all
	cases, override the returned type in a few specific cases only.
	(riscv_print_one_register_info): Handle errors reading registers.
	(riscv_register_reggroup_p): Use tdesc_register_in_reggroup_p for
	registers that are otherwise unknown to GDB.  Also check the
	csr_reggroup.
	(riscv_print_registers_info): Remove assert about upper register
	number, and use gdbarch_register_reggroup_p instead of
	short-cutting.
	(riscv_find_default_target_description): New function.
	(riscv_check_tdesc_feature): New function.
	(riscv_add_reggroups): New function.
	(riscv_setup_register_aliases): New function.
	(riscv_init_reggroups): New function.
	(_initialize_riscv_tdep): Add calls to setup CSR aliases, and
	setup register groups.  Register new riscv debug variable.
	* riscv-tdep.h: Add 'arch/riscv.h' include.
	(struct gdbarch_tdep): Remove abi union, and add
	riscv_gdbarch_features field.  Remove cached quad floating point
	type, and provide initialisation for double type field.
	* target-descriptions.c (maint_print_c_tdesc_cmd): Add riscv to
	the list of targets using the feature based target descriptions.
	* NEWS: Mention target description support.

gdb/doc/ChangeLog:

	* gdb.texinfo (Standard Target Features): Add RISC-V Features
	sub-section.
2018-11-21 13:09:50 +00:00

360 lines
13 KiB
Makefile
Raw Blame History

# Copyright (C) 2007-2018 Free Software Foundation, Inc.
# This file is part of GDB.
# This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; either version 3 of the License, or
# (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program. If not, see <http://www.gnu.org/licenses/>.
# This file requires GNU make!
# This Makefile updates files in ../regformats from their XML master
# copies. Because this relies on xsltproc, it is not normally run
# during the build process; it should be run by hand when one of the
# affected XML files is changed, and the results should be kept in the
# GDB repository.
# It can also update the C files in the features directory from their
# XML master copies. This relies on a GDB linked with expat and that
# is configured to include support for the architecture, so the files
# are kept in the GDB repository.
#
# By default we'll generate all C files, and you must point make at a
# GDB that has been configured with --enable-targets=all:
#
# make GDB=/path/to/gdb cfiles
#
# To regenerate all C files from scratch:
#
# make GDB=/path/to/gdb clean-cfiles cfiles
#
# To generate specific C files, you can override the XMLTOC make
# variable:
#
# make GDB=/path/to/gdb XMLTOC="xml files" cfiles
WHICH = aarch64 \
arm/arm-with-iwmmxt arm/arm-with-vfpv2 arm/arm-with-vfpv3 \
arm/arm-with-neon \
i386/i386 i386/i386-linux \
i386/i386-mmx-linux \
i386/amd64 i386/amd64-linux \
i386/i386-avx-linux \
i386/i386-mpx-linux \
i386/i386-avx-mpx-linux \
i386/i386-avx-avx512-linux \
i386/i386-avx-mpx-avx512-pku-linux \
i386/amd64-avx-linux \
i386/amd64-mpx-linux \
i386/amd64-avx-mpx-linux \
i386/amd64-avx-avx512-linux \
i386/amd64-avx-mpx-avx512-pku-linux \
i386/x32-linux \
i386/x32-avx-linux \
i386/x32-avx-avx512-linux \
mips-linux mips-dsp-linux \
microblaze-with-stack-protect \
mips64-linux mips64-dsp-linux \
nios2-linux \
rs6000/powerpc-32 \
rs6000/powerpc-32l rs6000/powerpc-altivec32l rs6000/powerpc-e500l \
rs6000/powerpc-64l rs6000/powerpc-altivec64l rs6000/powerpc-vsx32l \
rs6000/powerpc-vsx64l rs6000/powerpc-cell32l rs6000/powerpc-cell64l \
rs6000/powerpc-isa205-32l rs6000/powerpc-isa205-64l \
rs6000/powerpc-isa205-altivec32l rs6000/powerpc-isa205-altivec64l \
rs6000/powerpc-isa205-vsx32l rs6000/powerpc-isa205-vsx64l \
rs6000/powerpc-isa205-ppr-dscr-vsx32l \
rs6000/powerpc-isa205-ppr-dscr-vsx64l \
rs6000/powerpc-isa207-vsx32l rs6000/powerpc-isa207-vsx64l \
rs6000/powerpc-isa207-htm-vsx32l \
rs6000/powerpc-isa207-htm-vsx64l \
s390-linux32 s390-linux64 s390x-linux64 \
s390-linux32v1 s390-linux64v1 s390x-linux64v1 \
s390-linux32v2 s390-linux64v2 s390x-linux64v2 \
s390-te-linux64 s390x-te-linux64 s390-vx-linux64 s390x-vx-linux64 \
s390-tevx-linux64 s390x-tevx-linux64 \
s390-gs-linux64 s390x-gs-linux64 \
tic6x-c64xp-linux tic6x-c64x-linux tic6x-c62x-linux
# Record which registers should be sent to GDB by default after stop.
aarch64-expedite = x29,sp,pc
arm-expedite = r11,sp,pc
i386-expedite = ebp,esp,eip
amd64-expedite = rbp,rsp,rip
x32-expedite = rbp,rsp,rip
mips-expedite = r29,pc
mips-dsp-expedite = r29,pc
mips64-expedite = r29,pc
mips64-dsp-expedite = r29,pc
microblaze-expedite = r1,rpc
nios2-linux-expedite = sp,pc
or1k-expedite = r1,npc
powerpc-expedite = r1,pc
rs6000/powerpc-cell32l-expedite = r1,pc,r0,orig_r3,r4
rs6000/powerpc-cell64l-expedite = r1,pc,r0,orig_r3,r4
s390-linux32-expedite = r14,r15,pswa
s390-linux32v1-expedite = r14,r15,pswa
s390-linux32v2-expedite = r14,r15,pswa
s390-linux64-expedite = r14l,r15l,pswa
s390-linux64v1-expedite = r14l,r15l,pswa
s390-linux64v2-expedite = r14l,r15l,pswa
s390-te-linux64-expedite = r14l,r15l,pswa
s390-vx-linux64-expedite = r14l,r15l,pswa
s390-tevx-linux64-expedite = r14l,r15l,pswa
s390-gs-linux64-expedite = r14,r15,pswa
s390x-expedite = r14,r15,pswa
tic6x-expedite = A15,PC
XSLTPROC = xsltproc
outdir = ../regformats
OUTPUTS = $(patsubst %,$(outdir)/%.dat,$(WHICH))
# The set of xml files we'll generate .c files for GDB from. By
# default we'll build all .c files, which requires an
# --enable-targets=all GDB. You can override this by passing XMLTOC
# to make on the command line.
XMLTOC = \
arc-v2.xml \
arc-arcompact.xml \
arm/arm-with-iwmmxt.xml \
arm/arm-with-m-fpa-layout.xml \
arm/arm-with-m-vfp-d16.xml \
arm/arm-with-m.xml \
arm/arm-with-neon.xml \
arm/arm-with-vfpv2.xml \
arm/arm-with-vfpv3.xml \
microblaze-with-stack-protect.xml \
microblaze.xml \
mips-dsp-linux.xml \
mips-linux.xml \
mips64-dsp-linux.xml \
mips64-linux.xml \
nds32.xml \
nios2.xml \
or1k.xml \
rs6000/powerpc-32.xml \
rs6000/powerpc-32l.xml \
rs6000/powerpc-403.xml \
rs6000/powerpc-403gc.xml \
rs6000/powerpc-405.xml \
rs6000/powerpc-505.xml \
rs6000/powerpc-601.xml \
rs6000/powerpc-602.xml \
rs6000/powerpc-603.xml \
rs6000/powerpc-604.xml \
rs6000/powerpc-64.xml \
rs6000/powerpc-64l.xml \
rs6000/powerpc-7400.xml \
rs6000/powerpc-750.xml \
rs6000/powerpc-860.xml \
rs6000/powerpc-altivec32.xml \
rs6000/powerpc-altivec32l.xml \
rs6000/powerpc-altivec64.xml \
rs6000/powerpc-altivec64l.xml \
rs6000/powerpc-cell32l.xml \
rs6000/powerpc-cell64l.xml \
rs6000/powerpc-e500.xml \
rs6000/powerpc-e500l.xml \
rs6000/powerpc-isa205-32l.xml \
rs6000/powerpc-isa205-64l.xml \
rs6000/powerpc-isa205-altivec32l.xml \
rs6000/powerpc-isa205-altivec64l.xml \
rs6000/powerpc-isa205-vsx32l.xml \
rs6000/powerpc-isa205-vsx64l.xml \
rs6000/powerpc-isa205-ppr-dscr-vsx32l.xml \
rs6000/powerpc-isa205-ppr-dscr-vsx64l.xml \
rs6000/powerpc-isa207-vsx32l.xml \
rs6000/powerpc-isa207-vsx64l.xml \
rs6000/powerpc-isa207-htm-vsx32l.xml \
rs6000/powerpc-isa207-htm-vsx64l.xml \
rs6000/powerpc-vsx32.xml \
rs6000/powerpc-vsx32l.xml \
rs6000/powerpc-vsx64.xml \
rs6000/powerpc-vsx64l.xml \
rs6000/rs6000.xml \
s390-linux32.xml \
s390-linux32v1.xml \
s390-linux32v2.xml \
s390-linux64.xml \
s390-linux64v1.xml \
s390-linux64v2.xml \
s390-te-linux64.xml \
s390x-linux64.xml \
s390x-linux64v1.xml \
s390x-linux64v2.xml \
s390x-te-linux64.xml \
s390-tevx-linux64.xml \
s390-vx-linux64.xml \
s390x-tevx-linux64.xml \
s390x-vx-linux64.xml \
s390-gs-linux64.xml \
s390x-gs-linux64.xml
TDESC_CFILES = $(patsubst %.xml,%.c,$(XMLTOC))
GDB = false
#Targets which use feature based target descriptions.
aarch64-feature = 1
i386-feature = 1
riscv-feature = 1
tic6x-feature = 1
all: $(OUTPUTS)
$(outdir)/%.dat: %.xml number-regs.xsl sort-regs.xsl gdbserver-regs.xsl
echo "# THIS FILE IS GENERATED. -*- buffer-read-only: t -*- vi :set ro:" > $(outdir)/$*.tmp
echo "# Generated from: $<" >> $(outdir)/$*.tmp
echo "name:`echo $(notdir $*) | sed 's/-/_/g'`" >> $(outdir)/$*.tmp
$(if $($(firstword $(subst /, ,$(subst -, ,$*)))-feature), echo "feature:1") >> $(outdir)/$*.tmp
echo "xmltarget:$(<F)" >> $(outdir)/$*.tmp
echo "expedite:$(if $($*-expedite),$($*-expedite),$($(firstword $(subst -, ,$(notdir $*)))-expedite))" \
>> $(outdir)/$*.tmp
$(XSLTPROC) --path "$(PWD)" --xinclude number-regs.xsl $< | \
$(XSLTPROC) sort-regs.xsl - | \
$(XSLTPROC) gdbserver-regs.xsl - >> $(outdir)/$*.tmp
sh ../../move-if-change $(outdir)/$*.tmp $(outdir)/$*.dat
FEATURE_XMLFILES = aarch64-core.xml \
aarch64-fpu.xml \
i386/32bit-core.xml \
i386/32bit-sse.xml \
i386/32bit-linux.xml \
i386/32bit-avx.xml \
i386/32bit-mpx.xml \
i386/32bit-avx512.xml \
i386/32bit-pkeys.xml \
i386/64bit-avx512.xml \
i386/64bit-core.xml \
i386/64bit-mpx.xml \
i386/64bit-segments.xml \
i386/64bit-avx.xml \
i386/64bit-linux.xml \
i386/64bit-pkeys.xml \
i386/64bit-sse.xml \
i386/x32-core.xml \
riscv/32bit-cpu.xml \
riscv/32bit-csr.xml \
riscv/32bit-fpu.xml \
riscv/64bit-cpu.xml \
riscv/64bit-csr.xml \
riscv/64bit-fpu.xml \
tic6x-c6xp.xml \
tic6x-core.xml \
tic6x-gp.xml
FEATURE_CFILES = $(patsubst %.xml,%.c,$(FEATURE_XMLFILES))
cfiles: $(TDESC_CFILES) $(FEATURE_CFILES)
$(TDESC_CFILES): %.c: %.xml
$(GDB) -nx -q -batch -ex 'maint print c-tdesc $<' > $@.tmp
sh ../../move-if-change $@.tmp $@
$(FEATURE_CFILES): %.c: %.xml.tmp
$(GDB) -nx -q -batch \
-ex 'maint print c-tdesc $<' > $@.tmp
sh ../../move-if-change $@.tmp $@
rm $<
# %.xml is the XML file for each target description feature, and
# %.xml.tmp is the XML file target description which only includes
# one target description feature.
%.xml.tmp: %.xml
echo "<?xml version=\"1.0\"?>" > $@.tmp
echo "<!DOCTYPE target SYSTEM \"gdb-target.dtd\">" >> $@.tmp
echo "<target>" >> $@.tmp
echo " <xi:include href=\"$(notdir $<)\"/>" >> $@.tmp
echo "</target>" >> $@.tmp
sh ../../move-if-change $@.tmp $@
# Other dependencies.
$(outdir)/arm/arm-with-iwmmxt.dat: arm/arm-core.xml arm/xscale-iwmmxt.xml
$(outdir)/i386/i386.dat: i386/32bit-core.xml i386/32bit-sse.xml
$(outdir)/i386/i386-linux.dat: i386/32bit-core.xml i386/32bit-sse.xml \
i386/32bit-linux.xml
$(outdir)/i386/amd64.dat: i386/64bit-core.xml i386/64bit-sse.xml \
i386/64bit-segments.xml
$(outdir)/i386/amd64-linux.dat: i386/64bit-core.xml i386/64bit-sse.xml \
i386/64bit-linux.xml i386/64bit-segments.xml
$(outdir)/i386/i386-avx.dat: i386/32bit-core.xml i386/32bit-avx.xml
$(outdir)/i386/i386-avx-linux.dat: i386/32bit-core.xml i386/32bit-avx.xml \
i386/32bit-linux.xml
$(outdir)/i386/i386-mpx.dat: i386/32bit-core.xml i386/32bit-avx.xml \
i386/32bit-mpx.xml
$(outdir)/i386/i386-mpx-linux.dat: i386/32bit-core.xml i386/32bit-avx.xml \
i386/32bit-linux.xml i386/32bit-mpx.xml
$(outdir)/i386/i386-mpx-linux.dat: i386/32bit-core.xml \
i386/32bit-linux.xml i386/32bit-mpx.xml
$(outdir)/i386/i386-avx-mpx-linux.dat: i386/32bit-core.xml \
i386/32bit-linux.xml i386/32bit-mpx.xml
$(outdir)/i386/i386-avx-avx512.dat: i386/32bit-core.xml i386/32bit-avx.xml \
i386/32bit-avx512.xml
$(outdir)/i386/i386-avx-avx512-linux.dat: i386/32bit-core.xml i386/32bit-avx.xml \
i386/32bit-linux.xml i386/32bit-avx512.xml
$(outdir)/i386/i386-avx-mpx-avx512-pku.dat: i386/32bit-core.xml \
i386/32bit-avx.xml i386/32bit-mpx.xml i386/32bit-avx512.xml \
i386/32bit-pkeys.xml
$(outdir)/i386/i386-avx-mpx-avx512-pku-linux.dat: i386/32bit-core.xml \
i386/32bit-avx.xml i386/32bit-mpx.xml i386/32bit-avx512.xml \
i386/32bit-pkeys.xml i386/32bit-linux.xml
$(outdir)/i386/i386-mmx.dat: i386/32bit-core.xml
$(outdir)/i386/i386-mmx-linux.dat: i386/32bit-core.xml i386/32bit-linux.xml
$(outdir)/i386/amd64-avx.dat: i386/64bit-core.xml i386/64bit-avx.xml \
i386/64bit-segments.xml
$(outdir)/i386/amd64-avx-linux.dat: i386/64bit-core.xml i386/64bit-avx.xml \
i386/64bit-linux.xml i386/64bit-segments.xml
$(outdir)/i386/amd64-mpx-linux.dat: i386/64bit-core.xml i386/64bit-avx.xml \
i386/64bit-linux.xml i386/64bit-segments.xml i386/64bit-mpx.xml
$(outdir)/i386/amd64-avx-mpx-linux.dat: i386/64bit-core.xml \
i386/64bit-linux.xml i386/64bit-segments.xml i386/64bit-mpx.xml
$(outdir)/i386/amd64-mpx.dat: i386/64bit-core.xml i386/64bit-avx.xml \
i386/64bit-segments.xml i386/64bit-mpx.xml
$(outdir)/i386/amd64-avx-mpx.dat: i386/64bit-core.xml \
i386/64bit-segments.xml i386/64bit-mpx.xml
$(outdir)/i386/amd64-avx-avx512.dat: i386/64bit-core.xml i386/64bit-avx.xml \
i386/64bit-avx512.xml i386/64bit-segments.xml
$(outdir)/i386/amd64-avx-avx512-linux.dat: i386/64bit-core.xml i386/64bit-avx.xml \
i386/64bit-avx512.xml i386/64bit-linux.xml
$(outdir)/i386/amd64-avx-mpx-avx512-pku.dat: i386/64bit-core.xml \
i386/64bit-avx.xml i386/64bit-mpx.xml i386/64bit-avx512.xml \
i386/64bit-pkeys.xml i386/64bit-segments.xml
$(outdir)/i386/amd64-avx-mpx-avx512-pku-linux.dat: i386/64bit-core.xml \
i386/64bit-avx.xml i386/64bit-mpx.xml i386/64bit-avx512.xml \
i386/64bit-linux.xml i386/64bit-segments.xml \
i386/64bit-pkeys.xml
$(outdir)/i386/x32.dat: i386/x32-core.xml i386/64bit-sse.xml
$(outdir)/i386/x32-linux.dat: i386/x32-core.xml i386/64bit-sse.xml \
i386/64bit-linux.xml i386/64bit-segments.xml
$(outdir)/i386/x32-avx.dat: i386/x32-core.xml i386/64bit-avx.xml
$(outdir)/i386/x32-avx-linux.dat: i386/x32-core.xml i386/64bit-avx.xml \
i386/64bit-linux.xml i386/64bit-segments.xml
$(outdir)/i386/x32-avx-avx512.dat: i386/x32-core.xml i386/64bit-avx.xml \
i386/64bit-avx512.xml
$(outdir)/i386/x32-avx-avx512-linux.dat: i386/x32-core.xml i386/64bit-avx.xml \
i386/64bit-avx512.xml i386/64bit-linux.xml \
i386/64bit-segments.xml
# Regenerate RISC-V CSR feature lists.
riscv/32bit-csr.xml riscv/64bit-csr.xml: ../../include/opcode/riscv-opc.h
./riscv/rebuild-csr-xml.sh ../../include/opcode/riscv-opc.h ./riscv
# 'all' doesn't build the C files, so don't delete them in 'clean'
# either.
clean-cfiles:
rm -f $(TDESC_CFILES) $(FEATURE_CFILES)
clean:
rm -f $(OUTPUTS)
Reference in New Issue View Git Blame Copy Permalink