c9e9227878
In commit 2645e1d079 ("x86: add support for AVX-512 VPCMP*{B,W}
pseudo-ops") I screwed up the Disp8MemShift values of the AVX512VL
variants.
63 lines
1.8 KiB
Plaintext
63 lines
1.8 KiB
Plaintext
2018-01-10 Jan Beulich <jbeulich@suse.com>
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* i386-opc.tbl (vpcmpeqb, vpcmpleb, vpcmpltb, vpcmpneqb,
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vpcmpnleb, vpcmpnltb, vpcmpequb, vpcmpleub, vpcmpltub,
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vpcmpnequb, vpcmpnleub, vpcmpnltub, vpcmpeqw, vpcmplew,
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vpcmpltw, vpcmpneqw, vpcmpnlew, vpcmpnltw, vpcmpequw, vpcmpleuw,
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vpcmpltuw, vpcmpnequw, vpcmpnleuw, vpcmpnltuw): Adjust
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Disp8MemShift of AVX512VL forms.
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* i386-tbl.h: Re-generate.
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2018-01-09 Jim Wilson <jimw@sifive.com>
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* riscv-dis.c (maybe_print_address): If base_reg is zero,
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then the hi_addr value is zero.
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2018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
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* arm-dis.c (arm_opcodes): Add csdb.
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(thumb32_opcodes): Add csdb.
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2018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
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* aarch64-tbl.h (aarch64_opcode_table): Add "csdb".
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* aarch64-asm-2.c: Regenerate.
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* aarch64-dis-2.c: Regenerate.
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* aarch64-opc-2.c: Regenerate.
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2018-01-08 H.J. Lu <hongjiu.lu@intel.com>
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PR gas/22681
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* i386-opc.tbl: Properly encode vmovd with Qword memeory operand.
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Remove AVX512 vmovd with 64-bit operands.
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* i386-tbl.h: Regenerated.
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2018-01-05 Jim Wilson <jimw@sifive.com>
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* riscv-dis.c (print_insn_args) <'s'>: Call maybe_print_address for a
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jalr.
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2018-01-03 Alan Modra <amodra@gmail.com>
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Update year range in copyright notice of all files.
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2018-01-02 Jan Beulich <jbeulich@suse.com>
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* i386-gen.c (operand_type_init): Restore OPERAND_TYPE_REGYMM
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and OPERAND_TYPE_REGZMM entries.
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For older changes see ChangeLog-2017
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Copyright (C) 2018 Free Software Foundation, Inc.
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Copying and distribution of this file, with or without modification,
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are permitted in any medium without royalty provided the copyright
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notice and this notice are preserved.
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Local Variables:
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mode: change-log
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left-margin: 8
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fill-column: 74
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version-control: never
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End:
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