c14d22a7a7
(CPU_OBJS): New variable. (SIM_OBJS): Add sparc-desc.o. (SIM_EXTRA_DEPS): Replace cpu-opc.h with sparc-desc.h. (sim-core.o): Add dev64.h dependency. (dev64.o): Add rule. (stamp-arch,stamp-cpu32): Update FLAGS variable, option syntax changed. (stamp-cpu64): Ditto. (stamp-desc): New rule. * configure.in (sim_link_files,sim_link_links): Delete. Set cpu_objs to one of SPARC32_OBJS,SPARC64_OBJS. * configure: Rebuild. * acconfig.h: Rebuild. * config.in: Rebuild. * dev64.c: New file. * dev64.h: New file. * sparc64.c: New file. * trap64.h: New file. * arch.c,arch.h,cpuall.h: Rebuild. * cpu32.c,decode32.c,decode32.h,model32.c,sem32.c: Rebuild. * sim-if.c (sparc_disassemble_insn): New function. (sim_open): sparc_cgen_cpu_open renamed from sparc_cgen_opcode_open. Set disassembler. (sim_close): sparc_cgen_cpu_open renamed from sparc_cgen_opcode_open. * sim-main.h: Don't include cpu-opc.h,cpu-sim.h. Include sparc-desc.h,sparc-opc.h,sparc-sim.h.
150 lines
5.1 KiB
C
150 lines
5.1 KiB
C
/* Simulator header for sparc.
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THIS FILE IS MACHINE GENERATED WITH CGEN.
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Copyright (C) 1999 Cygnus Solutions, Inc.
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This file is part of the Cygnus Simulators.
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*/
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#ifndef SPARC_ARCH_H
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#define SPARC_ARCH_H
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#define TARGET_BIG_ENDIAN 1
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/* Cover fns for register access. */
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USI a_sparc_h_pc_get (SIM_CPU *);
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void a_sparc_h_pc_set (SIM_CPU *, USI);
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SI a_sparc_h_npc_get (SIM_CPU *);
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void a_sparc_h_npc_set (SIM_CPU *, SI);
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SI a_sparc_h_gr_get (SIM_CPU *, UINT);
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void a_sparc_h_gr_set (SIM_CPU *, UINT, SI);
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BI a_sparc_h_icc_c_get (SIM_CPU *);
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void a_sparc_h_icc_c_set (SIM_CPU *, BI);
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BI a_sparc_h_icc_n_get (SIM_CPU *);
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void a_sparc_h_icc_n_set (SIM_CPU *, BI);
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BI a_sparc_h_icc_v_get (SIM_CPU *);
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void a_sparc_h_icc_v_set (SIM_CPU *, BI);
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BI a_sparc_h_icc_z_get (SIM_CPU *);
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void a_sparc_h_icc_z_set (SIM_CPU *, BI);
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BI a_sparc_h_xcc_c_get (SIM_CPU *);
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void a_sparc_h_xcc_c_set (SIM_CPU *, BI);
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BI a_sparc_h_xcc_n_get (SIM_CPU *);
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void a_sparc_h_xcc_n_set (SIM_CPU *, BI);
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BI a_sparc_h_xcc_v_get (SIM_CPU *);
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void a_sparc_h_xcc_v_set (SIM_CPU *, BI);
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BI a_sparc_h_xcc_z_get (SIM_CPU *);
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void a_sparc_h_xcc_z_set (SIM_CPU *, BI);
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SI a_sparc_h_y_get (SIM_CPU *);
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void a_sparc_h_y_set (SIM_CPU *, SI);
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SI a_sparc_h_asr_get (SIM_CPU *, UINT);
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void a_sparc_h_asr_set (SIM_CPU *, UINT, SI);
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BI a_sparc_h_annul_p_get (SIM_CPU *);
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void a_sparc_h_annul_p_set (SIM_CPU *, BI);
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SF a_sparc_h_fr_get (SIM_CPU *, UINT);
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void a_sparc_h_fr_set (SIM_CPU *, UINT, SF);
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USI a_sparc_h_psr_get (SIM_CPU *);
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void a_sparc_h_psr_set (SIM_CPU *, USI);
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BI a_sparc_h_s_get (SIM_CPU *);
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void a_sparc_h_s_set (SIM_CPU *, BI);
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BI a_sparc_h_ps_get (SIM_CPU *);
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void a_sparc_h_ps_set (SIM_CPU *, BI);
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UQI a_sparc_h_pil_get (SIM_CPU *);
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void a_sparc_h_pil_set (SIM_CPU *, UQI);
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BI a_sparc_h_et_get (SIM_CPU *);
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void a_sparc_h_et_set (SIM_CPU *, BI);
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SI a_sparc_h_tbr_get (SIM_CPU *);
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void a_sparc_h_tbr_set (SIM_CPU *, SI);
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UQI a_sparc_h_cwp_get (SIM_CPU *);
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void a_sparc_h_cwp_set (SIM_CPU *, UQI);
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USI a_sparc_h_wim_get (SIM_CPU *);
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void a_sparc_h_wim_set (SIM_CPU *, USI);
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QI a_sparc_h_ag_get (SIM_CPU *);
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void a_sparc_h_ag_set (SIM_CPU *, QI);
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BI a_sparc_h_ec_get (SIM_CPU *);
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void a_sparc_h_ec_set (SIM_CPU *, BI);
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BI a_sparc_h_ef_get (SIM_CPU *);
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void a_sparc_h_ef_set (SIM_CPU *, BI);
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USI a_sparc_h_fsr_get (SIM_CPU *);
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void a_sparc_h_fsr_set (SIM_CPU *, USI);
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UDI a_sparc_h_ver_get (SIM_CPU *);
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void a_sparc_h_ver_set (SIM_CPU *, UDI);
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UDI a_sparc_h_pstate_get (SIM_CPU *);
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void a_sparc_h_pstate_set (SIM_CPU *, UDI);
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UDI a_sparc_h_tba_get (SIM_CPU *);
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void a_sparc_h_tba_set (SIM_CPU *, UDI);
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UDI a_sparc_h_tt_get (SIM_CPU *);
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void a_sparc_h_tt_set (SIM_CPU *, UDI);
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UQI a_sparc_h_asi_get (SIM_CPU *);
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void a_sparc_h_asi_set (SIM_CPU *, UQI);
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UQI a_sparc_h_tl_get (SIM_CPU *);
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void a_sparc_h_tl_set (SIM_CPU *, UQI);
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UDI a_sparc_h_tpc_get (SIM_CPU *);
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void a_sparc_h_tpc_set (SIM_CPU *, UDI);
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UDI a_sparc_h_tnpc_get (SIM_CPU *);
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void a_sparc_h_tnpc_set (SIM_CPU *, UDI);
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UDI a_sparc_h_tstate_get (SIM_CPU *);
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void a_sparc_h_tstate_set (SIM_CPU *, UDI);
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UDI a_sparc_h_tick_get (SIM_CPU *);
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void a_sparc_h_tick_set (SIM_CPU *, UDI);
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UDI a_sparc_h_cansave_get (SIM_CPU *);
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void a_sparc_h_cansave_set (SIM_CPU *, UDI);
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UDI a_sparc_h_canrestore_get (SIM_CPU *);
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void a_sparc_h_canrestore_set (SIM_CPU *, UDI);
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UDI a_sparc_h_otherwin_get (SIM_CPU *);
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void a_sparc_h_otherwin_set (SIM_CPU *, UDI);
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UDI a_sparc_h_cleanwin_get (SIM_CPU *);
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void a_sparc_h_cleanwin_set (SIM_CPU *, UDI);
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UDI a_sparc_h_wstate_get (SIM_CPU *);
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void a_sparc_h_wstate_set (SIM_CPU *, UDI);
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UQI a_sparc_h_fcc0_get (SIM_CPU *);
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void a_sparc_h_fcc0_set (SIM_CPU *, UQI);
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UQI a_sparc_h_fcc1_get (SIM_CPU *);
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void a_sparc_h_fcc1_set (SIM_CPU *, UQI);
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UQI a_sparc_h_fcc2_get (SIM_CPU *);
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void a_sparc_h_fcc2_set (SIM_CPU *, UQI);
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UQI a_sparc_h_fcc3_get (SIM_CPU *);
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void a_sparc_h_fcc3_set (SIM_CPU *, UQI);
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UQI a_sparc_h_fsr_rd_get (SIM_CPU *);
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void a_sparc_h_fsr_rd_set (SIM_CPU *, UQI);
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UQI a_sparc_h_fsr_tem_get (SIM_CPU *);
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void a_sparc_h_fsr_tem_set (SIM_CPU *, UQI);
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BI a_sparc_h_fsr_ns_get (SIM_CPU *);
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void a_sparc_h_fsr_ns_set (SIM_CPU *, BI);
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UQI a_sparc_h_fsr_ver_get (SIM_CPU *);
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void a_sparc_h_fsr_ver_set (SIM_CPU *, UQI);
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UQI a_sparc_h_fsr_ftt_get (SIM_CPU *);
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void a_sparc_h_fsr_ftt_set (SIM_CPU *, UQI);
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BI a_sparc_h_fsr_qne_get (SIM_CPU *);
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void a_sparc_h_fsr_qne_set (SIM_CPU *, BI);
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UQI a_sparc_h_fsr_aexc_get (SIM_CPU *);
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void a_sparc_h_fsr_aexc_set (SIM_CPU *, UQI);
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UQI a_sparc_h_fsr_cexc_get (SIM_CPU *);
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void a_sparc_h_fsr_cexc_set (SIM_CPU *, UQI);
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BI a_sparc_h_fpsr_fef_get (SIM_CPU *);
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void a_sparc_h_fpsr_fef_set (SIM_CPU *, BI);
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BI a_sparc_h_fpsr_du_get (SIM_CPU *);
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void a_sparc_h_fpsr_du_set (SIM_CPU *, BI);
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BI a_sparc_h_fpsr_dl_get (SIM_CPU *);
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void a_sparc_h_fpsr_dl_set (SIM_CPU *, BI);
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UQI a_sparc_h_fpsr_get (SIM_CPU *);
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void a_sparc_h_fpsr_set (SIM_CPU *, UQI);
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/* Enum declaration for model types. */
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typedef enum model_type {
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MODEL_SPARC32_DEF, MODEL_SPARC64_DEF, MODEL_MAX
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} MODEL_TYPE;
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#define MAX_MODELS ((int) MODEL_MAX)
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/* Enum declaration for unit types. */
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typedef enum unit_type {
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UNIT_NONE, UNIT_SPARC32_DEF_U_EXEC, UNIT_SPARC64_DEF_U_EXEC, UNIT_MAX
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} UNIT_TYPE;
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#define MAX_UNITS (1)
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#endif /* SPARC_ARCH_H */
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