91d8b67066
CSDB is a new instruction which Arm has defined. As it shares the encoding space with NOP instructions, it is available from Armv3 in Arm mode, and Armv6T2 in Thumb mode. OK? If so, please commit on my behalf as I don't have commit rights over here. Thanks, James --- opcodes/ 2018-01-09 James Greenhalgh <james.greenhalgh@arm.com> * arm-dis.c (arm_opcodes): Add csdb. (thumb32_opcodes): Add csdb. gas/ 2018-01-09 James Greenhalgh <james.greenhalgh@arm.com> * config/tc-arm.c (insns): Add csdb, enable for Armv3 and above in Arm execution state, and Armv6T2 and above in Thumb execution state. * testsuite/gas/arm/csdb.s: New. * testsuite/gas/arm/csdb.d: New. * testsuite/gas/arm/thumb2_it_bad.l: Add csdb. * testsuite/gas/arm/thumb2_it_bad.s: Add csdb.
48 lines
1.2 KiB
Plaintext
48 lines
1.2 KiB
Plaintext
2018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
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* arm-dis.c (arm_opcodes): Add csdb.
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(thumb32_opcodes): Add csdb.
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2018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
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* aarch64-tbl.h (aarch64_opcode_table): Add "csdb".
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* aarch64-asm-2.c: Regenerate.
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* aarch64-dis-2.c: Regenerate.
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* aarch64-opc-2.c: Regenerate.
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2018-01-08 H.J. Lu <hongjiu.lu@intel.com>
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PR gas/22681
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* i386-opc.tbl: Properly encode vmovd with Qword memeory operand.
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Remove AVX512 vmovd with 64-bit operands.
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* i386-tbl.h: Regenerated.
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2018-01-05 Jim Wilson <jimw@sifive.com>
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* riscv-dis.c (print_insn_args) <'s'>: Call maybe_print_address for a
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jalr.
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2018-01-03 Alan Modra <amodra@gmail.com>
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Update year range in copyright notice of all files.
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2018-01-02 Jan Beulich <jbeulich@suse.com>
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* i386-gen.c (operand_type_init): Restore OPERAND_TYPE_REGYMM
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and OPERAND_TYPE_REGZMM entries.
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For older changes see ChangeLog-2017
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Copyright (C) 2018 Free Software Foundation, Inc.
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Copying and distribution of this file, with or without modification,
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are permitted in any medium without royalty provided the copyright
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notice and this notice are preserved.
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Local Variables:
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mode: change-log
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left-margin: 8
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fill-column: 74
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version-control: never
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End:
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