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Author SHA1 Message Date
Andrew Jenner
b8891f8d62 Add support for the C_SKY series of processors. 
This patch series is a new binutils port for C-SKY processors, including support for both the V1 and V2 processor variants.  V1 is derived from the MCore architecture while V2 is substantially different, with mixed 16- and 32-bit instructions, a larger register set, a different (but overlapping) ABI, etc.  There is support for bare-metal ELF targets and Linux with both glibc and uClibc.

This code is being contributed jointly by C-SKY Microsystems and Mentor Graphics.  C-SKY is responsible for the technical content and has proposed Lifang Xia and Yunhai Shang as port maintainers.  (Note that C-SKY does have a corporate copyright assignment on file with the FSF.) Mentor Graphics' role has been cleaning up the code, adding documentation and additional test cases, etc, to address issues we anticipated reviewers would complain about.

bfd     * Makefile.am (ALL_MACHINES, ALL_MACHINES_CFILES): Add C-SKY.
        (BFD32_BACKENDS, BFD_BACKENDS_CFILES): Likewise.
        * Makefile.in: Regenerated.
        * archures.c (enum bfd_architecture): Add bfd_arch_csky and
        related bfd_mach defines.
        (bfd_csky_arch): Declare.
        (bfd_archures_list): Add C-SKY.
        * bfd-in.h (elf32_csky_build_stubs): Declare.
        (elf32_csky_size_stubs): Declare.
        (elf32_csky_next_input_section: Declare.
        (elf32_csky_setup_section_lists): Declare.
        * bfd-in2.h: Regenerated.
        * config.bfd: Add C-SKY.
        * configure.ac: Likewise.
        * configure: Regenerated.
        * cpu-csky.c: New file.
        * elf-bfd.h (enum elf_target_id): Add C-SKY.
        * elf32-csky.c: New file.
        * libbfd.h: Regenerated.
        * reloc.c: Add C-SKY relocations.
        * targets.c (csky_elf32_be_vec, csky_elf32_le_vec): Declare.
        (_bfd_target_vector): Add C-SKY target vector entries.

binutils* readelf.c: Include elf/csky.h.
        (guess_is_rela): Handle EM_CSKY.
        (dump_relocations): Likewise.
        (get_machine_name): Likewise.
        (is_32bit_abs_reloc): Likewise.

include  * dis-asm.h (csky_symbol_is_valid): Declare.
         * opcode/csky.h: New file.

opcodes  * Makefile.am (TARGET_LIBOPCODES_CFILES): Add csky-dis.c.
         * Makefile.in: Regenerated.
         * configure.ac: Add C-SKY.
         * configure: Regenerated.
         * csky-dis.c: New file.
         * csky-opc.h: New file.
         * disassemble.c (ARCH_csky): Define.
         (disassembler, disassemble_init_for_target): Add case for ARCH_csky.
         * disassemble.h (print_insn_csky, csky_get_disassembler): Declare.

gas      * Makefile.am (TARGET_CPU_CFILES): Add entry for C-SKY.
         (TARGET_CPU_HFILES, TARGET_ENV_HFILES): Likewise.
         * Makefile.in: Regenerated.
         * config/tc-csky.c: New file.
         * config/tc-csky.h: New file.
         * config/te-csky_abiv1.h: New file.
         * config/te-csky_abiv1_linux.h: New file.
         * config/te-csky_abiv2.h: New file.
         * config/te-csky_abiv2_linux.h: New file.
         * configure.tgt: Add C-SKY.
         * doc/Makefile.am (CPU_DOCS): Add entry for C-SKY.
         * doc/Makefile.in: Regenerated.
         * doc/all.texi: Set CSKY feature.
         * doc/as.texi (Overview): Add C-SKY options.
         (Machine Dependencies): Likewise.
         * doc/c-csky.texi: New file.
         * testsuite/gas/csky/*: New test cases.

ld      * Makefile.am (ALL_EMULATION_SOURCES): Add C-SKY emulations.
        (ecskyelf.c, ecskyelf_linux.c): New rules.
        * Makefile.in: Regenerated.
        * configure.tgt: Add C-SKY.
        * emulparams/cskyelf.sh: New file.
        * emulparams/cskyelf_linux.sh: New file.
        * emultempl/cskyelf.em: New file.
        * gen-doc.texi: Add C-SKY.
        * ld.texi: Likewise.
        (Options specific to C-SKY targets): New section.
        * testsuite/ld-csky/*: New tests.
 2018-07-30 12:24:14 +01:00
Mephi
ed1299fe46 Add support for the TLV relocation generated by LLVM for x86_64 MACH-O targets. 
PR 23297
	* mach-o-x86-64.c (x86_64_howto_table): Add entry for
	BFD_RELOC_MACH_O_X86_64_RELOC_TLV.
	(bfd_mach_o_x86_64_canonicalize_one_reloc): Handle the new reloc.
	(bfd_mach_o_x86_64_swap_reloc_out): Likewise.
	* reloc.c (BFD_RELOC_MACH_O_X86_64_TV): New entry.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Regenerate.
 2018-06-18 12:56:44 +01:00
John Darrington
7b4ae82428 Add support for the Freescale s12z processor. 
bfd	* Makefile.am: Add s12z files.
	* Makefile.in: Regenerate.
	* archures.c: Add bfd_s12z_arch.
	* bfd-in.h: Add exports of bfd_putb24 and bfd_putl24.
	* bfd-in2.h: Regenerate.
	* config.bfd: Add s12z target.
	* configure.ac: Add s12z target.
	* configure: Regenerate.
	* cpu-s12z.c: New file.
	* elf32-s12z.c: New file.
	* libbfd.c (bfd_putb24): New function.
	(bfd_putl24): New function.
	* libbfd.h: Regenerate.
	* reloc.c: Add s12z relocations.
	(bfd_get_reloc_size): Handle size 5 relocs.
	* targets.c: Add s12z_elf32_vec.

opcodes	* Makefile.am: Add support for s12z architecture.
	* configure.ac: Likewise.
	* disassemble.c: Likewise.
	* disassemble.h: Likewise.
	* Makefile.in: Regenerate.
	* configure: Regenerate.
	* s12z-dis.c: New file.
	* s12z.h: New file.

include	* elf/s12z.h: New header.

ld	* Makefile.am: Add support for s12z architecture.
	* configure.tgt: Likewise.
	* Makefile.in: Regenerate.
	* emulparams/m9s12zelf.sh: New file.
	* scripttempl/elfm9s12z.sc: New file.
	* testsuite/ld-discard/static.d: Expect to fail for the s12z
	target.
	* testsuite/ld-elf/endsym.d: Likewise.
	* testsuite/ld-elf/merge.d: Likewise.
	* testsuite/ld-elf/pr14926.d: Skip for the s12z target.
	* testsuite/ld-elf/sec64k.exp: Likewise.
	* testsuite/ld-s12z: New directory.
	* testsuite/ld-s12z/opr-linking.d: New file.
	* testsuite/ld-s12z/opr-linking.s: New file.
	* testsuite/ld-s12z/relative-linking.d: New file.
	* testsuite/ld-s12z/relative-linking.s: New file.
	* testsuite/ld-s12z/z12s.exp: New file.

gas	* Makefile.am: Add support for s12z target.
	* Makefile.in: Regenerate.
	* NEWS: Mention the new support.
	* config/tc-s12z.c: New file.
	* config/tc-s12z.h: New file.
	* configure.tgt: Add  s12z support.
	* doc/Makefile.am: Likewise.
	* doc/Makefile.in: Regenerate.
	* doc/all.texi: Add s12z documentation.
	* doc/as.textinfo: Likewise.
	* doc/c-s12z.texi: New file.
	* testsuite/gas/s12z: New directory.
	* testsuite/gas/s12z/abs.d: New file.
	* testsuite/gas/s12z/abs.s: New file.
	* testsuite/gas/s12z/adc-imm.d: New file.
	* testsuite/gas/s12z/adc-imm.s: New file.
	* testsuite/gas/s12z/adc-opr.d: New file.
	* testsuite/gas/s12z/adc-opr.s: New file.
	* testsuite/gas/s12z/add-imm.d: New file.
	* testsuite/gas/s12z/add-imm.s: New file.
	* testsuite/gas/s12z/add-opr.d: New file.
	* testsuite/gas/s12z/add-opr.s: New file.
	* testsuite/gas/s12z/and-imm.d: New file.
	* testsuite/gas/s12z/and-imm.s: New file.
	* testsuite/gas/s12z/and-opr.d: New file.
	* testsuite/gas/s12z/and-opr.s: New file.
	* testsuite/gas/s12z/and-or-cc.d: New file.
	* testsuite/gas/s12z/and-or-cc.s: New file.
	* testsuite/gas/s12z/bfext-special.d: New file.
	* testsuite/gas/s12z/bfext-special.s: New file.
	* testsuite/gas/s12z/bfext.d: New file.
	* testsuite/gas/s12z/bfext.s: New file.
	* testsuite/gas/s12z/bit-manip.d: New file.
	* testsuite/gas/s12z/bit-manip.s: New file.
	* testsuite/gas/s12z/bit.d: New file.
	* testsuite/gas/s12z/bit.s: New file.
	* testsuite/gas/s12z/bra-expression-defined.d: New file.
	* testsuite/gas/s12z/bra-expression-defined.s: New file.
	* testsuite/gas/s12z/bra-expression-undef.d: New file.
	* testsuite/gas/s12z/bra-expression-undef.s: New file.
	* testsuite/gas/s12z/bra.d: New file.
	* testsuite/gas/s12z/bra.s: New file.
	* testsuite/gas/s12z/brclr-symbols.d: New file.
	* testsuite/gas/s12z/brclr-symbols.s: New file.
	* testsuite/gas/s12z/brset-clr-opr-imm-rel.d: New file.
	* testsuite/gas/s12z/brset-clr-opr-imm-rel.s: New file.
	* testsuite/gas/s12z/brset-clr-opr-reg-rel.d: New file.
	* testsuite/gas/s12z/brset-clr-opr-reg-rel.s: New file.
	* testsuite/gas/s12z/brset-clr-reg-imm-rel.d: New file.
	* testsuite/gas/s12z/brset-clr-reg-imm-rel.s: New file.
	* testsuite/gas/s12z/brset-clr-reg-reg-rel.d: New file.
	* testsuite/gas/s12z/brset-clr-reg-reg-rel.s: New file.
	* testsuite/gas/s12z/clb.d: New file.
	* testsuite/gas/s12z/clb.s: New file.
	* testsuite/gas/s12z/clr-opr.d: New file.
	* testsuite/gas/s12z/clr-opr.s: New file.
	* testsuite/gas/s12z/clr.d: New file.
	* testsuite/gas/s12z/clr.s: New file.
	* testsuite/gas/s12z/cmp-imm.d: New file.
	* testsuite/gas/s12z/cmp-imm.s: New file.
	* testsuite/gas/s12z/cmp-opr-inc.d: New file.
	* testsuite/gas/s12z/cmp-opr-inc.s: New file.
	* testsuite/gas/s12z/cmp-opr-rdirect.d: New file.
	* testsuite/gas/s12z/cmp-opr-rdirect.s: New file.
	* testsuite/gas/s12z/cmp-opr-reg.d: New file.
	* testsuite/gas/s12z/cmp-opr-reg.s: New file.
	* testsuite/gas/s12z/cmp-opr-rindirect.d: New file.
	* testsuite/gas/s12z/cmp-opr-rindirect.s: New file.
	* testsuite/gas/s12z/cmp-opr-sxe4.d: New file.
	* testsuite/gas/s12z/cmp-opr-sxe4.s: New file.
	* testsuite/gas/s12z/cmp-opr-xys.d: New file.
	* testsuite/gas/s12z/cmp-opr-xys.s: New file.
	* testsuite/gas/s12z/cmp-s-imm.d: New file.
	* testsuite/gas/s12z/cmp-s-imm.s: New file.
	* testsuite/gas/s12z/cmp-s-opr.d: New file.
	* testsuite/gas/s12z/cmp-s-opr.s: New file.
	* testsuite/gas/s12z/cmp-xy.d: New file.
	* testsuite/gas/s12z/cmp-xy.s: New file.
	* testsuite/gas/s12z/com-opr.d: New file.
	* testsuite/gas/s12z/com-opr.s: New file.
	* testsuite/gas/s12z/complex-shifts.d: New file.
	* testsuite/gas/s12z/complex-shifts.s: New file.
	* testsuite/gas/s12z/db-tb-cc-opr.d: New file.
	* testsuite/gas/s12z/db-tb-cc-opr.s: New file.
	* testsuite/gas/s12z/db-tb-cc-reg.d: New file.
	* testsuite/gas/s12z/db-tb-cc-reg.s: New file.
	* testsuite/gas/s12z/dbCC.d: New file.
	* testsuite/gas/s12z/dbCC.s: New file.
	* testsuite/gas/s12z/dec-opr.d: New file.
	* testsuite/gas/s12z/dec-opr.s: New file.
	* testsuite/gas/s12z/dec.d: New file.
	* testsuite/gas/s12z/dec.s: New file.
	* testsuite/gas/s12z/div.d: New file.
	* testsuite/gas/s12z/div.s: New file.
	* testsuite/gas/s12z/eor.d: New file.
	* testsuite/gas/s12z/eor.s: New file.
	* testsuite/gas/s12z/exg.d: New file.
	* testsuite/gas/s12z/exg.s: New file.
	* testsuite/gas/s12z/ext24-ld-xy.d: New file.
	* testsuite/gas/s12z/ext24-ld-xy.s: New file.
	* testsuite/gas/s12z/inc-opr.d: New file.
	* testsuite/gas/s12z/inc-opr.s: New file.
	* testsuite/gas/s12z/inc.d: New file.
	* testsuite/gas/s12z/inc.s: New file.
	* testsuite/gas/s12z/inh.d: New file.
	* testsuite/gas/s12z/inh.s: New file.
	* testsuite/gas/s12z/jmp.d: New file.
	* testsuite/gas/s12z/jmp.s: New file.
	* testsuite/gas/s12z/jsr.d: New file.
	* testsuite/gas/s12z/jsr.s: New file.
	* testsuite/gas/s12z/ld-imm-page2.d: New file.
	* testsuite/gas/s12z/ld-imm-page2.s: New file.
	* testsuite/gas/s12z/ld-imm.d: New file.
	* testsuite/gas/s12z/ld-imm.s: New file.
	* testsuite/gas/s12z/ld-immu18.d: New file.
	* testsuite/gas/s12z/ld-immu18.s: New file.
	* testsuite/gas/s12z/ld-large-direct.d: New file.
	* testsuite/gas/s12z/ld-large-direct.s: New file.
	* testsuite/gas/s12z/ld-opr.d: New file.
	* testsuite/gas/s12z/ld-opr.s: New file.
	* testsuite/gas/s12z/ld-s-opr.d: New file.
	* testsuite/gas/s12z/ld-s-opr.s: New file.
	* testsuite/gas/s12z/ld-small-direct.d: New file.
	* testsuite/gas/s12z/ld-small-direct.s: New file.
	* testsuite/gas/s12z/lea-immu18.d: New file.
	* testsuite/gas/s12z/lea-immu18.s: New file.
	* testsuite/gas/s12z/lea.d: New file.
	* testsuite/gas/s12z/lea.s: New file.
	* testsuite/gas/s12z/mac.d: New file.
	* testsuite/gas/s12z/mac.s: New file.
	* testsuite/gas/s12z/min-max.d: New file.
	* testsuite/gas/s12z/min-max.s: New file.
	* testsuite/gas/s12z/mod.d: New file.
	* testsuite/gas/s12z/mod.s: New file.
	* testsuite/gas/s12z/mov.d: New file.
	* testsuite/gas/s12z/mov.s: New file.
	* testsuite/gas/s12z/mul-imm.d: New file.
	* testsuite/gas/s12z/mul-imm.s: New file.
	* testsuite/gas/s12z/mul-opr-opr.d: New file.
	* testsuite/gas/s12z/mul-opr-opr.s: New file.
	* testsuite/gas/s12z/mul-opr.d: New file.
	* testsuite/gas/s12z/mul-opr.s: New file.
	* testsuite/gas/s12z/mul-reg.d: New file.
	* testsuite/gas/s12z/mul-reg.s: New file.
	* testsuite/gas/s12z/mul.d: New file.
	* testsuite/gas/s12z/mul.s: New file.
	* testsuite/gas/s12z/neg-opr.d: New file.
	* testsuite/gas/s12z/neg-opr.s: New file.
	* testsuite/gas/s12z/not-so-simple-shifts.d: New file.
	* testsuite/gas/s12z/not-so-simple-shifts.s: New file.
	* testsuite/gas/s12z/opr-18u.d: New file.
	* testsuite/gas/s12z/opr-18u.s: New file.
	* testsuite/gas/s12z/opr-expr.d: New file.
	* testsuite/gas/s12z/opr-expr.s: New file.
	* testsuite/gas/s12z/opr-ext-18.d: New file.
	* testsuite/gas/s12z/opr-ext-18.s: New file.
	* testsuite/gas/s12z/opr-idx-24-reg.d: New file.
	* testsuite/gas/s12z/opr-idx-24-reg.s: New file.
	* testsuite/gas/s12z/opr-idx3-reg.d: New file.
	* testsuite/gas/s12z/opr-idx3-reg.s: New file.
	* testsuite/gas/s12z/opr-idx3-xysp-24.d: New file.
	* testsuite/gas/s12z/opr-idx3-xysp-24.s: New file.
	* testsuite/gas/s12z/opr-indirect-expr.d: New file.
	* testsuite/gas/s12z/opr-indirect-expr.s: New file.
	* testsuite/gas/s12z/opr-symbol.d: New file.
	* testsuite/gas/s12z/opr-symbol.s: New file.
	* testsuite/gas/s12z/or-imm.d: New file.
	* testsuite/gas/s12z/or-imm.s: New file.
	* testsuite/gas/s12z/or-opr.d: New file.
	* testsuite/gas/s12z/or-opr.s: New file.
	* testsuite/gas/s12z/p2-mul.d: New file.
	* testsuite/gas/s12z/p2-mul.s: New file.
	* testsuite/gas/s12z/page2-inh.d: New file.
	* testsuite/gas/s12z/page2-inh.s: New file.
	* testsuite/gas/s12z/psh-pul.d: New file.
	* testsuite/gas/s12z/psh-pul.s: New file.
	* testsuite/gas/s12z/qmul.d: New file.
	* testsuite/gas/s12z/qmul.s: New file.
	* testsuite/gas/s12z/rotate.d: New file.
	* testsuite/gas/s12z/rotate.s: New file.
	* testsuite/gas/s12z/s12z.exp: New file.
	* testsuite/gas/s12z/sat.d: New file.
	* testsuite/gas/s12z/sat.s: New file.
	* testsuite/gas/s12z/sbc-imm.d: New file.
	* testsuite/gas/s12z/sbc-imm.s: New file.
	* testsuite/gas/s12z/sbc-opr.d: New file.
	* testsuite/gas/s12z/sbc-opr.s: New file.
	* testsuite/gas/s12z/shift.d: New file.
	* testsuite/gas/s12z/shift.s: New file.
	* testsuite/gas/s12z/simple-shift.d: New file.
	* testsuite/gas/s12z/simple-shift.s: New file.
	* testsuite/gas/s12z/single-ops.d: New file.
	* testsuite/gas/s12z/single-ops.s: New file.
	* testsuite/gas/s12z/specd6.d: New file.
	* testsuite/gas/s12z/specd6.s: New file.
	* testsuite/gas/s12z/st-large-direct.d: New file.
	* testsuite/gas/s12z/st-large-direct.s: New file.
	* testsuite/gas/s12z/st-opr.d: New file.
	* testsuite/gas/s12z/st-opr.s: New file.
	* testsuite/gas/s12z/st-s-opr.d: New file.
	* testsuite/gas/s12z/st-s-opr.s: New file.
	* testsuite/gas/s12z/st-small-direct.d: New file.
	* testsuite/gas/s12z/st-small-direct.s: New file.
	* testsuite/gas/s12z/st-xy.d: New file.
	* testsuite/gas/s12z/st-xy.s: New file.
	* testsuite/gas/s12z/sub-imm.d: New file.
	* testsuite/gas/s12z/sub-imm.s: New file.
	* testsuite/gas/s12z/sub-opr.d: New file.
	* testsuite/gas/s12z/sub-opr.s: New file.
	* testsuite/gas/s12z/tfr.d: New file.
	* testsuite/gas/s12z/tfr.s: New file.
	* testsuite/gas/s12z/trap.d: New file.
	* testsuite/gas/s12z/trap.s: New file.

binutils* readelf.c: Add support for s12z architecture.
	* testsuite/lib/binutils-common.exp (is_elf_format): Excluse s12z
	targets.
 2018-05-18 15:26:18 +01:00
Christophe Lyon
5c5a4843ec [ARM] Add TLS relocations for FDPIC. 
Define and handle TLS relocations for FDPIC in BFD and gas.

In gas, the new relocations are rejected if the --fdpic option was not
specified.

We also define the __tdata_start symbol to mark the start of the
.tdata section. This allows FDPIC static binaries to find the start of
.tdata section, since phdr->p_vaddr of TLS segment is not a valid
value for FDPIC.

2018-04-25  Christophe Lyon  <christophe.lyon@st.com>
	Mickaël Guêné  <mickael.guene@st.com>

	bfd/:
	* bfd-in2.h (BFD_RELOC_ARM_TLS_GD32_FDPIC)
	(BFD_RELOC_ARM_TLS_LDM32_FDPIC, BFD_RELOC_ARM_TLS_IE32_FDPIC): New
	relocations.
	* elf32-arm.c (elf32_arm_howto_table_2): Add R_ARM_TLS_GD32_FDPIC,
	R_ARM_TLS_LDM32_FDPIC, R_ARM_TLS_IE32_FDPIC relocations.
	(elf32_arm_reloc_map): Add R_ARM_TLS_GD32_FDPIC,
	R_ARM_TLS_LDM32_FDPIC, R_ARM_TLS_IE32_FDPIC.
	(struct elf32_arm_link_hash_table): Update comment.
	(elf32_arm_final_link_relocate): Handle TLS FDPIC relocations.
	(IS_ARM_TLS_RELOC): Likewise.
	(elf32_arm_check_relocs): Likewise.
	(allocate_dynrelocs_for_symbol): Likewise.
	(elf32_arm_size_dynamic_sections): Update comment.
	* reloc.c: Add BFD_RELOC_ARM_TLS_GD32_FDPIC,
	BFD_RELOC_ARM_TLS_LDM32_FDPIC, BFD_RELOC_ARM_TLS_IE32_FDPIC.

	gas/
	* config/tc-arm.c (reloc_names): Add TLSGD_FDPIC, TLSLDM_FDPIC,
	GOTTPOFF_FDIC relocations.
	(md_apply_fix): Handle the new TLS FDPIC relocations.
	(tc_gen_reloc): Likewise.
	(arm_fix_adjustable): Likewise.

	include/
	* elf/arm.h: Add R_ARM_TLS_GD32_FDPIC, R_ARM_TLS_LDM32_FDPIC,
	R_ARM_TLS_IE32_FDPIC.

	ld/
	* scripttempl/elf.sc: Define __tdata_start for .tdata section.
 2018-04-25 20:57:02 +00:00
Christophe Lyon
188fd7aea6 [ARM] Add FDPIC relocations definitions 
Add FDPIC relocation definitions in BFD and gas.
Gas rejects them if the --fdpic option was not specified.

2018-04-25  Christophe Lyon  <christophe.lyon@st.com>
	Mickaël Guêné  <mickael.guene@st.com>

	bfd/
	* bfd-in2.c (BFD_RELOC_ARM_GOTFUNCDESC)
	(BFD_RELOC_ARM_GOTOFFFUNCDESC, BFD_RELOC_ARM_FUNCDESC)
	(BFD_RELOC_ARM_FUNCDESC_VALUE): New.
	* elf32-arm.c (elf32_arm_howto_table_2): Add R_ARM_GOTFUNCDESC,
	R_ARM_GOTOFFFUNCDESC, R_ARM_FUNCDESC, R_ARM_FUNCDESC_VALUE.
	(elf32_arm_howto_from_type): Take new members of
	elf32_arm_howto_table_2 into account.
	(elf32_arm_reloc_map): Add BFD_RELOC_ARM_GOTFUNCDESC,
	BFD_RELOC_ARM_GOTOFFFUNCDESC, BFD_RELOC_ARM_FUNCDESC,
	BFD_RELOC_ARM_FUNCDESC_VALUE.
	* reloc.c: Add BFD_RELOC_ARM_GOTFUNCDESC,
	BFD_RELOC_ARM_GOTOFFFUNCDESC, BFD_RELOC_ARM_FUNCDESC,
	BFD_RELOC_ARM_FUNCDESC_VALUE.

	gas/
	* config/tc-arm.c (reloc_names): Add gotfuncdesc, gotofffuncdesc,
	funcdesc.
	(md_apply_fix): Support the new relocations.
	(tc_gen_reloc): Likewise.
	* testsuite/gas/arm/reloc-fdpic.d: New.
	* testsuite/gas/arm/reloc-fdpic.s: New.

	include/
	* elf/arm.h (R_ARM_GOTFUNCDESC, R_ARM_GOTOFFFUNCDESC)
	(R_ARM_FUNCDESC)
	(R_ARM_FUNCDESC_VALUE): Define new relocations.
 2018-04-25 20:51:53 +00:00
Michael Eager
3f0a5f17d7 [MicroBlaze] PIC data text relative 
Andrew Sadek <andrew.sadek.se@gmail.com>

A new implemented feature in GCC Microblaze that allows Position
Independent Code to run using Data Text Relative addressing instead
of using Global Offset Table.

Its aim was to make 'PIC' more efficient and flexible as elf size
excess performance overhead were noticed when using GOT due to the
indirect addressing.

include/ChangeLog:
	* bfdlink.h (Add flag): Add new flag @ 'bfd_link_info' struct.
	* elf/microblaze.h (Add 3 new relocations):
	R_MICROBLAZE_TEXTPCREL_64, R_MICROBLAZE_TEXTREL_64
	and R_MICROBLAZE_TEXTREL_32_LO for relax function.
bfd/ChangeLog:
	* bfd/reloc.c (2 new BFD relocations):
	BFD_RELOC_MICROBLAZE_64_TEXTPCREL &
	BFD_RELOC_MICROBLAZE_64_TEXTPCREL
	* bfd/bfd-in2.h: Regenerate
	* bfd/libbfd.h: Regenerate
	* bfd/elf32-microblaze.c (Handle new relocs): define 'HOWTO' of 3
	new relocs and handle them in both relocate and relax functions.
	(microblaze_elf_reloc_type_lookup): add mapping between for new
	bfd relocs.
	(microblaze_elf_relocate_section): Handle new relocs in case of
	elf relocation.
	(microblaze_elf_relax_section): Handle new relocs for elf relaxation.
gas/ChangeLog:
	* gas/config/tc-microblaze.c (Handle new relocs directives in
	assembler): Handle new relocs from compiler output.
	(imm_types): add new imm types for data text relative addressing
	TEXT_OFFSET, TEXT_PC_OFFSET
	(md_convert_frag): conversion for BFD_RELOC_MICROBLAZE_64_TEXTPCREL,
	BFD_RELOC_MICROBLAZE_64_TEXTPCREL
	(md_apply_fix): apply fix for BFD_RELOC_MICROBLAZE_64_TEXTPCREL,
	BFD_RELOC_MICROBLAZE_64_TEXTPCREL
	(md_estimate_size_before_relax): estimate size for
	BFD_RELOC_MICROBLAZE_64_TEXTPCREL,
	BFD_RELOC_MICROBLAZE_64_TEXTPCREL
	(tc_gen_reloc): generate relocations for
	BFD_RELOC_MICROBLAZE_64_TEXTPCREL,
	BFD_RELOC_MICROBLAZE_64_TEXTPCREL
ld/ChangeLog:
	* ld/lexsup.c (Add 2 ld options):
	(ld_options): add disable-multiple-abs-defs @ 'ld_options' array
	(parse_args): parse new option and pass flag to 'link_info' struct.
	* ld/ldlex.h (Add enum): add new enum @ 'option_values' enum.
	* ld/ld.texinfo (Add new option): Add description for
	'disable-multiple-abs-defs'
	* ld/main.c: Initialize flags with false @ 'main'. Handle
	disable-multiple-abs-defs @ 'mutiple_definition'.
 2018-04-17 14:47:13 -07:00
Alan Modra
c2bf1eecf9 Remove m88k support 
include/
	* coff/internal.h: Remove m88k support.
	* coff/m88k.h: Delete.
	* opcode/m88k.h: Delete.
bfd/
	* Makefile.am: Remove m88k support.
	* aoutx.h: Likewise.
	* archures.c: Likewise.
	* coffcode.h: Likewise.
	* coffswap.h: Likewise.
	* config.bfd: Likewise.
	* configure.ac: Likewise.
	* cpu-ns32k.c: Likewise.
	* elf32-nds32.c: Likewise.
	* mach-o.c: Likewise.
	* netbsd-core.c: Likewise.
	* reloc.c: Likewise.
	* targets.c: Likewise.
	* coff-m88k.c: Delete.
	* cpu-m88k.c: Delete.
	* elf32-m88k.c: Delete.
	* hosts/m88kmach3.h: Delete.
	* m88kmach3.c: Delete.
	* m88kopenbsd.c: Delete.
	* Makefile.in: Regenerate.
	* bfd-in2.h: Regenerate.
	* configure: Regenerate.
	* po/SRC-POTFILES.in: Regenerate.
opcodes/
	* Makefile.am: Remove m88k support.
	* configure.ac: Likewise.
	* disassemble.c: Likewise.
	* disassemble.h: Likewise.
	* m88k-dis.c: Delete.
	* Makefile.in: Regenerate.
	* configure: Regenerate.
	* po/POTFILES.in: Regenerate.
binutils/
	* MAINTAINERS (Mark Kettenis): Move to past maintainers.
	* testsuite/binutils-all/objdump.exp: Remove m88k support.
gas/
	* configure.ac: Remove m88k support.
	* config.in: Regenerate.
	* configure: Regenerate.
ld/
	* Makefile.am: Remove m88k support.
	* configure.host: Likewise.
	* configure.tgt: Likewise.
	* testsuite/ld-elf/sec-to-seg.exp: Likewise.
	* emulparams/m88kbcs.sh: Delete.
	* scripttempl/m88kbcs.sc: Delete.
	* Makefile.in: Regenerate.
	* po/BLD-POTFILES.in: Regenerate.
 2018-04-16 15:23:38 +09:30
Alan Modra
a8eb42a8b7 Remove i860, i960, bout and aout-adobe targets 
Plus remove a few leftovers from the 29k support.

include/
	* aout/adobe.h: Delete.
	* aout/reloc.h: Delete.
	* coff/i860.h: Delete.
	* coff/i960.h: Delete.
	* elf/i860.h: Delete.
	* elf/i960.h: Delete.
	* opcode/i860.h: Delete.
	* opcode/i960.h: Delete.
	* aout/aout64.h (enum reloc_type): Trim off 29k and other unused values.
	* aout/ar.h (ARMAGB): Remove.
	* coff/internal.h (struct internal_aouthdr, struct internal_scnhdr,
	union internal_auxent): Remove i960 support.
bfd/
	* aout-adobe.c: Delete.
	* bout.c: Delete.
	* coff-i860.c: Delete.
	* coff-i960.c: Delete.
	* cpu-i860.c: Delete.
	* cpu-i960.c: Delete.
	* elf32-i860.c: Delete.
	* elf32-i960.c: Delete.
	* hosts/i860mach3.h: Delete.
	* Makefile.am: Remove i860, i960, bout, and adobe support.
	* archures.c: Remove i860 and i960 support.
	* coffcode.h: Likewise.
	* reloc.c: Likewise.
	* aoutx.h: Comment updates.
	* archive.c: Remove BOUT and i960 support.
	* bfd.c: Remove BOUT support.
	* coffswap.h: Remove i960 support.
	* config.bfd: Remove i860, i960 and adobe targets.
	* configure.ac: Remove adode, bout, i860, i960, icoff targets.
	* targets.c: Likewise.
	* ieee.c: Remove i960 support.
	* mach-o.c: Remove i860 support.
	* Makefile.in: Regenerate.
	* bfd-in2.h: Regenerate.
	* configure: Regenerate.
	* libbfd.h: Regenerate.
	* po/SRC-POTFILES.in: Regenerate.
opcodes/
	* opcodes/i860-dis.c: Delete.
	* opcodes/i960-dis.c: Delete.
	* Makefile.am: Remove i860 and i960 support.
	* configure.ac: Likewise.
	* disassemble.c: Likewise.
	* disassemble.h: Likewise.
	* Makefile.in: Regenerate.
	* configure: Regenerate.
	* po/POTFILES.in: Regenerate.
binutils/
	* ieee.c: Remove i960 support.
	* od-macho.c: Remove i860 support.
	* readelf.c: Remove i860 and i960 support.
	* testsuite/binutils-all/objcopy.exp: Likewise.
	* testsuite/binutils-all/objdump.exp: Likewise.
	* testsuite/lib/binutils-common.exp: Likewise.
gas/
	* config/aout_gnu.h: Delete.
	* config/tc-i860.c: Delete.
	* config/tc-i860.h: Delete.
	* config/tc-i960.c: Delete.
	* config/tc-i960.h: Delete.
	* doc/c-i860.texi: Delete.
	* doc/c-i960.texi: Delete.
	* testsuite/gas/i860/README.i860: Delete.
	* testsuite/gas/i860/bitwise.d: Delete.
	* testsuite/gas/i860/bitwise.s: Delete.
	* testsuite/gas/i860/branch.d: Delete.
	* testsuite/gas/i860/branch.s: Delete.
	* testsuite/gas/i860/bte.d: Delete.
	* testsuite/gas/i860/bte.s: Delete.
	* testsuite/gas/i860/dir-align01.d: Delete.
	* testsuite/gas/i860/dir-align01.s: Delete.
	* testsuite/gas/i860/dir-intel01.d: Delete.
	* testsuite/gas/i860/dir-intel01.s: Delete.
	* testsuite/gas/i860/dir-intel02.d: Delete.
	* testsuite/gas/i860/dir-intel02.s: Delete.
	* testsuite/gas/i860/dir-intel03-err.l: Delete.
	* testsuite/gas/i860/dir-intel03-err.s: Delete.
	* testsuite/gas/i860/dual01.d: Delete.
	* testsuite/gas/i860/dual01.s: Delete.
	* testsuite/gas/i860/dual02-err.l: Delete.
	* testsuite/gas/i860/dual02-err.s: Delete.
	* testsuite/gas/i860/dual03.d: Delete.
	* testsuite/gas/i860/dual03.s: Delete.
	* testsuite/gas/i860/fldst01.d: Delete.
	* testsuite/gas/i860/fldst01.s: Delete.
	* testsuite/gas/i860/fldst02.d: Delete.
	* testsuite/gas/i860/fldst02.s: Delete.
	* testsuite/gas/i860/fldst03.d: Delete.
	* testsuite/gas/i860/fldst03.s: Delete.
	* testsuite/gas/i860/fldst04.d: Delete.
	* testsuite/gas/i860/fldst04.s: Delete.
	* testsuite/gas/i860/fldst05.d: Delete.
	* testsuite/gas/i860/fldst05.s: Delete.
	* testsuite/gas/i860/fldst06.d: Delete.
	* testsuite/gas/i860/fldst06.s: Delete.
	* testsuite/gas/i860/fldst07.d: Delete.
	* testsuite/gas/i860/fldst07.s: Delete.
	* testsuite/gas/i860/fldst08.d: Delete.
	* testsuite/gas/i860/fldst08.s: Delete.
	* testsuite/gas/i860/float01.d: Delete.
	* testsuite/gas/i860/float01.s: Delete.
	* testsuite/gas/i860/float02.d: Delete.
	* testsuite/gas/i860/float02.s: Delete.
	* testsuite/gas/i860/float03.d: Delete.
	* testsuite/gas/i860/float03.s: Delete.
	* testsuite/gas/i860/float04.d: Delete.
	* testsuite/gas/i860/float04.s: Delete.
	* testsuite/gas/i860/form.d: Delete.
	* testsuite/gas/i860/form.s: Delete.
	* testsuite/gas/i860/i860.exp: Delete.
	* testsuite/gas/i860/iarith.d: Delete.
	* testsuite/gas/i860/iarith.s: Delete.
	* testsuite/gas/i860/ldst01.d: Delete.
	* testsuite/gas/i860/ldst01.s: Delete.
	* testsuite/gas/i860/ldst02.d: Delete.
	* testsuite/gas/i860/ldst02.s: Delete.
	* testsuite/gas/i860/ldst03.d: Delete.
	* testsuite/gas/i860/ldst03.s: Delete.
	* testsuite/gas/i860/ldst04.d: Delete.
	* testsuite/gas/i860/ldst04.s: Delete.
	* testsuite/gas/i860/ldst05.d: Delete.
	* testsuite/gas/i860/ldst05.s: Delete.
	* testsuite/gas/i860/ldst06.d: Delete.
	* testsuite/gas/i860/ldst06.s: Delete.
	* testsuite/gas/i860/pfam.d: Delete.
	* testsuite/gas/i860/pfam.s: Delete.
	* testsuite/gas/i860/pfmam.d: Delete.
	* testsuite/gas/i860/pfmam.s: Delete.
	* testsuite/gas/i860/pfmsm.d: Delete.
	* testsuite/gas/i860/pfmsm.s: Delete.
	* testsuite/gas/i860/pfsm.d: Delete.
	* testsuite/gas/i860/pfsm.s: Delete.
	* testsuite/gas/i860/pseudo-ops01.d: Delete.
	* testsuite/gas/i860/pseudo-ops01.s: Delete.
	* testsuite/gas/i860/regress01.d: Delete.
	* testsuite/gas/i860/regress01.s: Delete.
	* testsuite/gas/i860/shift.d: Delete.
	* testsuite/gas/i860/shift.s: Delete.
	* testsuite/gas/i860/simd.d: Delete.
	* testsuite/gas/i860/simd.s: Delete.
	* testsuite/gas/i860/system.d: Delete.
	* testsuite/gas/i860/system.s: Delete.
	* testsuite/gas/i860/xp.d: Delete.
	* testsuite/gas/i860/xp.s: Delete.
	* Makefile.am: Remove i860 and i960 support.
	* configure.tgt: Likewise.
	* doc/Makefile.am: Likewise.
	* doc/all.texi: Likewise.
	* testsuite/gas/all/gas.exp
	* config/obj-coff.h: Remove i960 support.
	* doc/internals.texi: Likewise.
	* expr.c: Likewise.
	* read.c: Likewise.
	* write.c: Likewise.
	* write.h: Likewise.
	* testsuite/gas/lns/lns.exp: Likewise.
	* testsuite/gas/symver/symver.exp: Likewise.
	* config/tc-m68k.c: Remove BOUT support.
	* config/tc-score.c: Likewise.
	* config/tc-score7.c: Likewise.
	* config/tc-sparc.c: Likewise.
	* symbols.c: Likewise.
	* doc/h8.texi: Likewise.
	* configure.ac: Remove BOUT and i860 support.
	* doc/as.texinfo: Remove BOUT, i860 and i960 support
	* Makefile.in: Regenerate.
	* config.in: Regenerate.
	* configure: Regenerate.
	* doc/Makefile.in: Regenerate.
	* po/POTFILES.in: Regenerate.
ld/
	* emulparams/coff_i860.sh: Delete.
	* emulparams/elf32_i860.sh: Delete.
	* emulparams/elf32_i960.sh: Delete.
	* emulparams/gld960.sh: Delete.
	* emulparams/gld960coff.sh: Delete.
	* emulparams/lnk960.sh: Delete.
	* emultempl/gld960.em: Delete.
	* emultempl/gld960c.em: Delete.
	* emultempl/lnk960.em: Delete.
	* scripttempl/i860coff.sc: Delete.
	* scripttempl/i960.sc: Delete.
	* ld.texinfo: Remove i960 support.
	* Makefile.am: Remove i860 and i960 support.
	* configure.tgt: Likewise.
	* testsuite/ld-discard/extern.d: Likewise.
	* testsuite/ld-discard/start.d: Likewise.
	* testsuite/ld-discard/static.d: Likewise.
	* testsuite/ld-elf/compressed1d.d: Likewise.
	* testsuite/ld-elf/group1.d: Likewise.
	* testsuite/ld-elf/group3b.d: Likewise.
	* testsuite/ld-elf/group8a.d: Likewise.
	* testsuite/ld-elf/group8b.d: Likewise.
	* testsuite/ld-elf/group9a.d: Likewise.
	* testsuite/ld-elf/group9b.d: Likewise.
	* testsuite/ld-elf/linkonce2.d: Likewise.
	* testsuite/ld-elf/merge.d: Likewise.
	* testsuite/ld-elf/merge2.d: Likewise.
	* testsuite/ld-elf/merge3.d: Likewise.
	* testsuite/ld-elf/orphan-10.d: Likewise.
	* testsuite/ld-elf/orphan-11.d: Likewise.
	* testsuite/ld-elf/orphan-12.d: Likewise.
	* testsuite/ld-elf/orphan-9.d: Likewise.
	* testsuite/ld-elf/orphan-region.d: Likewise.
	* testsuite/ld-elf/orphan.d: Likewise.
	* testsuite/ld-elf/orphan3.d: Likewise.
	* testsuite/ld-elf/pr12851.d: Likewise.
	* testsuite/ld-elf/pr12975.d: Likewise.
	* testsuite/ld-elf/pr13177.d: Likewise.
	* testsuite/ld-elf/pr13195.d: Likewise.
	* testsuite/ld-elf/pr17550a.d: Likewise.
	* testsuite/ld-elf/pr17550b.d: Likewise.
	* testsuite/ld-elf/pr17550c.d: Likewise.
	* testsuite/ld-elf/pr17550d.d: Likewise.
	* testsuite/ld-elf/pr17615.d: Likewise.
	* testsuite/ld-elf/pr20528a.d: Likewise.
	* testsuite/ld-elf/pr20528b.d: Likewise.
	* testsuite/ld-elf/pr21562a.d: Likewise.
	* testsuite/ld-elf/pr21562b.d: Likewise.
	* testsuite/ld-elf/pr21562c.d: Likewise.
	* testsuite/ld-elf/pr21562d.d: Likewise.
	* testsuite/ld-elf/pr21562i.d: Likewise.
	* testsuite/ld-elf/pr21562j.d: Likewise.
	* testsuite/ld-elf/pr21562k.d: Likewise.
	* testsuite/ld-elf/pr21562l.d: Likewise.
	* testsuite/ld-elf/pr21562m.d: Likewise.
	* testsuite/ld-elf/pr21562n.d: Likewise.
	* testsuite/ld-elf/pr22677.d: Likewise.
	* testsuite/ld-elf/pr22836-1a.d: Likewise.
	* testsuite/ld-elf/pr22836-1b.d: Likewise.
	* testsuite/ld-elf/pr349.d: Likewise.
	* testsuite/ld-elf/sec-to-seg.exp: Likewise.
	* testsuite/ld-elf/sec64k.exp: Likewise.
	* testsuite/ld-elf/warn1.d: Likewise.
	* testsuite/ld-elf/warn2.d: Likewise.
	* testsuite/ld-elf/warn3.d: Likewise.
	* testsuite/lib/ld-lib.exp: Likewise.
	* Makefile.in: Regenerate.
	* po/BLD-POTFILES.in: Regenerate.
 2018-04-11 21:49:30 +09:30
Renlin Li
84f1b9fb08 [1/2][GAS][AARCH64]Add BFD_RELOC_AARCH64_TLSLE_LDST8/16/32/64_TPREL_LO12 support in GAS. 
This patch adds the following relocation support into binutils gas.
BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12,
BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12_NC,
BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12,
BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12_NC,
BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12,
BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12_NC,
BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12,
BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12_NC.

Those relocations includes both ip64 and ilp32 variant.
 2018-03-28 18:03:55 +01:00
Alan Modra
6e05870c97 BFD messages 
bfd/
	* archive.c, * bfd.c, * linker.c, * reloc.c, * stabs.c,
	* syms.c: Standardize error/warning messages.
binutils/
	* testsuite/binutils-all/mips/mips-reginfo-n32.d,
	* testsuite/binutils-all/mips/mips-reginfo.d: Update.
gas/
	* testsuite/gas/mips/reginfo-2.l: Update.
ld/
	* testsuite/ld-arm/cmse-implib-errors.out,
	* testsuite/ld-arm/cmse-new-earlier-later-implib.out,
	* testsuite/ld-arm/cmse-new-implib-not-sg-in-implib.out,
	* testsuite/ld-arm/cmse-new-wrong-implib.out,
	* testsuite/ld-arm/cmse-veneers-no-gnu_sgstubs.out,
	* testsuite/ld-arm/cmse-veneers-wrong-entryfct.out,
	* testsuite/ld-cris/badgotr1.d,
	* testsuite/ld-cris/tls-err-24.d,
	* testsuite/ld-cris/tls-err-25.d,
	* testsuite/ld-cris/tls-err-26.d,
	* testsuite/ld-cris/tls-err-27.d,
	* testsuite/ld-cris/tls-err-28.d,
	* testsuite/ld-cris/tls-err-40.d,
	* testsuite/ld-cris/tls-err-44.d,
	* testsuite/ld-cris/tls-err-48.d,
	* testsuite/ld-cris/tls-err-52.d,
	* testsuite/ld-cris/tls-err-53.d,
	* testsuite/ld-cris/tls-err-55.d,
	* testsuite/ld-cris/tls-err-56.d,
	* testsuite/ld-cris/tls-err-62.d,
	* testsuite/ld-cris/tls-err-65.d,
	* testsuite/ld-cris/tls-err-77.d,
	* testsuite/ld-elf/empty-implib.out,
	* testsuite/ld-elf/indirect.exp: Update.
 2018-02-26 09:33:15 +10:30
Alan Modra
0aa13feeeb unrecognized/unsupported reloc message 
It must get boring translating all the variants we have of
unrecognized/unsupported/invalid/unexpected reloc number.  This patch
cuts down on the number of variations.

	* aoutx.h, * coff-alpha.c, * coff-i860.c, * coff-m68k.c,
	* coff-mcore.c, * coff-ppc.c, * coff-rs6000.c, * coff-sh.c,
	* coff-tic4x.c, * coff-tic54x.c, * coff-tic80.c, * coff-w65.c,
	* elf-bfd.h, * elf-m10300.c, * elf.c, * elf32-avr.c, * elf32-bfin.c,
	* elf32-cr16.c, * elf32-cr16c.c, * elf32-cris.c, * elf32-crx.c,
	* elf32-d10v.c, * elf32-d30v.c, * elf32-dlx.c, * elf32-epiphany.c,
	* elf32-fr30.c, * elf32-frv.c, * elf32-i370.c, * elf32-i386.c,
	* elf32-i960.c, * elf32-ip2k.c, * elf32-iq2000.c, * elf32-lm32.c,
	* elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc11.c, * elf32-m68hc12.c,
	* elf32-m68k.c, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c,
	* elf32-microblaze.c, * elf32-mips.c, * elf32-moxie.c,
	* elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c, * elf32-or1k.c,
	* elf32-pj.c, * elf32-ppc.c, * elf32-rl78.c, * elf32-rx.c,
	* elf32-s390.c, * elf32-sh.c, * elf32-spu.c, * elf32-tic6x.c,
	* elf32-v850.c, * elf32-vax.c, * elf32-visium.c, * elf32-wasm32.c,
	* elf32-xgate.c, * elf32-xtensa.c, * elf64-alpha.c,
	* elf64-ia64-vms.c, * elf64-mips.c, * elf64-mmix.c,
	* elf64-ppc.c, * elf64-s390.c, * elf64-sparc.c, * elf64-x86-64.c,
	* elfn32-mips.c, * elfnn-aarch64.c, * elfnn-ia64.c,
	* elfnn-riscv.c, * elfxx-mips.c, * elfxx-riscv.c, * elfxx-riscv.h,
	* elfxx-sparc.c, * elfxx-sparc.h, * reloc.c: Standardize
	unrecognized/unsupported reloc message.
 2018-02-26 09:28:27 +10:30
Alan Modra
c1c8c1ef9a Use %pI, %pR, %pS, %pT in place of %I, %R, %S and %T. 
bfd/
	* elf32-arm.c, * elf32-hppa.c, * elf32-lm32.c, * elf32-m32r.c,
	* elf32-metag.c, * elf32-nds32.c, * elf32-or1k.c, * elf32-ppc.c,
	* elf32-s390.c, * elf32-sh.c, * elf32-tic6x.c, * elf32-tilepro.c,
	* elf64-ppc.c, * elf64-s390.c, * elflink.c, * elfnn-aarch64.c,
	* elfnn-riscv.c, * elfxx-sparc.c, * elfxx-tilegx.c, * elfxx-x86.c,
	* reloc.c: Replace use of %R and %T in format strings passed to
	einfo and friends by %pR and %pT.
ld/
	* ldmisc.c (vfinfo) Handle %pI, %pR, %pS and %pT in place of
	%I, %R, %S and %T.
	* ldcref.c, * ldctor.c, * ldemul.c, * ldexp.c, * ldgram.y,
	* ldlang.c, * ldlex.l, * ldmain.c, * ldmisc.c, * pe-dll.c,
	* emultempl/sh64elf.em: Replace use of of %I, %R, %S and %T in
	format strings passed to einfo and friends by %pI, %pR, %pS and %pT.
 2018-02-19 23:55:53 +10:30
Alan Modra
871b3ab29e Use %pA and %pB in messages rather than %A and %B 
First step towards compiler verification of _bfd_error_handler
arguments, and better verification of translated messages.

bfd/
	* bfd.c (_bfd_doprnt, _bfd_doprnt_scan): Handle %pA and %pB in place
	of %A and %B.
	* aout-adobe.c: Update all messages using %A and %B.
	* aout-cris.c: Likewise.
	* aoutx.h: Likewise.
	* archive.c: Likewise.
	* binary.c: Likewise.
	* cache.c: Likewise.
	* coff-alpha.c: Likewise.
	* coff-arm.c: Likewise.
	* coff-i860.c: Likewise.
	* coff-mcore.c: Likewise.
	* coff-ppc.c: Likewise.
	* coff-rs6000.c: Likewise.
	* coff-sh.c: Likewise.
	* coff-tic4x.c: Likewise.
	* coff-tic54x.c: Likewise.
	* coff-tic80.c: Likewise.
	* coff64-rs6000.c: Likewise.
	* coffcode.h: Likewise.
	* coffgen.c: Likewise.
	* cofflink.c: Likewise.
	* coffswap.h: Likewise.
	* compress.c: Likewise.
	* cpu-arm.c: Likewise.
	* ecoff.c: Likewise.
	* elf-attrs.c: Likewise.
	* elf-eh-frame.c: Likewise.
	* elf-ifunc.c: Likewise.
	* elf-m10300.c: Likewise.
	* elf-properties.c: Likewise.
	* elf-s390-common.c: Likewise.
	* elf.c: Likewise.
	* elf32-arc.c: Likewise.
	* elf32-arm.c: Likewise.
	* elf32-avr.c: Likewise.
	* elf32-bfin.c: Likewise.
	* elf32-cr16.c: Likewise.
	* elf32-cr16c.c: Likewise.
	* elf32-cris.c: Likewise.
	* elf32-crx.c: Likewise.
	* elf32-d10v.c: Likewise.
	* elf32-d30v.c: Likewise.
	* elf32-epiphany.c: Likewise.
	* elf32-fr30.c: Likewise.
	* elf32-frv.c: Likewise.
	* elf32-gen.c: Likewise.
	* elf32-hppa.c: Likewise.
	* elf32-i370.c: Likewise.
	* elf32-i386.c: Likewise.
	* elf32-i960.c: Likewise.
	* elf32-ip2k.c: Likewise.
	* elf32-iq2000.c: Likewise.
	* elf32-lm32.c: Likewise.
	* elf32-m32c.c: Likewise.
	* elf32-m32r.c: Likewise.
	* elf32-m68hc11.c: Likewise.
	* elf32-m68hc12.c: Likewise.
	* elf32-m68hc1x.c: Likewise.
	* elf32-m68k.c: Likewise.
	* elf32-mcore.c: Likewise.
	* elf32-mep.c: Likewise.
	* elf32-metag.c: Likewise.
	* elf32-microblaze.c: Likewise.
	* elf32-moxie.c: Likewise.
	* elf32-msp430.c: Likewise.
	* elf32-mt.c: Likewise.
	* elf32-nds32.c: Likewise.
	* elf32-nios2.c: Likewise.
	* elf32-or1k.c: Likewise.
	* elf32-pj.c: Likewise.
	* elf32-ppc.c: Likewise.
	* elf32-rl78.c: Likewise.
	* elf32-rx.c: Likewise.
	* elf32-s390.c: Likewise.
	* elf32-score.c: Likewise.
	* elf32-score7.c: Likewise.
	* elf32-sh-symbian.c: Likewise.
	* elf32-sh.c: Likewise.
	* elf32-sh64.c: Likewise.
	* elf32-sparc.c: Likewise.
	* elf32-spu.c: Likewise.
	* elf32-tic6x.c: Likewise.
	* elf32-tilepro.c: Likewise.
	* elf32-v850.c: Likewise.
	* elf32-vax.c: Likewise.
	* elf32-visium.c: Likewise.
	* elf32-wasm32.c: Likewise.
	* elf32-xgate.c: Likewise.
	* elf32-xtensa.c: Likewise.
	* elf64-alpha.c: Likewise.
	* elf64-gen.c: Likewise.
	* elf64-hppa.c: Likewise.
	* elf64-ia64-vms.c: Likewise.
	* elf64-mmix.c: Likewise.
	* elf64-ppc.c: Likewise.
	* elf64-s390.c: Likewise.
	* elf64-sh64.c: Likewise.
	* elf64-sparc.c: Likewise.
	* elf64-x86-64.c: Likewise.
	* elfcode.h: Likewise.
	* elfcore.h: Likewise.
	* elflink.c: Likewise.
	* elfnn-aarch64.c: Likewise.
	* elfnn-ia64.c: Likewise.
	* elfnn-riscv.c: Likewise.
	* elfxx-mips.c: Likewise.
	* elfxx-sparc.c: Likewise.
	* elfxx-tilegx.c: Likewise.
	* elfxx-x86.c: Likewise.
	* hpux-core.c: Likewise.
	* ieee.c: Likewise.
	* ihex.c: Likewise.
	* libbfd.c: Likewise.
	* linker.c: Likewise.
	* mach-o.c: Likewise.
	* merge.c: Likewise.
	* mmo.c: Likewise.
	* oasys.c: Likewise.
	* pdp11.c: Likewise.
	* pe-mips.c: Likewise.
	* peXXigen.c: Likewise.
	* peicode.h: Likewise.
	* reloc.c: Likewise.
	* rs6000-core.c: Likewise.
	* srec.c: Likewise.
	* stabs.c: Likewise.
	* vms-alpha.c: Likewise.
	* xcofflink.c: Likewise.
ld/
	* ldmisc.c (vfinfo): Handle %pA and %pB in place of %A and %B.
	* ldcref.c: Update all messages using %A and %B.
	* ldexp.c: Likewise.
	* ldlang.c: Likewise.
	* ldmain.c: Likewise.
	* ldmisc.c: Likewise.
	* pe-dll.c: Likewise.
	* plugin.c: Likewise.
	* emultempl/beos.em: Likewise.
	* emultempl/cr16elf.em: Likewise.
	* emultempl/elf32.em: Likewise.
	* emultempl/m68kcoff.em: Likewise.
	* emultempl/m68kelf.em: Likewise.
	* emultempl/mmo.em: Likewise.
	* emultempl/nds32elf.em: Likewise.
	* emultempl/pe.em: Likewise.
	* emultempl/pep.em: Likewise.
	* emultempl/spuelf.em: Likewise.
	* emultempl/sunos.em: Likewise.
	* emultempl/xtensaelf.em: Likewise.
 2018-02-19 23:55:53 +10:30
Alan Modra
d00dd7dc5e Remove bfd stub function casts. 
This patch defines a bunch of new functions to use in the BFD target
structs rather than casting bfd_false or bfd_true and similar stub
functions.  I've also renamed the stub functions to reflect their
parameters and put "error" in the name if they set bfd_error.  The
latter change is important since there were quite a few uses of
bfd_false where setting bfd_error was inappropriate, for example in
elf_backend_allow_non_load_phdr and is_target_special_symbol.

	* libbfd.c (_bfd_bool_bfd_false_error): Rename from bfd_false.
	(_bfd_bool_bfd_true): Rename from bfd_true.
	(_bfd_ptr_bfd_null_error): Rename from bfd_nullvoidptr.
	(_bfd_int_bfd_0): Rename from bfd_0.
	(_bfd_uint_bfd_0): Rename from bfd_0u.
	(_bfd_long_bfd_0): Rename from bfd_0l.
	(_bfd_long_bfd_n1_error): Rename from _bfd_n1.
	(_bfd_void_bfd): Rename from bfd_void.
	(_bfd_bool_bfd_false, _bfd_bool_bfd_asymbol_false),
	(_bfd_bool_bfd_link_false_error),
	(_bfd_bool_bfd_link_true, _bfd_bool_bfd_bfd_true),
	(_bfd_bool_bfd_uint_true, _bfd_bool_bfd_ptr_true),
	(_bfd_bool_bfd_asection_bfd_asection_true),
	(_bfd_bool_bfd_asymbol_bfd_asymbol_true),
	(_bfd_void_bfd_link, _bfd_void_bfd_asection): New functions.
	* archive.c (_bfd_noarchive_get_elt_at_index),
	(_bfd_noarchive_openr_next_archived_file),
	(_bfd_noarchive_construct_extended_name_table),
	(_bfd_noarchive_write_ar_hdr, _bfd_noarchive_truncate_arname),
	(_bfd_noarchive_write_armap): New functions.
	* archures.c (_bfd_nowrite_set_arch_mach): New function.
	* coff-alpha.c (alpha_ecoff_swap_coff_aux_in),
	(alpha_ecoff_swap_coff_sym_in, alpha_ecoff_swap_coff_lineno_in),
	(alpha_ecoff_swap_coff_aux_out, alpha_ecoff_swap_coff_sym_out),
	(alpha_ecoff_swap_coff_lineno_out),
	(alpha_ecoff_swap_coff_reloc_out): New functions.
	* coff-mips.c (mips_ecoff_swap_coff_aux_in),
	(mips_ecoff_swap_coff_sym_in, mips_ecoff_swap_coff_lineno_in),
	(mips_ecoff_swap_coff_aux_out, mips_ecoff_swap_coff_sym_out),
	(mips_ecoff_swap_coff_lineno_out),
	(mips_ecoff_swap_coff_reloc_out): New functions.
	* coffcode.h (coff_set_alignment_hook): Replace define with
	new function.
	(symname_in_debug_hook): Likewise.
	* ecoff.c (_bfd_ecoff_set_alignment_hook): New function.
	* elfxx-target.h (elf_backend_allow_non_load_phdr): Default to 0.
	* elf.c (assign_file_positions_except_relocs): Test
	elf_backend_allow_non_load_phdr for NULL.
	* elflink.c (_bfd_elf_omit_section_dynsym_default): Rename from
	_bfd_elf_link_omit_section_dynsym.  Update uses.
	(_bfd_elf_omit_section_dynsym_all): New function.
	* elf-bfd.h (_bfd_elf_link_omit_section_dynsym): Delete.
	(_bfd_elf_omit_section_dynsym_default): Declare.
	(_bfd_elf_omit_section_dynsym_all): Declare.
	* linker.c (_bfd_nolink_sizeof_headers, _bfd_nolink_bfd_relax_section),
	(_bfd_nolink_bfd_get_relocated_section_contents),
	(_bfd_nolink_bfd_lookup_section_flags),
	(_bfd_nolink_bfd_is_group_section, _bfd_nolink_bfd_discard_group),
	(_bfd_nolink_bfd_link_hash_table_create),
	(_bfd_nolink_bfd_link_just_syms),
	(_bfd_nolink_bfd_copy_link_hash_symbol_type),
	(_bfd_nolink_bfd_link_split_section),
	(_bfd_nolink_section_already_linked),
	(_bfd_nolink_bfd_define_common_symbol),
	(_bfd_nolink_bfd_define_start_stop): New functions.
	* reloc.c (_bfd_norelocs_bfd_reloc_type_lookup),
	(_bfd_norelocs_bfd_reloc_name_lookup),
	(_bfd_nodynamic_canonicalize_dynamic_reloc): New functions.
	* section.c (_bfd_nowrite_set_section_contents): New function.
	* syms.c (_bfd_nosymbols_canonicalize_symtab),
	(_bfd_nosymbols_print_symbol, _bfd_nosymbols_get_symbol_info),
	(_bfd_nosymbols_get_symbol_version_string),
	(_bfd_nosymbols_bfd_is_local_label_name),
	(_bfd_nosymbols_get_lineno, _bfd_nosymbols_find_nearest_line),
	(_bfd_nosymbols_find_line, _bfd_nosymbols_find_inliner_info),
	(_bfd_nosymbols_bfd_make_debug_symbol),
	( _bfd_nosymbols_read_minisymbols),
	( _bfd_nosymbols_minisymbol_to_symbol),
	(_bfd_nodynamic_get_synthetic_symtab): New functions.
	* libbfd-in.h: Declare new functions.  Update existing defines,
	removing casts.
	* aix386-core.c: Update to use new hooks.  Formatting.
	* aout-adobe.c: Likewise.
	* aout-arm.c: Likewise.
	* aout-target.h: Likewise.
	* aout-tic30.c: Likewise.
	* aoutf1.h: Likewise.
	* binary.c: Likewise.
	* bout.c: Likewise.
	* cisco-core.c: Likewise.
	* coff-alpha.c: Likewise.
	* coff-i386.c: Likewise.
	* coff-i860.c: Likewise.
	* coff-i960.c: Likewise.
	* coff-ia64.c: Likewise.
	* coff-mips.c: Likewise.
	* coff-ppc.c: Likewise.
	* coff-rs6000.c: Likewise.
	* coff-sh.c: Likewise.
	* coff-tic30.c: Likewise.
	* coff-tic54x.c: Likewise.
	* coff-x86_64.c: Likewise.
	* coff64-rs6000.c: Likewise.
	* coffcode.h: Likewise.
	* elf-m10300.c: Likewise.
	* elf32-cr16.c: Likewise.
	* elf32-lm32.c: Likewise.
	* elf32-m32r.c: Likewise.
	* elf32-metag.c: Likewise.
	* elf32-score.c: Likewise.
	* elf32-score7.c: Likewise.
	* elf32-tilepro.c: Likewise.
	* elf32-xstormy16.c: Likewise.
	* elf32-xtensa.c: Likewise.
	* elf64-alpha.c: Likewise.
	* elf64-hppa.c: Likewise.
	* elf64-ia64-vms.c: Likewise.
	* elf64-mmix.c: Likewise.
	* elf64-sh64.c: Likewise.
	* elfnn-ia64.c: Likewise.
	* elfxx-sparc.c: Likewise.
	* elfxx-target.h: Likewise.
	* elfxx-tilegx.c: Likewise.
	* elfxx-x86.h: Likewise.
	* hp300hpux.c: Likewise.
	* hppabsd-core.c: Likewise.
	* hpux-core.c: Likewise.
	* i386msdos.c: Likewise.
	* i386os9k.c: Likewise.
	* ieee.c: Likewise.
	* ihex.c: Likewise.
	* irix-core.c: Likewise.
	* libaout.h: Likewise.
	* libecoff.h: Likewise.
	* mach-o-target.c: Likewise.
	* mach-o.c: Likewise.
	* mipsbsd.c: Likewise.
	* mmo.c: Likewise.
	* netbsd-core.c: Likewise.
	* nlm-target.h: Likewise.
	* oasys.c: Likewise.
	* osf-core.c: Likewise.
	* pdp11.c: Likewise.
	* pe-mips.c: Likewise.
	* pe-x86_64.c: Likewise.
	* pef.c: Likewise.
	* plugin.c: Likewise.
	* ppcboot.c: Likewise.
	* ptrace-core.c: Likewise.
	* sco5-core.c: Likewise.
	* som.c: Likewise.
	* sparclynx.c: Likewise.
	* srec.c: Likewise.
	* tekhex.c: Likewise.
	* trad-core.c: Likewise.
	* verilog.c: Likewise.
	* versados.c: Likewise.
	* vms-alpha.c: Likewise.
	* vms-lib.c: Likewise.
	* wasm-module.c: Likewise.
	* xsym.c: Likewise.
	* libbfd.h: Regenerate.
 2018-02-16 19:09:23 +10:30
Renlin Li
322474019d [GAS][AARCH64]Add group relocations to create PC-relative offset. 
This is a patch to add the gas support for group relocations to create a
16, 32, 48, or 64 bit PC-relative offset inline.

The following relocations are added along with the test cases:
BFD_RELOC_AARCH64_MOVW_PREL_G0, BFD_RELOC_AARCH64_MOVW_PREL_G0_NC,
BFD_RELOC_AARCH64_MOVW_PREL_G1, BFD_RELOC_AARCH64_MOVW_PREL_G1_NC,
BFD_RELOC_AARCH64_MOVW_PREL_G2, BFD_RELOC_AARCH64_MOVW_PREL_G2_NC,
BFD_RELOC_AARCH64_MOVW_PREL_G3.

bfd/

2018-01-24  Renlin Li  <renlin.li@arm.com>

	* reloc.c: Add BFD_RELOC_AARCH64_MOVW_PREL_G0,
	BFD_RELOC_AARCH64_MOVW_PREL_G0_NC, BFD_RELOC_AARCH64_MOVW_PREL_G1,
	BFD_RELOC_AARCH64_MOVW_PREL_G1_NC, BFD_RELOC_AARCH64_MOVW_PREL_G2,
	BFD_RELOC_AARCH64_MOVW_PREL_G2_NC, BFD_RELOC_AARCH64_MOVW_PREL_G3.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Regenerate.
	* elfnn-aarch64.c (elfNN_aarch64_howto_table): Add entries for
	BFD_RELOC_AARCH64_MOVW_PREL_G0, BFD_RELOC_AARCH64_MOVW_PREL_G0_NC,
	BFD_RELOC_AARCH64_MOVW_PREL_G1, BFD_RELOC_AARCH64_MOVW_PREL_G1_NC,
	BFD_RELOC_AARCH64_MOVW_PREL_G2, BFD_RELOC_AARCH64_MOVW_PREL_G2_NC,
	BFD_RELOC_AARCH64_MOVW_PREL_G3.

gas/

2018-01-24  Renlin Li  <renlin.li@arm.com>

	* config/tc-aarch64.c (reloc_table): add entries for
	BFD_RELOC_AARCH64_MOVW_PREL_G0, BFD_RELOC_AARCH64_MOVW_PREL_G0_NC,
	BFD_RELOC_AARCH64_MOVW_PREL_G1, BFD_RELOC_AARCH64_MOVW_PREL_G1_NC,
	BFD_RELOC_AARCH64_MOVW_PREL_G2, BFD_RELOC_AARCH64_MOVW_PREL_G2_NC,
	BFD_RELOC_AARCH64_MOVW_PREL_G3.
	(process_movw_reloc_info): Supports newly added MOVW_PREL relocations.
	(md_apply_fix): Likewise
	* testsuite/gas/aarch64/prel_g0.s: New.
	* testsuite/gas/aarch64/prel_g0.d: New.
	* testsuite/gas/aarch64/prel_g0_nc.s: New.
	* testsuite/gas/aarch64/prel_g0_nc.d: New.
	* testsuite/gas/aarch64/prel_g1.s: New.
	* testsuite/gas/aarch64/prel_g1.d: New.
	* testsuite/gas/aarch64/prel_g1_nc.s: New.
	* testsuite/gas/aarch64/prel_g1_nc.d: New.
	* testsuite/gas/aarch64/prel_g2.s: New.
	* testsuite/gas/aarch64/prel_g2.d: New.
	* testsuite/gas/aarch64/prel_g2_nc.s: New.
	* testsuite/gas/aarch64/prel_g2_nc.d: New.
	* testsuite/gas/aarch64/prel_g3.s: New.
	* testsuite/gas/aarch64/prel_g3.d: New.
 2018-01-24 16:19:47 +00:00
Alan Modra
219d1afa89 Update year range in copyright notice of binutils files 2018-01-03 17:49:56 +10:30
Alan Modra
07d6d2b834 BFD whitespace fixes 
Binutils is supposed to use tabs.  In my git config I have
whitespace = indent-with-non-tab,space-before-tab,trailing-space
and I got annoyed enough seeing red in "git diff" output to fix
the problems.

	* doc/header.sed: Trim trailing space when splitting lines.
	* aix386-core.c, * aout-adobe.c, * aout-arm.c, * aout-cris.c,
	* aout-ns32k.c, * aout-target.h, * aout-tic30.c, * aoutf1.h, * aoutx.h,
	* arc-got.h, * arc-plt.def, * arc-plt.h, * archive.c, * archive64.c,
	* archures.c, * armnetbsd.c, * bfd-in.h, * bfd.c, * bfdio.c, * binary.c,
	* bout.c, * cache.c, * cisco-core.c, * coff-alpha.c, * coff-apollo.c,
	* coff-arm.c, * coff-h8300.c, * coff-i386.c, * coff-i860.c,
	* coff-i960.c, * coff-m68k.c, * coff-m88k.c, * coff-mcore.c,
	* coff-mips.c, * coff-ppc.c, * coff-rs6000.c, * coff-sh.c,
	* coff-stgo32.c, * coff-tic4x.c, * coff-tic54x.c, * coff-tic80.c,
	* coff-we32k.c, * coff-x86_64.c, * coff-z80.c, * coff-z8k.c,
	* coff64-rs6000.c, * coffcode.h, * coffgen.c, * cofflink.c,
	* coffswap.h, * compress.c, * corefile.c, * cpu-alpha.c, * cpu-arm.c,
	* cpu-avr.c, * cpu-bfin.c, * cpu-cr16.c, * cpu-cr16c.c, * cpu-crx.c,
	* cpu-d10v.c, * cpu-frv.c, * cpu-ft32.c, * cpu-i370.c, * cpu-i960.c,
	* cpu-ia64-opc.c, * cpu-ip2k.c, * cpu-lm32.c, * cpu-m32r.c,
	* cpu-mcore.c, * cpu-microblaze.c, * cpu-mips.c, * cpu-moxie.c,
	* cpu-mt.c, * cpu-nios2.c, * cpu-ns32k.c, * cpu-or1k.c, * cpu-powerpc.c,
	* cpu-pru.c, * cpu-sh.c, * cpu-spu.c, * cpu-v850.c, * cpu-v850_rh850.c,
	* cpu-xgate.c, * cpu-z80.c, * dwarf1.c, * dwarf2.c, * ecoff.c,
	* ecofflink.c, * ecoffswap.h, * elf-bfd.h, * elf-eh-frame.c,
	* elf-hppa.h, * elf-m10200.c, * elf-m10300.c, * elf-s390-common.c,
	* elf-strtab.c, * elf-vxworks.c, * elf.c, * elf32-am33lin.c,
	* elf32-arc.c, * elf32-arm.c, * elf32-avr.c, * elf32-avr.h,
	* elf32-bfin.c, * elf32-cr16.c, * elf32-cr16c.c, * elf32-cris.c,
	* elf32-crx.c, * elf32-d10v.c, * elf32-d30v.c, * elf32-dlx.c,
	* elf32-epiphany.c, * elf32-fr30.c, * elf32-frv.c, * elf32-ft32.c,
	* elf32-h8300.c, * elf32-hppa.c, * elf32-i386.c, * elf32-i860.c,
	* elf32-i960.c, * elf32-ip2k.c, * elf32-lm32.c, * elf32-m32c.c,
	* elf32-m32r.c, * elf32-m68hc11.c, * elf32-m68hc12.c, * elf32-m68hc1x.c,
	* elf32-m68hc1x.h, * elf32-m68k.c, * elf32-m88k.c, * elf32-mcore.c,
	* elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-mips.c,
	* elf32-moxie.c, * elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c,
	* elf32-nds32.h, * elf32-nios2.c, * elf32-or1k.c, * elf32-pj.c,
	* elf32-ppc.c, * elf32-ppc.h, * elf32-pru.c, * elf32-rl78.c,
	* elf32-rx.c, * elf32-s390.c, * elf32-score.c, * elf32-score.h,
	* elf32-score7.c, * elf32-sh-symbian.c, * elf32-sh.c, * elf32-sh64.c,
	* elf32-sparc.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-tilegx.c,
	* elf32-tilegx.h, * elf32-tilepro.c, * elf32-tilepro.h, * elf32-v850.c,
	* elf32-vax.c, * elf32-wasm32.c, * elf32-xc16x.c, * elf32-xgate.c,
	* elf32-xgate.h, * elf32-xstormy16.c, * elf32-xtensa.c, * elf64-alpha.c,
	* elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mips.c, * elf64-mmix.c,
	* elf64-ppc.c, * elf64-s390.c, * elf64-sh64.c, * elf64-sparc.c,
	* elf64-tilegx.c, * elf64-tilegx.h, * elf64-x86-64.c, * elfcore.h,
	* elflink.c, * elfn32-mips.c, * elfnn-aarch64.c, * elfnn-ia64.c,
	* elfnn-riscv.c, * elfxx-aarch64.c, * elfxx-aarch64.h, * elfxx-ia64.c,
	* elfxx-ia64.h, * elfxx-mips.c, * elfxx-riscv.c, * elfxx-sparc.c,
	* elfxx-tilegx.c, * elfxx-x86.c, * elfxx-x86.h, * freebsd.h, * hash.c,
	* host-aout.c, * hp300hpux.c, * hppabsd-core.c, * hpux-core.c,
	* i386aout.c, * i386linux.c, * i386lynx.c, * i386mach3.c, * i386msdos.c,
	* i386netbsd.c, * ieee.c, * ihex.c, * irix-core.c, * libaout.h,
	* libbfd-in.h, * libbfd.c, * libcoff-in.h, * libnlm.h, * libpei.h,
	* libxcoff.h, * linker.c, * lynx-core.c, * m68k4knetbsd.c,
	* m68klinux.c, * m68knetbsd.c, * m88kmach3.c, * mach-o-aarch64.c,
	* mach-o-arm.c, * mach-o-i386.c, * mach-o-target.c, * mach-o-x86-64.c,
	* mach-o.c, * mach-o.h, * merge.c, * mipsbsd.c, * mmo.c, * netbsd.h,
	* netbsd-core.c, * newsos3.c, * nlm-target.h, * nlm32-ppc.c,
	* nlm32-sparc.c, * nlmcode.h, * ns32k.h, * ns32knetbsd.c, * oasys.c,
	* opncls.c, * pc532-mach.c, * pdp11.c, * pe-arm.c, * pe-i386.c,
	* pe-mcore.c, * pe-mips.c, * pe-x86_64.c, * peXXigen.c, * pef.c,
	* pef.h, * pei-arm.c, * pei-i386.c, * pei-mcore.c, * pei-x86_64.c,
	* peicode.h, * plugin.c, * ppcboot.c, * ptrace-core.c, * reloc.c,
	* riscix.c, * rs6000-core.c, * section.c, * som.c, * som.h,
	* sparclinux.c, * sparcnetbsd.c, * srec.c, * stabs.c, * sunos.c,
	* syms.c, * targets.c, * tekhex.c, * trad-core.c, * vax1knetbsd.c,
	* vaxnetbsd.c, * verilog.c, * versados.c, * vms-alpha.c, * vms-lib.c,
	* vms-misc.c, * wasm-module.c, * wasm-module.h, * xcofflink.c,
	* xsym.c, * xsym.h: Whitespace fixes.
	* bfd-in2.h, * libbfd.h, * libcoff.h: Regenerate.
 2017-12-06 17:51:43 +10:30
Nick Clifton
b23dc97fe2 Fix a memory access violation when attempting to parse a corrupt COFF binary with a relocation that points beyond the end of the section to be relocated. 
PR 22506
	* reloc.c (reloc_offset_in_range): Rename to
	bfd_reloc_offset_in_range and export.
	(bfd_perform_relocation): Rename function invocation.
	(bfd_install_relocation): Likewise.
	(bfd_final_link_relocate): Likewise.
	* bfd-in2.h: Regenerate.
	* coff-arm.c (coff_arm_reloc): Use bfd_reloc_offset_in_range.
	* coff-i386.c (coff_i386_reloc): Likewise.
	* coff-i860.c (coff_i860_reloc): Likewise.
	* coff-m68k.c (mk68kcoff_common_addend_special_fn): Likewise.
	* coff-m88k.c (m88k_special_reloc): Likewise.
	* coff-mips.c (mips_reflo_reloc): Likewise.
	* coff-x86_64.c (coff_amd64_reloc): Likewise.
 2017-11-28 13:20:31 +00:00
James Bowman
81b42bcab1 FT32B is a new FT32 family member. It has a code compression scheme, which requires the use of linker relaxations. The change is quite large, so submission is in several parts. 
Part 2 adds a relaxation pass, which actually implements the code compression scheme.

bfd	* archures.c: Add bfd_mach_ft32b.
	* cpu-ft32.c: Add arch_info_struct.
	* elf32-ft32.c: Add R_FT32_RELAX, SC0, SC1,
	DIFF32. (ft32_elf_relocate_section): Add clauses
	for R_FT32_SC0, SC1, DIFF32.  (ft32_reloc_shortable,
	elf32_ft32_is_diff_reloc, elf32_ft32_adjust_diff_reloc_value,
	elf32_ft32_adjust_reloc_if_spans_insn,
	elf32_ft32_relax_delete_bytes, elf32_ft32_relax_is_branch_target,
	ft32_elf_relax_section): New function.
	* reloc.c: Add BFD_RELOC_FT32_RELAX, SC0, SC1, DIFF32.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Regenerate.

gas	* config/tc-ft32.c (md_assemble): add relaxation reloc
	BFD_RELOC_FT32_RELAX.  (md_longopts): Add "norelax" and
	"no-relax". (md_apply_fix): Add reloc BFD_RELOC_FT32_DIFF32.
	(relaxable_section, ft32_validate_fix_sub, ft32_force_relocation,
	ft32_allow_local_subtract): New function.
	* config/tc-ft32.h: remove unused MD_PCREL_FROM_SECTION.
	* testsuite/gas/ft32/insnsc.s: New test exercising all FT32B
	shortcodes.

include	* elf/ft32.h: Add R_FT32_RELAX, SC0, SC1, DIFF32.
 2017-11-01 15:33:24 +00:00
James Bowman
3b4b0a629a FT32: support for FT32B processor - part 1 
FT32B is a new FT32 family member. It has a code
compression scheme, which requires the use of linker
relaxations. The change is quite large, so submission
is in several parts.

Part 1 adds a 15-bit instruction field, and CPU-specific functions for
the code compression that are used in binutils and GDB.

bfd/ChangeLog:

2017-10-12  James Bowman  <james.bowman@ftdichip.com>

	* bfd-in2.h: Regenerate.
	* libbfd.h: Regenerate.
	* elf32-ft32.c: Add HOWTO R_FT32_15.
	* reloc.c: Add BFD_RELOC_FT32_15.

gas/ChangeLog:

2017-10-12  James Bowman  <james.bowman@ftdichip.com>

	* config/tc-ft32.c (md_assemble): Replace FT32_FLD_K8 with
	K15.
	(md_apply_fix, tc_gen_reloc): Add BFD_RELOC_FT32_15.

include/ChangeLog:

2017-10-12  James Bowman  <james.bowman@ftdichip.com>

	* elf/ft32.h: Add R_FT32_15.
	* opcode/ft32.h: Replace FT32_FLD_K8 with K15.
	(ft32_shortcode, sc_compar, ft32_split_shortcode,
	ft32_merge_shortcode, ft32_merge_shortcode): New functions.

opcodes/ChangeLog:

2017-10-12  James Bowman  <james.bowman@ftdichip.com>

	* opcodes/ft32-dis.c (print_insn_ft32): Replace FT32_FLD_K8 with K15.
	* opcodes/ft32-opc.c (ft32_opc_info): Replace FT32_FLD_K8 with
	K15. Add jmpix pattern.

sim/ChangeLog:

2017-10-12  James Bowman  <james.bowman@ftdichip.com>

	* sim/ft32/interp.c (step_once): Replace FT32_FLD_K8 with K15.
 2017-10-12 18:41:29 -07:00
Nick Clifton
1d75a8e26e Force the AArch64 linker backend to refuse to link when it encounters unresoleable relocations. 
* reloc.c (enum bfd_reloc_status): Start values at 2.
	* bfd-in2.h: Regenerate.
	* elfnn-aarch64.c (aarch64_relocate): Invert sense of function, so
	that a TRUE return indicates success.  Compare the result of
	calling _bfd_aarch64_elf_put_addend against bfd_reloc_ok.
	(build_one_stub): Change sense of tests against aarch64_relocate
	return value.
	(elfNN_aarch64_tls_relax): Return bfd_reloc_notsupported, rather
	than FALSE, when an error is detected.
	(elfNN_aarch64_final_link_relocate): Likewise.

	* testsuite/ld-aarch64/pcrel_pic_defined.d: Expect errors not
	warnings.  Expect errors about unsupported relocations.
	* testsuite/ld-aarch64/pcrel_pic_undefined.d: Likewise.
 2017-10-12 13:38:20 +01:00
Nick Clifton
47aeb64c10 Improve "unrecognized relocation" error messages to add the suggestion that the linker might be out of date. 
PR 21803
	* reloc.c (_bfd_unrecognized_reloc): New function.  Reports
	an unrecognized reloc and sets the bfd_error value.
	* libbfd.h: Regenerate.
	* elf32-arm.c (elf32_arm_final_link_relocate): Use the new
	function.
	* elf32-i386.c (elf_i386_relocate_section): Likewise.
	* elf32-tilepro.c (tilepro_elf_relocate_section): Likewise.
	* elf64-x86-64.c (elf_x86_64_relocate_section): Likewise.
	* elfnn-aarch64.c (elfNN_aarch64_relocate_section): Likewise.
	* elfxx-tilegx.c (tilegx_elf_relocate_section): Likewise.
 2017-07-24 11:27:33 +01:00
John Eric Martin
684d5a10b1 [ARC] Add JLI support. 
The following relocation types were added to GCC/binutils:

ARC_JLI_SECTOFF is a relocation type in Metaware that is now used by
GCC as well to adjust the index of function calls to functions with
attribute jli_call_always.

bfd/
2017-07-19  Claudiu Zissulescu  <claziss@synopsys.com>
	    John Eric Martin  <John.Martin@emmicro-us.com>

	* bfd-in2.h: Regenerate.
	* libbfd.h: Regenerate.
	* elf32-arc.c (JLI): Define.
	* reloc.c: Add JLI relocations.

gas/
2017-07-19  Claudiu Zissulescu  <claziss@synopsys.com>

	* testsuite/gas/arc/jli-1.d: New file.
	* testsuite/gas/arc/jli-1.s: Likewise.
	* testsuite/gas/arc/taux.d: Update for jli_base.

include/
2017-07-19  Claudiu Zissulescu  <claziss@synopsys.com>
	    John Eric Martin  <John.Martin@emmicro-us.com>

	* elf/arc-reloc.def: Add JLI relocs howto.
	* opcode/arc-func.h (replace_jli): New function.

ld/
2017-07-19  Claudiu Zissulescu  <claziss@synopsys.com>
	    John Eric Martin  <John.Martin@emmicro-us.com>

	* emulparams/arcelf.sh (JLI_START_TABLE): Define.
	* scripttempl/elfarc.sc: Handle jlitab section.
	* scripttempl/elfarcv2.sc: Likewise.
	* testsuite/ld-arc/arc.exp: Add JLI test.
	* testsuite/ld-arc/jli-script.ld: New file.
	* testsuite/ld-arc/jli-simple.dd: Likewise.
	* testsuite/ld-arc/jli-simple.rd: Likewise.
	* testsuite/ld-arc/jli-simple.s: Likewise.
	* testsuite/ld/testsuite/ld-arc/jli-overflow.s: Likewise.
	* testsuite/ld/testsuite/ld-arc/jli-overflow.d: Likewise.
	* testsuite/ld/testsuite/ld-arc/jli-overflow.err: Likewise.

opcode/
2017-07-19  Claudiu Zissulescu  <claziss@synopsys.com>
	    John Eric Martin  <John.Martin@emmicro-us.com>

	* arc-opc.c (UIMM10_6_S_JLIOFF): Define.
	(UIMM3_23): Adjust accordingly.
	* arc-regs.h: Add/correct jli_base register.
	* arc-tbl.h (jli_s): Likewise.
 2017-07-19 09:56:55 +02:00
Kuan-Lin Chen
a6cbf936e3 RISC-V: Use pc-relative relocation for FDE initial location 
The symbol address in .eh_frame may be adjusted in
_bfd_elf_discard_section_eh_frame, and the content of .eh_frame will be
adjusted in _bfd_elf_write_section_eh_frame. Therefore, we cannot insert
a relocation whose addend symbol is in .eh_frame. Othrewise, the value
may be adjusted twice.

bfd/ChangeLog
2017-06-26  Kuan-Lin Chen  <rufus@andestech.com>

	* elfnn-riscv.c (perform_relocation): Support the new
	R_RISCV_32_PCREL relocation.
	(riscv_elf_relocate_section): Likewise.
	* elfxx-riscv.c (howto_table): Likewise.
	(riscv_reloc_map): Likewise.
	* bfd-in2.h (BFD_RELOC_RISCV_32_PCREL): New relocation.
	* libbfd.h: Regenerate.

gas/ChangeLog
2017-06-26  Kuan-Lin Chen  <rufus@andestech.com>

	* config/tc-riscv.c (md_apply_fix) [BFD_RELOC_32]: Convert to a
	R_RISCV_32_PCREL relocation.

include/ChangeLog
2017-06-26  Kuan-Lin Chen  <rufus@andestech.com>

	* elf/riscv.h (R_RISCV_32_PCREL): New.
 2017-06-26 18:26:40 -07:00
Jiong Wang
4aa57d6a2b [AArch64] Fix typo in comments on relocation name 
BFD_RELOC_AARCH64_ADR_GOTPAGE should be BFD_RELOC_AARCH64_ADR_GOT_PAGE.

bfd/
  * reloc.c (BFD_RELOC_AARCH64_ADR_GOTPAGE): Rename to
  BFD_RELOC_AARCH64_ADR_GOT_PAGE
  * bfd-in2.h: Regenerated.
 2017-06-23 13:45:30 +01:00
Nick Clifton
20bd1b6ba5 Fix seg-fault in the BFD parsing a corrupt input binary. 
PR binutils/21645
	* reloc.c (bfd_generic_get_relocated_section_contents): Fail if
	bfd_get_full_section_contents returns no contents.
 2017-06-21 13:18:46 +01:00
Jose E. Marchesi
2318686590 bfd: new BFD target entry point _bfd_set_reloc. 
This patch adds a new entry point to the BFD_JUMP_TABLE_RELOCS.  The
previous common implementation `bfd_set_reloc', in bfd/bfd.c, has been
moved to bfd/reloc.c with the name `_bfd_generic_set_reloc', and all
BFD targets has been adapted to use it.

This patch doesn't introduce any change on functionality, but prepares
the ground for further work.

bfd/ChangeLog:

    2017-05-10  Jose E. Marchesi  <jose.marchesi@oracle.com>

    	* targets.c (BFD_JUMP_TABLE_RELOCS): Add NAME##_set_reloc.
    	(struct bfd_target): New field _bfd_set_reloc.
    	* bfd.c (bfd_set_reloc): Call backend _set_bfd.
    	* reloc.c (_bfd_generic_set_reloc): New function.
    	* coffcode.h (coff_set_reloc): Define to _bfd_generic_set_reloc.
    	* nlm-target.h (nlm_set_reloc): Likewise.
    	* coff-rs6000.c (_bfd_xcoff_set_reloc): Likewise.
    	* aout-tic30.c (MY_set_reloc): Likewise.
    	* aout-target.h (MY_set_reloc): Likewise.
    	* elfxx-target.h (bfd_elfNN_set_reloc): Likewise.
    	* coff-alpha.c (_bfd_ecoff_set_reloc): Likewise.
    	* mach-o-target.c (bfd_mach_o_set_reloc): Likewise.
    	* vms-alpha.c (alpha_vms_set_reloc): Likewise.
    	* aout-adobe.c (aout_32_set_reloc): Likewise.
    	* bout.c (b_out_set_reloc): Likewise.
    	* coff-mips.c (_bfd_ecoff_set_reloc): Likewise.
    	* i386os9k.c (aout_32_set_reloc): Likewise.
    	* ieee.c (ieee_set_reloc): Likewise.
    	* oasys.c (oasys_set_reloc): Likewise.
    	* som.c (som_set_reloc): Likewise.
    	* versados.c (versados_set_reloc): Likewise.
    	* coff64-rs6000.c (rs6000_xcoff64_vec): Add
    	_bfd_generic_set_reloc.
    	(rs6000_xcoff64_aix_vec): LIkewise.
    	* libbfd.c (_bfd_norelocs_set_reloc): New function.
    	* libbfd-in.h: Prototype for _bfd_norelocs_set_reloc.
    	* i386msdos.c (msdos_set_reloc): Define to
    	_bfd_norelocs_set_reloc.
    	* elfcode.h (elf_set_reloc): Define.
    	* bfd-in2.h: Regenerated.
 2017-05-10 18:45:30 +02:00
Alan Modra
a941291cab PR21432, buffer overflow in perform_relocation 
The existing reloc offset range tests didn't catch small negative
offsets less than the size of the reloc field.

	PR 21432
	* reloc.c (reloc_offset_in_range): New function.
	(bfd_perform_relocation, bfd_install_relocation): Use it.
	(_bfd_final_link_relocate): Likewise.
 2017-04-29 18:59:37 +09:30
Nick Clifton
04b31182bf Fix a seg-fault when processing a corrupt binary containing reloc(s) with negative addresses. 
PR binutils/21434
	* reloc.c (bfd_perform_relocation): Check for a negative address
	in the reloc.
 2017-04-26 16:30:22 +01:00
Pip Cet
f96bd6c2d7 Add support for the WebAssembly file format and the wasm32 ELF conversion to gas and the binutils. 
binutils * readelf.c: Add support for wasm32 ELF format WebAssembly files.
	(guess_is_rela): Likewise.
	(dump_relocations): Likewise.
	(is_32bit_abs_reloc): Likewise.
	(is_none_reloc_): Likewise.
	* NEWS: Mention the new support.
	* testsuite/lib/binutils-common.exp (is_elf_format): Mark wasm32
	as ELF target.
	(supports_gnu_unique): Mark wasm32 as supporting STB_GNU_UNIQUE.
	* testsuite/binutils-all/nm.exp: Mark wasm32 as requiring .size annotations.
	* testsuite/binutils-all/wasm32: New directory.
	* testsuite/binutils-all/wasm32/create-wasm.d: New file.
	* testsuite/binutils-all/wasm32/create-wasm.s: Likewise.
	* testsuite/binutils-all/wasm32/custom-section.d: Likewise.
	* testsuite/binutils-all/wasm32/custom-section.s: Likewise.
	* testsuite/binutils-all/wasm32/invalid-wasm-1.d: Likewise.
	* testsuite/binutils-all/wasm32/invalid-wasm-1.s: Likewise.
	* testsuite/binutils-all/wasm32/long-sections.d: Likewise.
	* testsuite/binutils-all/wasm32/long-sections.s: Likewise.
	* testsuite/binutils-all/wasm32/parse-wasm.d: Likewise.
	* testsuite/binutils-all/wasm32/parse-wasm.s: Likewise.
	* testsuite/binutils-all/wasm32/parse-wasm-2.d: Likewise.
	* testsuite/binutils-all/wasm32/parse-wasm-2.s: Likewise.
	* testsuite/binutils-all/wasm32/prepared-section.d: Likewise.
	* testsuite/binutils-all/wasm32/prepared-section.s: Likewise.
	* testsuite/binutils-all/wasm32/wasm32.exp: New file, run tests.

gas	* config/tc-wasm32.h: New file: Add WebAssembly assembler target.
	* config/tc-wasm32.c: New file: Add WebAssembly assembler target.
	* Makefile.am: Add WebAssembly assembler target.
	* configure.tgt: Add WebAssembly assembler target.
	* doc/c-wasm32.texi: New file: Start documenting WebAssembly
	assembler.
	* doc/all.texi: Define WASM32.
	* doc/as.texinfo: Add WebAssembly entries.
	* NEWS: Mention the new support.
	* Makefile.in: Regenerate.
	* po/gas.pot: Regenerate.
	* po/POTFILES.in: Regenerate.
	* testsuite/gas/wasm32: New directory.
	* testsuite/gas/wasm32/allinsn.d: New file.
	* testsuite/gas/wasm32/allinsn.s: New file.
	* testsuite/gas/wasm32/illegal.l: New file.
	* testsuite/gas/wasm32/illegal.s: New file.
	* testsuite/gas/wasm32/illegal-2.l: New file.
	* testsuite/gas/wasm32/illegal-2.s: New file.
	* testsuite/gas/wasm32/illegal-3.l: New file.
	* testsuite/gas/wasm32/illegal-3.s: New file.
	* testsuite/gas/wasm32/illegal-4.l: New file.
	* testsuite/gas/wasm32/illegal-4.s: New file.
	* testsuite/gas/wasm32/illegal-5.l: New file.
	* testsuite/gas/wasm32/illegal-5.s: New file.
	* testsuite/gas/wasm32/illegal-6.l: New file.
	* testsuite/gas/wasm32/illegal-6.s: New file.
	* testsuite/gas/wasm32/illegal-7.l: New file.
	* testsuite/gas/wasm32/illegal-7.s: New file.
	* testsuite/gas/wasm32/illegal-8.l: New file.
	* testsuite/gas/wasm32/illegal-8.s: New file.
	* testsuite/gas/wasm32/illegal-9.l: New file.
	* testsuite/gas/wasm32/illegal-9.s: New file.
	* testsuite/gas/wasm32/illegal-10.l: New file.
	* testsuite/gas/wasm32/illegal-10.s: New file.
	* testsuite/gas/wasm32/illegal-11.l: New file.
	* testsuite/gas/wasm32/illegal-11.s: New file.
	* testsuite/gas/wasm32/illegal-12.l: New file.
	* testsuite/gas/wasm32/illegal-12.s: New file.
	* testsuite/gas/wasm32/illegal-13.l: New file.
	* testsuite/gas/wasm32/illegal-13.s: New file.
	* testsuite/gas/wasm32/illegal-14.l: New file.
	* testsuite/gas/wasm32/illegal-14.s: New file.
	* testsuite/gas/wasm32/illegal-15.l: New file.
	* testsuite/gas/wasm32/illegal-15.s: New file.
	* testsuite/gas/wasm32/illegal-16.l: New file.
	* testsuite/gas/wasm32/illegal-16.s: New file.
	* testsuite/gas/wasm32/illegal-17.l: New file.
	* testsuite/gas/wasm32/illegal-17.s: New file.
	* testsuite/gas/wasm32/illegal-18.l: New file.
	* testsuite/gas/wasm32/illegal-18.s: New file.
	* testsuite/gas/wasm32/illegal-19.l: New file.
	* testsuite/gas/wasm32/illegal-19.s: New file.
	* testsuite/gas/wasm32/illegal-20.l: New file.
	* testsuite/gas/wasm32/illegal-20.s: New file.
	* testsuite/gas/wasm32/illegal-21.l: New file.
	* testsuite/gas/wasm32/illegal-21.s: New file.
	* testsuite/gas/wasm32/illegal-22.l: New file.
	* testsuite/gas/wasm32/illegal-22.s: New file.
	* testsuite/gas/wasm32/illegal-24.l: New file.
	* testsuite/gas/wasm32/illegal-24.s: New file.
	* testsuite/gas/wasm32/illegal-25.l: New file.
	* testsuite/gas/wasm32/illegal-25.s: New file.
	* testsuite/gas/wasm32/reloc.d: New file.
	* testsuite/gas/wasm32/reloc.s: New file.
	* testsuite/gas/wasm32/wasm32.exp: New tests for WebAssembly
	architecture.

opcodes * configure.ac: Add (empty) bfd_wasm32_arch target.
	* configure: Regenerate
	* po/opcodes.pot: Regenerate.

include	* opcode/wasm.h: New file to support wasm32 architecture.
	* elf/wasm32.h: Add R_WASM32_32 relocation.

bfd	* elf32-wasm32.c: Add relocation code, two relocs.
	* reloc.c: Add wasm32 relocations.
	* libbfd.h: Regenerate.
	* bfd-in2.h: Regenerate.
	* bfd/po/bfd.pot: Regenerate.
 2017-03-30 10:57:21 +01:00
Nick Clifton
f955cccff3 Rename R_AARCH64_TLSDESC_LD64_LO12_NC to R_AARCH64_TLSDESC_LD64_LO12 and R_AARCH64_TLSDESC_ADD_LO12_NC to R_AARCH64_TLSDESC_ADD_LO12. 
PR binutils/21202
include	* elf/aarch64.h (R_AARCH64_TLSDESC_LD64_LO12_NC): Rename to
	R_AARCH64_TLSDESC_LD64_LO12.
	(R_AARCH64_TLSDESC_ADD_LO12_NC): Rename to
	R_AARCH64_TLSDESC_ADD_LO12_NC.

bfd	* reloc.c (BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC): Rename to
	BFD_RELOC_AARCH64_TLSDESC_LD64_LO12.
	(BFD_RELOC_AARCH64_TLSDESC_ADD_LO12_NC): Rename to
	BFD_RELOC_AARCH64_TLSDESC_ADD_LO12.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Regenerate.
	* elfnn-aarch64.c (IS_AARCH64_TLS_RELAX_RELOC): Update reloc
	names.
	(IS_AARCH64_TLSDESC_RELOC): Likewise.
	(elfNN_aarch64_howto_table): Likewise.
	(aarch64_tls_transition_without_check): Likewise.
	(aarch64_reloc_got_type): Likewise.
	(elfNN_aarch64_final_link_relocate): Likewise.
	(elfNN_aarch64_tls_relax): Likewise.
	(elfNN_aarch64_relocate_section): Likewise.
	(elfNN_aarch64_gc_sweep_hook): Likewise.
	(elfNN_aarch64_check_relocs): Likewise.
	* elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise.
	(_bfd_aarch64_elf_resolve_relocation): Likewise.

gas	* config/tc-aarch64.c (reloc_table): Rename
	BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC to
	BFD_RELOC_AARCH64_TLSDESC_LD64_LO12.  Rname
	BFD_RELOC_AARCH64_TLSDESC_ADD_LO12_NC to
	BFD_RELOC_AARCH64_TLSDESC_ADD_LO12.
	(md_apply_fix): Likewise.
	(aarch64_force_relocation): Likewise.
	* testsuite/gas/aarch64/tls.d: Update regexp.

ld	* testsuite/ld-aarch64/ifunc-5r-local.d: Update regexp.
 2017-03-13 09:58:04 +00:00
Alan Modra
7ba71655a4 PowerPC addpcis fix 
This came up because I was looking at ld/tmpdir/addpcis.o and noticed
the odd addends on REL16DX_HA.  They ought to both be -4.  The error
crept in due REL16DX_HA howto being pc-relative (as indeed it should
be), and code at gas/write.c:1001 after this comment
	      /* Make it pc-relative.  If the back-end code has not
		 selected a pc-relative reloc, cancel the adjustment
		 we do later on all pc-relative relocs.  */
*not* cancelling the pc-relative adjustment.  So I've made a dummy
non-relative split reloc so that the generic code handles this, rather
than attempting to add hacks later in md_apply_fix which would not be
very robust.  Having the new internal reloc also makes it easy to
support

 addpcis rx,sym@ha

as an equivalent to

 addpcis rx,(sym-0f)@ha
0:

The patch also fixes overflow checking, which must test whether the
addi will overflow too since @l relocs don't have any overflow check.

Lastly, since I was poking at md_apply_fix, I arranged to have the
generic gas/write.c code emit errors for subtraction expressions where
we lack reloc support.

include/
	* elf/ppc64.h (R_PPC64_16DX_HA): New.  Expand fake reloc comment.
	* elf/ppc.h (R_PPC_16DX_HA): Likewise.
bfd/
	* reloc.c (BFD_RELOC_PPC_16DX_HA): New.
	* elf64-ppc.c (ppc64_elf_howto_raw <R_PPC64_16DX_HA>): New howto.
	(ppc64_elf_reloc_type_lookup): Translate new bfd reloc.
	(ppc64_elf_ha_reloc): Correct overflow test on REL16DX_HA.
	(ppc64_elf_relocate_section): Likewise.
	* elf32-ppc.c (ppc_elf_howto_raw <R_PPC_16DX_HA>): New howto.
	(ppc_elf_reloc_type_lookup): Translate new bfd reloc.
	(ppc_elf_check_relocs): Handle R_PPC_16DX_HA to pacify gcc.
	* libbfd.h: Regenerate.
	* bfd-in2.h: Regenerate.
gas/
	* config/tc-ppc.c (md_assemble): Use BFD_RELOC_PPC_16DX_HA for addpcis.
	(md_apply_fix): Remove fx_subsy check.  Move code converting to
	pcrel reloc earlier and handle BFD_RELOC_PPC_16DX_HA.  Remove code
	emiiting errors on seeing fx_pcrel set on unexpected relocs, as
	that is done now by the generic code via..
	* config/tc-ppc.h (TC_FORCE_RELOCATION_SUB_LOCAL): ..this. Define.
	(TC_VALIDATE_FIX_SUB): Define.
ld/
	* testsuite/ld-powerpc/addpcis.d: Define ext1 and ext2 at
	limits of addpcis range.
 2017-02-28 11:59:47 +10:30
Alan Modra
2571583aed Update year range in copyright notice of all files. 2017-01-02 14:08:56 +10:30
Dimitar Dimitrov
889294f6ff PRU BFD support 
include/
	* elf/common.h: Add PRU ELF.
	* elf/pru.h: New file.
	* opcode/pru.h: New file.
	* dis-asm.h (print_insn_pru): Declare.
bfd/
	* archures.c: Add bfd_arch_pru.
	* Makefile.am: Add PRU target.
	* config.bfd: Ditto.
	* configure.ac: Ditto.
	* elf-bfd.h (enum elf_target_id): Add PRU_ELF_DATA.
	* targets.c: Add pru_elf32_vec.
	* reloc.c: Add PRU relocations.
	* cpu-pru.c: New file.
	* elf32-pru.c: New file.
	* Makefile.in: Regenerate.
	* configure: Regenerate.
	* po/SRC-POTFILES.in: Regenerate.
	* bfd-in2.h: Regenerate
	* libbfd.h: Regenerate.

Signed-off-by: Dimitar Dimitrov <dimitar@dinux.eu>
 2016-12-31 12:02:09 +10:30
Andrew Waterman
45f764234a Rework RISC-V relocations 
Before this commit we didn't cleanly support CFI directives because the
internal offsets used to get relaxed which broke them.  This patch
significantly reworks how we handle linker relaxations:

 * DWARF is now properly supported

 * There is a ".option norelax" to disable relaxations, for when users
   write assembly that can't be relaxed (if it's to be later patched up,
   for example).

 * There is an additional _RELAX relocation that specifies when previous
   relocations can be relaxed.

We're in the process of documenting the RISC-V ELF ABI, which will
include documentation of our relocations

  https://github.com/riscv/riscv-elf-psabi-doc/blob/master/riscv-elf.md

but we expect that this relocation set will remain ABI compatible in the
future (ie, it's safe to release).

Thanks to Kuan-Lin Chen for figuring out how to correctly relax the
debug info!

include/
	* elf/riscv.h: Add R_RISCV_TPREL_I through R_RISCV_SET32.
bfd/
	* reloc.c (BFD_RELOC_RISCV_TPREL_I): New relocation.
	(BFD_RELOC_RISCV_TPREL_S): Likewise.
	(BFD_RELOC_RISCV_RELAX): Likewise.
	(BFD_RELOC_RISCV_CFA): Likewise.
	(BFD_RELOC_RISCV_SUB6): Likewise.
	(BFD_RELOC_RISCV_SET8): Likewise.
	(BFD_RELOC_RISCV_SET8): Likewise.
	(BFD_RELOC_RISCV_SET16): Likewise.
	(BFD_RELOC_RISCV_SET32): Likewise.
	* elfnn-riscv.c (perform_relocation): Handle the new
	relocations.
	(_bfd_riscv_relax_tls_le): Likewise.
	(_bfd_riscv_relax_align): Likewise.
	(_bfd_riscv_relax_section): Likewise.
	(howto_table): Likewise.
	(riscv_reloc_map): Likewise.
	(relax_func_t): New type.
	(_bfd_riscv_relax_call): Add reserve_size argument, which
	controls the maximal offset pessimism.  Correct type of max_alignment.
	(_bfd_riscv_relax_lui): Likewise.
	(_bfd_riscv_relax_tls_le): Likewise.
	(_bfd_riscv_relax_align): Likewise.
	(_bfd_riscv_relax_section): Compute the required reserve size
	when relocating and use it to when calling relax_func.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Likewise.
gas/
	* config/tc-riscv.c (riscv_set_options): Add relax.
	(riscv_opts): Likewise.
	(s_riscv_option): Add relax and norelax.
	(riscv_apply_const_reloc): New function.
	(append_insn): Move constant relocation handling to
	riscv_apply_const_reloc.
	(md_pcrel_from): Likewise.
	(parse_relocation): Skip BFD_RELOC_UNUSED.
	(md_pcrel_from): Handle BFD_RELOC_RISCV_SUB6,
	BFD_RELOC_RISCV_RELAX, BFD_RELOC_RISCV_CFA.
	(md_apply_fix): Likewise.
	(riscv_pre_output_hook): New function.
	* config/tc-riscv.h (md_pre_output_hook): Define.
	(riscv_pre_output_hook): Declare.
	(DWARF_CIE_DATA_ALIGNMENT): Always -4.
 2016-12-20 12:26:33 +10:30
Maciej W. Rozycki
af955fe696 BFD: Fix double BFD_FAIL calls in `bfd_default_reloc_type_lookup' 
Break out of the outer switch statement once the inner switch for the
BFD_RELOC_CTOR relocation has been processed, preventing double BFD_FAIL
calls from being made, once from the inner switch and then again from
the default case of the outer switch.

Noticed with a `-Wimplicit-fallthrough' build error reported by a recent
GCC version:

In file included from .../bfd/reloc.c:52:0:
.../bfd/reloc.c: In function 'bfd_default_reloc_type_lookup':
.../bfd/libbfd.h:779:8: error: this statement may fall through [-Werror=implicit-fallthrough=]
   do { bfd_assert(__FILE__,__LINE__); } while (0)
        ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~
.../bfd/reloc.c:7780:4: note: in expansion of macro 'BFD_FAIL'
    BFD_FAIL ();
    ^~~~~~~~
.../bfd/reloc.c:7782:5: note: here
     default:
     ^~~~~~~
cc1: all warnings being treated as errors
make[4]: *** [reloc.lo] Error 1

	bfd/
	* reloc.c (bfd_default_reloc_type_lookup) <BFD_RELOC_CTOR>: Do
	not fall through to the default case.
 2016-11-01 22:57:56 +00:00
Nick Clifton
e23eba971d Add support for RISC-V architecture. 
bfd	* Makefile.am: Add entries for riscv32-elf and riscv64-elf.
	* config.bdf: Likewise.
	* configure.ac: Likewise.
	* Makefile.in: Regenerate.
	* configure: Regenerate.
	* archures.c: Add bfd_riscv_arch.
	* reloc.c: Add riscv relocs.
	* targets.c: Add riscv_elf32_vec and riscv_elf64_vec.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Regenerate.
	* elf-bfd.h: Add RISCV_ELF_DATA to enum elf_target_id.
	* elfnn-riscv.c: New file.
	* elfxx-riscv.c: New file.
	* elfxx-riscv.h: New file.

binutils* readelf.c (guess_is_rela): Add EM_RISCV.
	(get_machine_name): Likewise.
	(dump_relocations): Add support for riscv relocations.
	(get_machine_flags): Add support for riscv flags.
	(is_32bit_abs_reloc): Add R_RISCV_32.
	(is_64bit_abs_reloc): Add R_RISCV_64.
	(is_none_reloc): Add R_RISCV_NONE.
	* testsuite/binutils-all/objdump.exp (cpus_expected): Add riscv.
	Expect the debug_ranges test to fail.

gas	* Makefile.am: Add riscv files.
	* Makefile.in: Regenerate.
	* NEWS: Mention the support for this architecture.
	* configure.in: Define a default architecture.
	* configure: Regenerate.
	* configure.tgt: Add entries for riscv.
	* doc/as.texinfo: Likewise.
	* testsuite/gas/all/gas.exp: Expect the redef tests to fail.
	* testsuite/gas/elf/elf.exp: Expect the groupauto tests to fail.
	* config/tc-riscv.c: New file.
	* config/tc-riscv.h: New file.
	* doc/c-riscv.texi: New file.
	* testsuite/gas/riscv: New directory.
	* testsuite/gas/riscv/riscv.exp: New file.
	* testsuite/gas/riscv/t_insns.d: New file.
	* testsuite/gas/riscv/t_insns.s: New file.

ld	* Makefile.am: Add riscv files.
	* Makefile.in: Regenerate.
	* NEWS: Mention the support for this target.
	* configure.tgt: Add riscv entries.
	* emulparams/elf32lriscv-defs.sh: New file.
	* emulparams/elf32lriscv.sh: New file.
	* emulparams/elf64lriscv-defs.sh: New file.
	* emulparams/elf64lriscv.sh: New file.
	* emultempl/riscvelf.em: New file.

opcodes	* configure.ac: Add entry for bfd_riscv_arch.
	* configure: Regenerate.
	* disassemble.c (disassembler): Add support for riscv.
	(disassembler_usage): Likewise.
	* riscv-dis.c: New file.
	* riscv-opc.c: New file.

include	* dis-asm.h: Add prototypes for print_insn_riscv and
	print_riscv_disassembler_options.
	* elf/riscv.h: New file.
	* opcode/riscv-opc.h: New file.
	* opcode/riscv.h: New file.
 2016-11-01 16:45:57 +00:00
Nick Clifton
695344c018 Add c-format tags to translatable strings with more than one argument-using formatting token. 
* aout-adobe.c: Add missing c-format tags for translatable strings.
	* aout-cris.c: Likewise.
	* aoutx.h: Likewise.
	* bfd.c: Likewise.
	* binary.c: Likewise.
	* cache.c: Likewise.
	* coff-alpha.c: Likewise.
	* coff-arm.c: Likewise.
	* coff-i860.c: Likewise.
	* coff-mcore.c: Likewise.
	* coff-ppc.c: Likewise.
	* coff-rs6000.c: Likewise.
	* coff-sh.c: Likewise.
	* coff-tic4x.c: Likewise.
	* coff-tic54x.c: Likewise.
	* coff-tic80.c: Likewise.
	* coff64-rs6000.c: Likewise.
	* coffcode.h: Likewise.
	* coffgen.c: Likewise.
	* cofflink.c: Likewise.
	* coffswap.h: Likewise.
	* cpu-arm.c: Likewise.
	* dwarf2.c: Likewise.
	* ecoff.c: Likewise.
	* elf-attrs.c: Likewise.
	* elf-eh-frame.c: Likewise.
	* elf-ifunc.c: Likewise.
	* elf-m10300.c: Likewise.
	* elf-s390-common.c: Likewise.
	* elf.c: Likewise.
	* elf32-arc.c: Likewise.
	* elf32-arm.c: Likewise.
	* elf32-avr.c: Likewise.
	* elf32-bfin.c: Likewise.
	* elf32-cr16.c: Likewise.
	* elf32-cr16c.c: Likewise.
	* elf32-cris.c: Likewise.
	* elf32-crx.c: Likewise.
	* elf32-d10v.c: Likewise.
	* elf32-d30v.c: Likewise.
	* elf32-epiphany.c: Likewise.
	* elf32-fr30.c: Likewise.
	* elf32-frv.c: Likewise.
	* elf32-gen.c: Likewise.
	* elf32-hppa.c: Likewise.
	* elf32-i370.c: Likewise.
	* elf32-i386.c: Likewise.
	* elf32-i960.c: Likewise.
	* elf32-ip2k.c: Likewise.
	* elf32-iq2000.c: Likewise.
	* elf32-lm32.c: Likewise.
	* elf32-m32c.c: Likewise.
	* elf32-m32r.c: Likewise.
	* elf32-m68hc11.c: Likewise.
	* elf32-m68hc12.c: Likewise.
	* elf32-m68hc1x.c: Likewise.
	* elf32-m68k.c: Likewise.
	* elf32-mcore.c: Likewise.
	* elf32-mep.c: Likewise.
	* elf32-metag.c: Likewise.
	* elf32-microblaze.c: Likewise.
	* elf32-moxie.c: Likewise.
	* elf32-msp430.c: Likewise.
	* elf32-mt.c: Likewise.
	* elf32-nds32.c: Likewise.
	* elf32-nios2.c: Likewise.
	* elf32-or1k.c: Likewise.
	* elf32-pj.c: Likewise.
	* elf32-ppc.c: Likewise.
	* elf32-rl78.c: Likewise.
	* elf32-rx.c: Likewise.
	* elf32-s390.c: Likewise.
	* elf32-score.c: Likewise.
	* elf32-score7.c: Likewise.
	* elf32-sh-symbian.c: Likewise.
	* elf32-sh.c: Likewise.
	* elf32-sh64.c: Likewise.
	* elf32-spu.c: Likewise.
	* elf32-tic6x.c: Likewise.
	* elf32-tilepro.c: Likewise.
	* elf32-v850.c: Likewise.
	* elf32-vax.c: Likewise.
	* elf32-visium.c: Likewise.
	* elf32-xgate.c: Likewise.
	* elf32-xtensa.c: Likewise.
	* elf64-alpha.c: Likewise.
	* elf64-gen.c: Likewise.
	* elf64-hppa.c: Likewise.
	* elf64-ia64-vms.c: Likewise.
	* elf64-mmix.c: Likewise.
	* elf64-ppc.c: Likewise.
	* elf64-s390.c: Likewise.
	* elf64-sh64.c: Likewise.
	* elf64-sparc.c: Likewise.
	* elf64-x86-64.c: Likewise.
	* elfcode.h: Likewise.
	* elfcore.h: Likewise.
	* elflink.c: Likewise.
	* elfnn-aarch64.c: Likewise.
	* elfnn-ia64.c: Likewise.
	* elfxx-mips.c: Likewise.
	* elfxx-sparc.c: Likewise.
	* elfxx-tilegx.c: Likewise.
	* ieee.c: Likewise.
	* ihex.c: Likewise.
	* libbfd.c: Likewise.
	* linker.c: Likewise.
	* m68klinux.c: Likewise.
	* mach-o.c: Likewise.
	* merge.c: Likewise.
	* mmo.c: Likewise.
	* oasys.c: Likewise.
	* pdp11.c: Likewise.
	* pe-mips.c: Likewise.
	* peXXigen.c: Likewise.
	* pei-x86_64.c: Likewise.
	* peicode.h: Likewise.
	* ppcboot.c: Likewise.
	* reloc.c: Likewise.
	* sparclinux.c: Likewise.
	* srec.c: Likewise.
	* stabs.c: Likewise.
	* vms-alpha.c: Likewise.
	* vms-lib.c: Likewise.
	* xcofflink.c: Likewise.
 2016-10-19 14:37:21 +01:00
Alan Modra
2b80414579 -Wimplicit-fallthrough error fixes 
Well, not all are errors, but a little more substantive than just
fiddling with comments.

bfd/
	* coffcode.h (coff_slurp_symbol_table): Revert accidental commit
	made 2015-01-08.
	* elf32-nds32.c (nds32_elf_grok_psinfo): Add missing break.
	* reloc.c (bfd_default_reloc_type_lookup): Add missing breaks.
opcodes/
	* arc-ext.c (create_map): Add missing break.
	* msp430-decode.opc (encode_as): Likewise.
	* msp430-decode.c: Regenerate.
binutils/
	* coffdump.c (dump_coff_where): Add missing break.
	* stabs.c (stab_xcoff_builtin_type): Likewise.
gas/
	* config/tc-arc.c (find_opcode_match): Add missing break.
	* config/tc-i960.c (get_cdisp): Likewise.
	* config/tc-metag.c (parse_swap, md_apply_fix): Likewise.
	* config/tc-mt.c (md_parse_option): Likewise.
	* config/tc-nds32.c (nds32_apply_fix): Likewise.
	* config/tc-hppa.c (pa_ip): Assert rather than testing last
	condition of multiple if statements.
	* config/tc-s390.c (s390_exp_compare): Return 0 on error.
	* config/tc-tic4x.c (tic4x_operand_parse): Add as_bad and break
	out of case rather than falling into next case.  Formatting.
ld/
	* plugin.c (asymbol_from_plugin_symbol): Avoid compiler warning
	by adding return.
 2016-10-06 09:39:56 +10:30
Alan Modra
4eca02287c Remove syntactic sugar 
Now that _bfd_error_handler is not a function pointer.

	* aout-adobe.c: Replace (*_bfd_error_handler) (...) with
	_bfd_error_handler (...) throughout.
	* aout-cris.c, * aoutx.h, * archive.c, * bfd.c, * binary.c,
	* cache.c, * coff-alpha.c, * coff-arm.c, * coff-h8300.c,
	* coff-i860.c, * coff-mcore.c, * coff-ppc.c, * coff-rs6000.c,
	* coff-sh.c, * coff-tic4x.c, * coff-tic54x.c, * coff-tic80.c,
	* coff64-rs6000.c, * coffcode.h, * coffgen.c, * cofflink.c,
	* coffswap.h, * cpu-arm.c, * cpu-m68k.c, * cpu-sh.c, * dwarf2.c,
	* ecoff.c, * elf-eh-frame.c, * elf-m10300.c, * elf.c, * elf32-arc.c,
	* elf32-arm.c, * elf32-avr.c, * elf32-bfin.c, * elf32-cr16.c,
	* elf32-cris.c, * elf32-crx.c, * elf32-dlx.c, * elf32-frv.c,
	* elf32-hppa.c, * elf32-i370.c, * elf32-i386.c, * elf32-lm32.c,
	* elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc1x.c, * elf32-m68k.c,
	* elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c,
	* elf32-mips.c, * elf32-nds32.c, * elf32-nios2.c, * elf32-or1k.c,
	* elf32-pj.c, * elf32-ppc.c, * elf32-rl78.c, * elf32-s390.c,
	* elf32-score.c, * elf32-score7.c, * elf32-sh.c, * elf32-sh64.c,
	* elf32-sparc.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-tilepro.c,
	* elf32-v850.c, * elf32-vax.c, * elf32-xtensa.c, * elf64-alpha.c,
	* elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mips.c, * elf64-mmix.c,
	* elf64-ppc.c, * elf64-s390.c, * elf64-sh64.c, * elf64-sparc.c,
	* elf64-x86-64.c, * elfcode.h, * elfcore.h, * elflink.c,
	* elfn32-mips.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfxx-mips.c,
	* elfxx-sparc.c, * elfxx-tilegx.c, * hpux-core.c, * i386linux.c,
	* ieee.c, * ihex.c, * libbfd.c, * linker.c, * m68klinux.c,
	* mach-o.c, * merge.c, * mmo.c, * oasys.c, * osf-core.c, * pdp11.c,
	* pe-mips.c, * peXXigen.c, * pef.c, * plugin.c, * reloc.c,
	* rs6000-core.c, * sco5-core.c, * som.c, * sparclinux.c, * srec.c,
	* stabs.c, * syms.c, * vms-alpha.c, * vms-lib.c, * vms-misc.c,
	* xcofflink.c: Likewise.
 2016-09-30 15:17:44 +09:30
Cupertino Miranda
a87aa054a6 Fixes to legacy ARC relocations. 
Added support for ARC_SDA_12 reloc.
Fixed ARC_N32_ME.
Added ME (middle-endian) to ARC_SDA_12 reloc.

bfd/ChangeLog:

Cupertino Miranda  <cmiranda@synopsys.com>
	* reloc.c: Fixed type in ARC_SECTOFF relocations. Added ARC_SDA_12
	relocation.
	* bfd-in2.h: Regenerated from the previous changes.
	* libbfd.h: Regenerated from the previous changes.

include/ChangeLog:

Cupertino Miranda  <cmiranda@synopsys.com>
	* elf/arc-reloc.def: Fixed relocation formula for N*, SDA, SDA_12,
	SDA_16_LD*, S13_PCREL, N32_ME, SECTOFF_* relocations.
	* opcode/arc-func.h (replace_disp12s): Added. Used for SDA_12 relocation.
 2016-08-26 12:09:17 +02:00
Maciej W. Rozycki
0c11728627 BFD: Let targets handle relocations against absolute symbols 
Fix a generic BFD issue with relocations against absolute symbols, which
are installed without using any individual relocation handler provided
by the backend.  This causes any absolute section's addend to be lost on
REL targets such as o32 MIPS, and also relocation-specific calculation
adjustments are not made.

As an example assembling this program:

$ cat test.s
	.text
foo:
	b	bar
	b	baz

	.set	bar, 0x1234
$ as -EB -32 -o test-o32.o test.s
$ as -EB -n32 -o test-n32.o test.s

produces this binary code:

$ objdump -dr test-o32.o test-n32.o

test-o32.o:     file format elf32-tradbigmips

Disassembly of section .text:

00000000 <foo>:
   0:	10000000 	b	4 <foo+0x4>
			0: R_MIPS_PC16	*ABS*
   4:	00000000 	nop
   8:	1000ffff 	b	8 <foo+0x8>
			8: R_MIPS_PC16	baz
   c:	00000000 	nop

test-n32.o:     file format elf32-ntradbigmips

Disassembly of section .text:

00000000 <foo>:
   0:	10000000 	b	4 <foo+0x4>
			0: R_MIPS_PC16	*ABS*+0x1230
   4:	00000000 	nop
   8:	10000000 	b	c <foo+0xc>
			8: R_MIPS_PC16	baz-0x4
   c:	00000000 	nop
$

where it is clearly visible in `test-o32.o', which uses REL relocations,
that the absolute section's addend equivalent to the value of `bar' -- a
reference to which cannot be fully resolved at the assembly time,
because the reference is PC-relative -- has been lost, as has been the
relocation-specific adjustment of -4, required to take into account the
PC+4-relative calculation made by hardware with branches and seen in the
external symbol reference to `baz' as the `ffff' addend encoded in the
instruction word.  In `test-n32.o', which uses RELA relocations, the
absolute section's addend has been correctly retained.

Give precedence then in `bfd_perform_relocation' and
`bfd_install_relocation' to any individual relocation handler the
backend selected may have provided, while still resorting to the generic
calculation otherwise.  This retains the semantics which we've had since
forever or before the beginning of our repository history, and is at the
very least compatible with `bfd_elf_generic_reloc' being used as the
handler.

Retain the `bfd_is_und_section' check unchanged at the beginning of
`bfd_perform_relocation' since this does not affect the semantics of the
function.  The check returns the same `bfd_reloc_undefined' code the
check for a null `howto' does, so swapping the two does not matter.
Also the check is is mutually exclusive with the `bfd_is_abs_section'
check, since a section cannot be absolute and undefined both at once, so
swapping the two does not matter either.

With this change applied the program quoted above now has the in-place
addend correctly calculated and installed in the field being relocated:

$ objdump -dr fixed-o32.o

fixed-o32.o:     file format elf32-tradbigmips

Disassembly of section .text:

00000000 <foo>:
   0:	1000048c 	b	1234 <bar>
			0: R_MIPS_PC16	*ABS*
   4:	00000000 	nop
   8:	1000ffff 	b	8 <foo+0x8>
			8: R_MIPS_PC16	baz
   c:	00000000 	nop
$

Add a set of MIPS tests to cover the relevant cases, including absolute
symbols with addends, and verifying that PC-relative relocations against
symbols concerned resolve to the same value in the final link regardless
of whether the REL or the RELA relocation form is used.  Exclude linker
tests though which would overflow the in-place addend on REL targets and
use them as dump patterns for RELA targets only.

	bfd/
	* reloc.c (bfd_perform_relocation): Try the `howto' handler
	first with relocations against absolute symbols.
	(bfd_install_relocation): Likewise.

	gas/
	* testsuite/gas/mips/mips16-branch-absolute.d: Update patterns.
	* testsuite/gas/mips/branch-absolute.d: New test.
	* testsuite/gas/mips/branch-absolute-n32.d: New test.
	* testsuite/gas/mips/branch-absolute-n64.d: New test.
	* testsuite/gas/mips/branch-absolute-addend-n32.d: New test.
	* testsuite/gas/mips/branch-absolute-addend-n64.d: New test.
	* testsuite/gas/mips/mips16-branch-absolute-n32.d: New test.
	* testsuite/gas/mips/mips16-branch-absolute-n64.d: New test.
	* testsuite/gas/mips/mips16-branch-absolute-addend-n32.d: New
	test.
	* testsuite/gas/mips/mips16-branch-absolute-addend-n64.d: New
	test.
	* testsuite/gas/mips/micromips-branch-absolute.d: New test.
	* testsuite/gas/mips/micromips-branch-absolute-n32.d: New test.
	* testsuite/gas/mips/micromips-branch-absolute-n64.d: New test.
	* testsuite/gas/mips/micromips-branch-absolute-addend-n32.d: New
	test.
	* testsuite/gas/mips/micromips-branch-absolute-addend-n64.d: New
	test.
	* testsuite/gas/mips/branch-absolute.s: New test source.
	* testsuite/gas/mips/branch-absolute-addend.s: New test source.
	* testsuite/gas/mips/mips16-branch-absolute-addend.s: New test
	source.
	* testsuite/gas/mips/micromips-branch-absolute.s: New test
	source.
	* testsuite/gas/mips/micromips-branch-absolute-addend.s: New
	test source.
	* testsuite/gas/mips/mips.exp: Run the new tests.

	ld/
	* testsuite/ld-mips-elf/branch-absolute.d: New test.
	* testsuite/ld-mips-elf/branch-absolute-n32.d: New test.
	* testsuite/ld-mips-elf/branch-absolute-n64.d: New test.
	* testsuite/ld-mips-elf/branch-absolute-addend.d: New test.
	* testsuite/ld-mips-elf/branch-absolute-addend-n32.d: New test.
	* testsuite/ld-mips-elf/branch-absolute-addend-n64.d: New test.
	* testsuite/ld-mips-elf/micromips-branch-absolute.d: New test.
	* testsuite/ld-mips-elf/micromips-branch-absolute-n32.d: New
	test.
	* testsuite/ld-mips-elf/micromips-branch-absolute-n64.d: New
	test.
	* testsuite/ld-mips-elf/micromips-branch-absolute-addend.d: New
	test.
	* testsuite/ld-mips-elf/micromips-branch-absolute-addend-n32.d:
	New test.
	* testsuite/ld-mips-elf/micromips-branch-absolute-addend-n64.d:
	New test.
	* testsuite/ld-mips-elf/mips-elf.exp: Run the new tests, except
	from `branch-absolute-addend' and
	`micromips-branch-absolute-addend', referred indirectly only.
 2016-07-14 20:06:37 +01:00
Maciej W. Rozycki
c9775dde32 MIPS16: Add R_MIPS16_PC16_S1 branch relocation support 
For R_MIPS16_PC16_S1 the calculation is `(sign_extend(A) + S - P) >> 1'
and the usual MIPS16 bit shuffling applies to relocated field handling,
as per the encoding of the branch target in the extended form of the
MIPS16 B, BEQZ, BNEZ, BTEQZ and BTNEZ instructions.

	include/
	* elf/mips.h (R_MIPS16_PC16_S1): New relocation.

	bfd/
	* elf32-mips.c (elf_mips16_howto_table_rel): Add
	R_MIPS16_PC16_S1.
	(mips16_reloc_map): Likewise.
	* elf64-mips.c (mips16_elf64_howto_table_rel): Likewise.
	(mips16_elf64_howto_table_rela): Likewise.
	(mips16_reloc_map): Likewise.
	* elfn32-mips.c (elf_mips16_howto_table_rel): Likewise.
	(elf_mips16_howto_table_rela): Likewise.
	(mips16_reloc_map): Likewise.
	* elfxx-mips.c (mips16_branch_reloc_p): New function.
	(mips16_reloc_p): Handle R_MIPS16_PC16_S1.
	(b_reloc_p): Likewise.
	(mips_elf_calculate_relocation): Likewise.
	(_bfd_mips_elf_check_relocs): Likewise.
	* reloc.c (BFD_RELOC_MIPS16_16_PCREL_S1): New relocation.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Regenerate.

	gas/
	* config/tc-mips.c (mips16_reloc_p): Handle
	BFD_RELOC_MIPS16_16_PCREL_S1.
	(b_reloc_p): Likewise.
	(limited_pcrel_reloc_p): Likewise.
	(md_pcrel_from): Likewise.
	(md_apply_fix): Likewise.
	(tc_gen_reloc): Likewise.
	(md_convert_frag): Likewise.
	(mips_fix_adjustable): Update comment.
	* testsuite/gas/mips/mips16-branch-reloc-2.d: Remove error
	output, add dump patterns.
	* testsuite/gas/mips/mips16-branch-reloc-3.d: Remove error
	output, add dump patterns.
	* testsuite/gas/mips/mips16-branch-addend-2.d: Remove error
	output, add dump patterns.
	* testsuite/gas/mips/mips16-branch-addend-3.d: Remove error
	output, add dump patterns.
	* testsuite/gas/mips/mips16-branch-absolute.d: Remove error
	output, add dump patterns.
	* testsuite/gas/mips/mips16-branch-reloc-2.l: Remove file.
	* testsuite/gas/mips/mips16-branch-reloc-3.l: Remove file.
	* testsuite/gas/mips/mips16-branch-addend-2.l: Remove file.
	* testsuite/gas/mips/mips16-branch-addend-3.l: Remove file.
	* testsuite/gas/mips/mips16-branch-absolute.l: Remove file.
	* testsuite/gas/mips/mips16-branch-addend-2.s: Add padding.
	* testsuite/gas/mips/branch-weak.s: Adjust alignment, avoid
	implicit instruction padding, avoid MIPS16 JR->JRC conversion.
	* testsuite/gas/mips/branch-weak-6.d: New test.
	* testsuite/gas/mips/branch-weak-7.d: New test.
	* testsuite/gas/mips/mips.exp: Run the new tests.

	ld/
	* testsuite/ld-mips-elf/mips16-branch-2.d: New test.
	* testsuite/ld-mips-elf/mips16-branch-3.d: New test.
	* testsuite/ld-mips-elf/mips16-branch-addend-2.d: New test.
	* testsuite/ld-mips-elf/mips16-branch-addend-3.d: New test.
	* testsuite/ld-mips-elf/mips16-branch.s: New test source.
	* testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
 2016-06-28 01:29:56 +01:00
Alan Modra
1a72702bb3 Return void from linker callbacks 
The ldmain.c implementation of these linker callback functions always
return true, so any code handling a false return is dead.  What's
more, some of the bfd backends abort if ever a false return is seen,
and there seems to be some confusion in gdb's compile-object-load.c.
The return value was never meant to be "oh yes, a multiple_definition
error occurred", but rather "out of memory or other catastrophic
failure".

This patch removes the status return on the callbacks that always
return true.  I kept the return status for "notice" because that one
does happen to need to return "out of memory".

include/
	* bfdlink.h (struct bfd_link_callbacks): Update comments.
	Return void from multiple_definition, multiple_common,
	add_to_set, constructor, warning, undefined_symbol,
	reloc_overflow, reloc_dangerous and unattached_reloc.
bfd/
	* aoutx.h: Adjust linker callback calls throughout file,
	removing dead code.
	* bout.c: Likewise.
	* coff-alpha.c: Likewise.
	* coff-arm.c: Likewise.
	* coff-h8300.c: Likewise.
	* coff-h8500.c: Likewise.
	* coff-i960.c: Likewise.
	* coff-mcore.c: Likewise.
	* coff-mips.c: Likewise.
	* coff-ppc.c: Likewise.
	* coff-rs6000.c: Likewise.
	* coff-sh.c: Likewise.
	* coff-tic80.c: Likewise.
	* coff-w65.c: Likewise.
	* coff-z80.c: Likewise.
	* coff-z8k.c: Likewise.
	* coff64-rs6000.c: Likewise.
	* cofflink.c: Likewise.
	* ecoff.c: Likewise.
	* elf-bfd.h: Likewise.
	* elf-m10200.c: Likewise.
	* elf-m10300.c: Likewise.
	* elf32-arc.c: Likewise.
	* elf32-arm.c: Likewise.
	* elf32-avr.c: Likewise.
	* elf32-bfin.c: Likewise.
	* elf32-cr16.c: Likewise.
	* elf32-cr16c.c: Likewise.
	* elf32-cris.c: Likewise.
	* elf32-crx.c: Likewise.
	* elf32-d10v.c: Likewise.
	* elf32-epiphany.c: Likewise.
	* elf32-fr30.c: Likewise.
	* elf32-frv.c: Likewise.
	* elf32-ft32.c: Likewise.
	* elf32-h8300.c: Likewise.
	* elf32-hppa.c: Likewise.
	* elf32-i370.c: Likewise.
	* elf32-i386.c: Likewise.
	* elf32-i860.c: Likewise.
	* elf32-ip2k.c: Likewise.
	* elf32-iq2000.c: Likewise.
	* elf32-lm32.c: Likewise.
	* elf32-m32c.c: Likewise.
	* elf32-m32r.c: Likewise.
	* elf32-m68hc1x.c: Likewise.
	* elf32-m68k.c: Likewise.
	* elf32-mep.c: Likewise.
	* elf32-metag.c: Likewise.
	* elf32-microblaze.c: Likewise.
	* elf32-moxie.c: Likewise.
	* elf32-msp430.c: Likewise.
	* elf32-mt.c: Likewise.
	* elf32-nds32.c: Likewise.
	* elf32-nios2.c: Likewise.
	* elf32-or1k.c: Likewise.
	* elf32-ppc.c: Likewise.
	* elf32-s390.c: Likewise.
	* elf32-score.c: Likewise.
	* elf32-score7.c: Likewise.
	* elf32-sh.c: Likewise.
	* elf32-sh64.c: Likewise.
	* elf32-spu.c: Likewise.
	* elf32-tic6x.c: Likewise.
	* elf32-tilepro.c: Likewise.
	* elf32-v850.c: Likewise.
	* elf32-vax.c: Likewise.
	* elf32-visium.c: Likewise.
	* elf32-xstormy16.c: Likewise.
	* elf32-xtensa.c: Likewise.
	* elf64-alpha.c: Likewise.
	* elf64-hppa.c: Likewise.
	* elf64-ia64-vms.c: Likewise.
	* elf64-mmix.c: Likewise.
	* elf64-ppc.c: Likewise.
	* elf64-s390.c: Likewise.
	* elf64-sh64.c: Likewise.
	* elf64-x86-64.c: Likewise.
	* elflink.c: Likewise.
	* elfnn-aarch64.c: Likewise.
	* elfnn-ia64.c: Likewise.
	* elfxx-mips.c: Likewise.
	* elfxx-sparc.c: Likewise.
	* elfxx-tilegx.c: Likewise.
	* linker.c: Likewise.
	* pdp11.c: Likewise.
	* pe-mips.c: Likewise.
	* reloc.c: Likewise.
	* reloc16.c: Likewise.
	* simple.c: Likewise.
	* vms-alpha.c: Likewise.
	* xcofflink.c: Likewise.
	* elf32-rl78.c (get_symbol_value, get_romstart, get_ramstart): Delete
	status param.  Adjust calls to these and linker callbacks throughout.
	* elf32-rx.c: (get_symbol_value, get_gp, get_romstart,
	get_ramstart): Delete status param.  Adjust calls to these and
	linker callbacks throughout.
ld/
	* ldmain.c (multiple_definition, multiple_common, add_to_set,
	constructor_callback, warning_callback, undefined_symbol,
	reloc_overflow, reloc_dangerous, unattached_reloc): Return void.
	* emultempl/elf32.em: Adjust callback calls.
gdb/
	* compile/compile-object-load.c (link_callbacks_multiple_definition,
	link_callbacks_warning, link_callbacks_undefined_symbol,
	link_callbacks_undefined_symbol, link_callbacks_reloc_overflow,
	link_callbacks_reloc_dangerous,
	link_callbacks_unattached_reloc): Return void.
 2016-05-28 11:17:20 +09:30
Jim Wilson
b7f28d873c Enable R_AARCH64_NONE for 64-bit code. 
* elfnn-aarch64.c: Unconditionally enable R_AARCH64_NULL and
	R_AARCH64_NONE.  Use HOWTO64 for R_AARCH64_NULL.
	* relocs.c: Add BFD_RELOC_AARCH64_NULL.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Likewise.
 2016-05-23 16:38:21 -07:00
Andrew Burgess
4b0c052e45 arc/nps400 : New cmem instructions and associated relocation 
Add support for arc/nps400 cmem instructions, these load and store
instructions are hard-wired to access "0x57f00000 + 16-bit-offset".

Supporting this relocation required some additions to the arc relocation
handling in the bfd library, as well as the standard changes required to
add a new relocation type.

There's a test of the new instructions in the assembler, and a test of
the relocation in the linker.

bfd/ChangeLog:

	* reloc.c: Add BFD_RELOC_ARC_NPS_CMEM16 entry.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Regenerate.
	* elf32-arc.c: Add 'opcode/arc.h' include.
	(struct arc_relocation_data): Add symbol_name.
	(arc_special_overflow_checks): New function.
	(arc_do_relocation): Use arc_special_overflow_checks, reindent as
	required, add an extra comment.
	(elf_arc_relocate_section): Setup symbol_name in reloc_data.

gas/ChangeLog:

	* testsuite/gas/arc/nps400-3.d: New file.
	* testsuite/gas/arc/nps400-3.s: New file.

include/ChangeLog:

	* elf/arc-reloc.def: Add ARC_NPS_CMEM16 reloc.
	* opcode/arc.h (NPS_CMEM_HIGH_VALUE): Define.

ld/ChangeLog:

	* testsuite/ld-arc/arc.exp: New file.
	* testsuite/ld-arc/nps-1.s: New file.
	* testsuite/ld-arc/nps-1a.d: New file.
	* testsuite/ld-arc/nps-1b.d: New file.
	* testsuite/ld-arc/nps-1b.err: New file.

opcodes/ChangeLog:

	* arc-nps400-tbl.h: Add xldb, xldw, xld, xstb, xstw, and xst
	instructions.
	* arc-opc.c (insert_nps_cmem_uimm16): New function.
	(extract_nps_cmem_uimm16): New function.
	(arc_operands): Add NPS_XLDST_UIMM16 operand.
 2016-04-14 17:16:46 +01:00
Dan Gissel
37b01f6a13 Fix some places where octet to byte conversions are needed. 
PR 19713
	* elf.c (_bfd_elf_section_offset): Ensure that the returned offset
	uses bytes not octets.
	* elflink.c (resolve_section): Likewise.
	Add a bfd parameter.
	(eval_section): Pass the input_bfd to resolve_section.
	(bfd_elf_perform_complex_relocation): Convert byte offset to
	octets before read and writing values.
	(elf_link_input_bfd): Add byte to octet conversions.
	(elf_reloc_link_order): Likewise.
	(elf_fixup_link_order): Likewise.
	(bfd_elf_final_link): Likewise.
	* reloc.c (_bfd_final_link_relocate): Likewise.
	* syms.c (_bfd_stab_section_find_nearest_line): Likewise.
 2016-03-11 09:17:28 +00:00
Nick Clifton
737684142b Fix a seg-fault in the linker when it encounters a corrupt binary containing a reloc with no associated symbol. 
PR ld/19628
	* reloc.c (bfd_generic_get_relocated_section_contents): Stop
	processing if we encounter a reloc without an associated symbol.
 2016-02-19 15:20:30 +00:00
Alan Modra
6f2750feaf Copyright update for binutils 2016-01-01 23:00:01 +10:30
Mickael Guene
72d98d16ed [ARM] Add support for thumb1 pcrop relocations. 
To support thumb1 execute-only code we need to support four new
relocations (R_ARM_THM_ALU_ABS_G0_NC, R_ARM_THM_ALU_ABS_G1_NC,
R_ARM_THM_ALU_ABS_G2_NC and  R_ARM_THM_ALU_ABS_G3_NC).
These relocations allow the static linker to finalize construction
of symbol address.
Typical sequence of code to get address of the symbol foo is then
the following :
	movs	r3, #:upper8_15:#foo
	lsls	r3, #8
	adds	r3, #:upper0_7:#foo
	lsls	r3, #8
	adds	r3, #:lower8_15:#foo
	lsls	r3, #8
	adds	r3, #:lower0_7:#foo
This will give following sequence of text and relocations after
assembly :
   4:	2300      	movs	r3, #0
			4: R_ARM_THM_ALU_ABS_G3_NC	foo
   6:	021b      	lsls	r3, r3, #8
   8:	3300      	adds	r3, #0
			8: R_ARM_THM_ALU_ABS_G2_NC	foo
   a:	021b      	lsls	r3, r3, #8
   c:	3300      	adds	r3, #0
			c: R_ARM_THM_ALU_ABS_G1_NC	foo
   e:	021b      	lsls	r3, r3, #8
  10:	3300      	adds	r3, #0
			10: R_ARM_THM_ALU_ABS_G0_NC	foo
 2015-12-16 10:19:51 +01:00