Ptrace support for Aarch64 SVE
Add support for reading and writing registers for Aarch64 SVE. We need to support the cases where the kernel only gives us a fpsimd structure. This occurs when there is no active SVE state in the kernel (for example, after starting a new process). Added checks to make sure the vector length has not changed whilst the process is running. gdb/ * aarch64-linux-nat.c (fetch_sveregs_from_thread): New function. (store_sveregs_to_thread): Likewise. (aarch64_linux_fetch_inferior_registers): Check for SVE. (aarch64_linux_store_inferior_registers): Likewise. * nat/aarch64-sve-linux-ptrace.c (aarch64_sve_get_sveregs): New function. (aarch64_sve_regs_copy_to_regcache): Likewise. (aarch64_sve_regs_copy_from_regcache): Likewise. * nat/aarch64-sve-linux-ptrace.h (aarch64_sve_get_sveregs): New declaration. (aarch64_sve_regs_copy_to_regcache): Likewise. (aarch64_sve_regs_copy_from_regcache): Likewise. (sve_context): Structure from Linux headers. (SVE_SIG_ZREGS_SIZE): Define from Linux headers. (SVE_SIG_ZREG_SIZE): Likewise. (SVE_SIG_PREG_SIZE): Likewise. (SVE_SIG_FFR_SIZE): Likewise. (SVE_SIG_REGS_OFFSET): Likewise. (SVE_SIG_ZREGS_OFFSET): Likewise. (SVE_SIG_ZREG_OFFSET): Likewise. (SVE_SIG_ZREGS_SIZE): Likewise. (SVE_SIG_PREGS_OFFSET): Likewise. (SVE_SIG_PREG_OFFSET): Likewise. (SVE_SIG_PREGS_SIZE): Likewise. (SVE_SIG_FFR_OFFSET): Likewise. (SVE_SIG_REGS_SIZE): Likewise. (SVE_SIG_CONTEXT_SIZE): Likewise. (SVE_PT_REGS_MASK): Likewise. (SVE_PT_REGS_FPSIMD): Likewise. (SVE_PT_REGS_SVE): Likewise. (SVE_PT_VL_INHERIT): Likewise. (SVE_PT_VL_ONEXEC): Likewise. (SVE_PT_REGS_OFFSET): Likewise. (SVE_PT_FPSIMD_OFFSET): Likewise. (SVE_PT_FPSIMD_SIZE): Likewise. (SVE_PT_SVE_ZREG_SIZE): Likewise. (SVE_PT_SVE_PREG_SIZE): Likewise. (SVE_PT_SVE_FFR_SIZE): Likewise. (SVE_PT_SVE_FPSR_SIZE): Likewise. (SVE_PT_SVE_FPCR_SIZE): Likewise. (__SVE_SIG_TO_PT): Likewise. (SVE_PT_SVE_OFFSET): Likewise. (SVE_PT_SVE_ZREGS_OFFSET): Likewise. (SVE_PT_SVE_ZREG_OFFSET): Likewise. (SVE_PT_SVE_ZREGS_SIZE): Likewise. (SVE_PT_SVE_PREGS_OFFSET): Likewise. (SVE_PT_SVE_PREG_OFFSET): Likewise. (SVE_PT_SVE_PREGS_SIZE): Likewise. (SVE_PT_SVE_FFR_OFFSET): Likewise. (SVE_PT_SVE_FPSR_OFFSET): Likewise. (SVE_PT_SVE_FPCR_OFFSET): Likewise. (SVE_PT_SVE_SIZE): Likewise. (SVE_PT_SIZE): Likewise. (HAS_SVE_STATE): New define. gdbserver/ * Makefile.in: Add aarch64-sve-linux-ptrace.c.
This commit is contained in:
Alan Hayward
parent
17a1cc89b5
commit
e9902bfc28
@ -1,3 +1,60 @@
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2018-06-18 Alan Hayward <alan.hayward@arm.com>
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* aarch64-linux-nat.c (fetch_sveregs_from_thread): New function.
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(store_sveregs_to_thread): Likewise.
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(aarch64_linux_fetch_inferior_registers): Check for SVE.
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(aarch64_linux_store_inferior_registers): Likewise.
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* nat/aarch64-sve-linux-ptrace.c (aarch64_sve_get_sveregs): New
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function.
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(aarch64_sve_regs_copy_to_regcache): Likewise.
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(aarch64_sve_regs_copy_from_regcache): Likewise.
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* nat/aarch64-sve-linux-ptrace.h (aarch64_sve_get_sveregs): New
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declaration.
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(aarch64_sve_regs_copy_to_regcache): Likewise.
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(aarch64_sve_regs_copy_from_regcache): Likewise.
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(sve_context): Structure from Linux headers.
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(SVE_SIG_ZREGS_SIZE): Define from Linux headers.
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(SVE_SIG_ZREG_SIZE): Likewise.
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(SVE_SIG_PREG_SIZE): Likewise.
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(SVE_SIG_FFR_SIZE): Likewise.
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(SVE_SIG_REGS_OFFSET): Likewise.
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(SVE_SIG_ZREGS_OFFSET): Likewise.
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(SVE_SIG_ZREG_OFFSET): Likewise.
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(SVE_SIG_ZREGS_SIZE): Likewise.
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(SVE_SIG_PREGS_OFFSET): Likewise.
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(SVE_SIG_PREG_OFFSET): Likewise.
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(SVE_SIG_PREGS_SIZE): Likewise.
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(SVE_SIG_FFR_OFFSET): Likewise.
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(SVE_SIG_REGS_SIZE): Likewise.
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(SVE_SIG_CONTEXT_SIZE): Likewise.
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(SVE_PT_REGS_MASK): Likewise.
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(SVE_PT_REGS_FPSIMD): Likewise.
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(SVE_PT_REGS_SVE): Likewise.
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(SVE_PT_VL_INHERIT): Likewise.
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(SVE_PT_VL_ONEXEC): Likewise.
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(SVE_PT_REGS_OFFSET): Likewise.
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(SVE_PT_FPSIMD_OFFSET): Likewise.
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(SVE_PT_FPSIMD_SIZE): Likewise.
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(SVE_PT_SVE_ZREG_SIZE): Likewise.
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(SVE_PT_SVE_PREG_SIZE): Likewise.
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(SVE_PT_SVE_FFR_SIZE): Likewise.
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(SVE_PT_SVE_FPSR_SIZE): Likewise.
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(SVE_PT_SVE_FPCR_SIZE): Likewise.
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(__SVE_SIG_TO_PT): Likewise.
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(SVE_PT_SVE_OFFSET): Likewise.
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(SVE_PT_SVE_ZREGS_OFFSET): Likewise.
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(SVE_PT_SVE_ZREG_OFFSET): Likewise.
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(SVE_PT_SVE_ZREGS_SIZE): Likewise.
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(SVE_PT_SVE_PREGS_OFFSET): Likewise.
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(SVE_PT_SVE_PREG_OFFSET): Likewise.
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(SVE_PT_SVE_PREGS_SIZE): Likewise.
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(SVE_PT_SVE_FFR_OFFSET): Likewise.
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(SVE_PT_SVE_FPSR_OFFSET): Likewise.
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(SVE_PT_SVE_FPCR_OFFSET): Likewise.
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(SVE_PT_SVE_SIZE): Likewise.
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(SVE_PT_SIZE): Likewise.
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(HAS_SVE_STATE): New define.
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2018-06-18 Alan Hayward <alan.hayward@arm.com>
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* nat/aarch64-sve-linux-sigcontext.h: New file.
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@ -384,19 +384,62 @@ store_fpregs_to_thread (const struct regcache *regcache)
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}
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}
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/* Fill GDB's register array with the sve register values
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from the current thread. */
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static void
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fetch_sveregs_from_thread (struct regcache *regcache)
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{
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std::unique_ptr<gdb_byte[]> base
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= aarch64_sve_get_sveregs (ptid_get_lwp (regcache->ptid ()));
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aarch64_sve_regs_copy_to_reg_buf (regcache, base.get ());
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}
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/* Store to the current thread the valid sve register
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values in the GDB's register array. */
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static void
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store_sveregs_to_thread (struct regcache *regcache)
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{
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int ret;
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struct iovec iovec;
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int tid = ptid_get_lwp (regcache->ptid ());
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/* Obtain a dump of SVE registers from ptrace. */
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std::unique_ptr<gdb_byte[]> base = aarch64_sve_get_sveregs (tid);
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/* Overwrite with regcache state. */
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aarch64_sve_regs_copy_from_reg_buf (regcache, base.get ());
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/* Write back to the kernel. */
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iovec.iov_base = base.get ();
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iovec.iov_len = ((struct user_sve_header *) base.get ())->size;
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ret = ptrace (PTRACE_SETREGSET, tid, NT_ARM_SVE, &iovec);
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if (ret < 0)
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perror_with_name (_("Unable to store sve registers"));
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}
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/* Implement the "fetch_registers" target_ops method. */
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void
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aarch64_linux_nat_target::fetch_registers (struct regcache *regcache,
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int regno)
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{
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struct gdbarch_tdep *tdep = gdbarch_tdep (regcache->arch ());
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if (regno == -1)
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{
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fetch_gregs_from_thread (regcache);
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fetch_fpregs_from_thread (regcache);
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if (tdep->has_sve ())
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fetch_sveregs_from_thread (regcache);
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else
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fetch_fpregs_from_thread (regcache);
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}
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else if (regno < AARCH64_V0_REGNUM)
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fetch_gregs_from_thread (regcache);
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else if (tdep->has_sve ())
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fetch_sveregs_from_thread (regcache);
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else
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fetch_fpregs_from_thread (regcache);
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}
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@ -407,13 +450,20 @@ void
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aarch64_linux_nat_target::store_registers (struct regcache *regcache,
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int regno)
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{
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struct gdbarch_tdep *tdep = gdbarch_tdep (regcache->arch ());
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if (regno == -1)
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{
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store_gregs_to_thread (regcache);
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store_fpregs_to_thread (regcache);
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if (tdep->has_sve ())
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store_sveregs_to_thread (regcache);
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else
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store_fpregs_to_thread (regcache);
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}
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else if (regno < AARCH64_V0_REGNUM)
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store_gregs_to_thread (regcache);
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else if (tdep->has_sve ())
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store_sveregs_to_thread (regcache);
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else
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store_fpregs_to_thread (regcache);
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}
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@ -1,3 +1,7 @@
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2018-06-18 Alan Hayward <alan.hayward@arm.com>
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* Makefile.in: Add aarch64-sve-linux-ptrace.c.
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2018-06-11 Alan Hayward <alan.hayward@arm.com>
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* linux-aarch64-ipa.c (get_ipa_tdesc): Add null VQ param.
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@ -219,6 +219,7 @@ SFILES = \
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$(srcdir)/common/tdesc.c \
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$(srcdir)/common/vec.c \
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$(srcdir)/common/xml-utils.c \
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$(srcdir)/nat/aarch64-sve-linux-ptrace.c \
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$(srcdir)/nat/linux-btrace.c \
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$(srcdir)/nat/linux-namespaces.c \
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$(srcdir)/nat/linux-osdata.c \
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@ -24,6 +24,10 @@
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#include "elf/common.h"
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#include "aarch64-sve-linux-ptrace.h"
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#include "arch/aarch64.h"
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#include "common-regcache.h"
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#include "common/byte-vector.h"
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static bool vq_change_warned = false;
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/* See nat/aarch64-sve-linux-ptrace.h. */
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@ -46,7 +50,7 @@ aarch64_sve_get_vq (int tid)
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return 0;
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}
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long vq = sve_vq_from_vl (header.vl);
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uint64_t vq = sve_vq_from_vl (header.vl);
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if (!sve_vl_valid (header.vl))
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{
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@ -56,3 +60,266 @@ aarch64_sve_get_vq (int tid)
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return vq;
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}
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/* See nat/aarch64-sve-linux-ptrace.h. */
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std::unique_ptr<gdb_byte[]>
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aarch64_sve_get_sveregs (int tid)
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{
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struct iovec iovec;
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struct user_sve_header header;
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uint64_t vq = aarch64_sve_get_vq (tid);
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if (vq == 0)
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perror_with_name (_("Unable to fetch SVE register header"));
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/* A ptrace call with NT_ARM_SVE will return a header followed by either a
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dump of all the SVE and FP registers, or an fpsimd structure (identical to
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the one returned by NT_FPREGSET) if the kernel has not yet executed any
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SVE code. Make sure we allocate enough space for a full SVE dump. */
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iovec.iov_len = SVE_PT_SIZE (vq, SVE_PT_REGS_SVE);
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std::unique_ptr<gdb_byte[]> buf (new gdb_byte[iovec.iov_len]);
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iovec.iov_base = buf.get ();
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if (ptrace (PTRACE_GETREGSET, tid, NT_ARM_SVE, &iovec) < 0)
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perror_with_name (_("Unable to fetch SVE registers"));
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return buf;
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}
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/* See nat/aarch64-sve-linux-ptrace.h. */
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void
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aarch64_sve_regs_copy_to_reg_buf (struct reg_buffer_common *reg_buf,
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const void *buf)
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{
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char *base = (char *) buf;
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struct user_sve_header *header = (struct user_sve_header *) buf;
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uint64_t vq, vg_reg_buf = 0;
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vq = sve_vq_from_vl (header->vl);
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/* Sanity check the data in the header. */
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if (!sve_vl_valid (header->vl)
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|| SVE_PT_SIZE (vq, header->flags) != header->size)
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error (_("Invalid SVE header from kernel."));
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if (REG_VALID == reg_buf->get_register_status (AARCH64_SVE_VG_REGNUM))
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reg_buf->raw_collect (AARCH64_SVE_VG_REGNUM, &vg_reg_buf);
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if (vg_reg_buf == 0)
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{
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/* VG has not been set. */
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vg_reg_buf = sve_vg_from_vl (header->vl);
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reg_buf->raw_supply (AARCH64_SVE_VG_REGNUM, &vg_reg_buf);
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}
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else if (vg_reg_buf != sve_vg_from_vl (header->vl) && !vq_change_warned)
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{
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/* Vector length on the running process has changed. GDB currently does
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not support this and will result in GDB showing incorrect partially
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incorrect data for the vector registers. Warn once and continue. We
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do not expect many programs to exhibit this behaviour. To fix this
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we need to spot the change earlier and generate a new target
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descriptor. */
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warning (_("SVE Vector length has changed (%ld to %d). "
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"Vector registers may show incorrect data."),
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vg_reg_buf, sve_vg_from_vl (header->vl));
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vq_change_warned = true;
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}
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if (HAS_SVE_STATE (*header))
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{
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/* The register dump contains a set of SVE registers. */
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for (int i = 0; i < AARCH64_SVE_Z_REGS_NUM; i++)
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reg_buf->raw_supply (AARCH64_SVE_Z0_REGNUM + i,
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base + SVE_PT_SVE_ZREG_OFFSET (vq, i));
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for (int i = 0; i < AARCH64_SVE_P_REGS_NUM; i++)
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reg_buf->raw_supply (AARCH64_SVE_P0_REGNUM + i,
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base + SVE_PT_SVE_PREG_OFFSET (vq, i));
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reg_buf->raw_supply (AARCH64_SVE_FFR_REGNUM,
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base + SVE_PT_SVE_FFR_OFFSET (vq));
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reg_buf->raw_supply (AARCH64_FPSR_REGNUM,
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base + SVE_PT_SVE_FPSR_OFFSET (vq));
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reg_buf->raw_supply (AARCH64_FPCR_REGNUM,
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base + SVE_PT_SVE_FPCR_OFFSET (vq));
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}
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else
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{
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/* There is no SVE state yet - the register dump contains a fpsimd
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structure instead. These registers still exist in the hardware, but
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the kernel has not yet initialised them, and so they will be null. */
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char *zero_reg = (char *) alloca (SVE_PT_SVE_ZREG_SIZE (vq));
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struct user_fpsimd_state *fpsimd
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= (struct user_fpsimd_state *)(base + SVE_PT_FPSIMD_OFFSET);
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/* Copy across the V registers from fpsimd structure to the Z registers,
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ensuring the non overlapping state is set to null. */
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memset (zero_reg, 0, SVE_PT_SVE_ZREG_SIZE (vq));
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for (int i = 0; i < AARCH64_SVE_Z_REGS_NUM; i++)
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{
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memcpy (zero_reg, &fpsimd->vregs[i], sizeof (__int128_t));
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reg_buf->raw_supply (AARCH64_SVE_Z0_REGNUM + i, zero_reg);
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}
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reg_buf->raw_supply (AARCH64_FPSR_REGNUM, &fpsimd->fpsr);
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reg_buf->raw_supply (AARCH64_FPCR_REGNUM, &fpsimd->fpcr);
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/* Clear the SVE only registers. */
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for (int i = 0; i < AARCH64_SVE_P_REGS_NUM; i++)
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reg_buf->raw_supply (AARCH64_SVE_P0_REGNUM + i, zero_reg);
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reg_buf->raw_supply (AARCH64_SVE_FFR_REGNUM, zero_reg);
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}
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}
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/* See nat/aarch64-sve-linux-ptrace.h. */
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void
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aarch64_sve_regs_copy_from_reg_buf (const struct reg_buffer_common *reg_buf,
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void *buf)
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{
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struct user_sve_header *header = (struct user_sve_header *) buf;
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char *base = (char *) buf;
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uint64_t vq, vg_reg_buf = 0;
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vq = sve_vq_from_vl (header->vl);
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/* Sanity check the data in the header. */
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if (!sve_vl_valid (header->vl)
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|| SVE_PT_SIZE (vq, header->flags) != header->size)
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error (_("Invalid SVE header from kernel."));
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if (REG_VALID == reg_buf->get_register_status (AARCH64_SVE_VG_REGNUM))
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reg_buf->raw_collect (AARCH64_SVE_VG_REGNUM, &vg_reg_buf);
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if (vg_reg_buf != 0 && vg_reg_buf != sve_vg_from_vl (header->vl))
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{
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/* Vector length on the running process has changed. GDB currently does
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not support this and will result in GDB writing invalid data back to
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the vector registers. Error and exit. We do not expect many programs
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to exhibit this behaviour. To fix this we need to spot the change
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earlier and generate a new target descriptor. */
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error (_("SVE Vector length has changed (%ld to %d). "
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"Cannot write back registers."),
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vg_reg_buf, sve_vg_from_vl (header->vl));
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}
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if (!HAS_SVE_STATE (*header))
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{
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/* There is no SVE state yet - the register dump contains a fpsimd
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structure instead. Where possible we want to write the reg_buf data
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back to the kernel using the fpsimd structure. However, if we cannot
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then we'll need to reformat the fpsimd into a full SVE structure,
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resulting in the initialization of SVE state written back to the
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kernel, which is why we try to avoid it. */
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bool has_sve_state = false;
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char *zero_reg = (char *) alloca (SVE_PT_SVE_ZREG_SIZE (vq));
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struct user_fpsimd_state *fpsimd
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= (struct user_fpsimd_state *)(base + SVE_PT_FPSIMD_OFFSET);
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memset (zero_reg, 0, SVE_PT_SVE_ZREG_SIZE (vq));
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|
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/* Check in the reg_buf if any of the Z registers are set after the
|
||||
first 128 bits, or if any of the other SVE registers are set. */
|
||||
|
||||
for (int i = 0; i < AARCH64_SVE_Z_REGS_NUM; i++)
|
||||
{
|
||||
has_sve_state |= reg_buf->raw_compare (AARCH64_SVE_Z0_REGNUM + i,
|
||||
zero_reg, sizeof (__int128_t));
|
||||
if (has_sve_state)
|
||||
break;
|
||||
}
|
||||
|
||||
if (!has_sve_state)
|
||||
for (int i = 0; i < AARCH64_SVE_P_REGS_NUM; i++)
|
||||
{
|
||||
has_sve_state |= reg_buf->raw_compare (AARCH64_SVE_P0_REGNUM + i,
|
||||
zero_reg, 0);
|
||||
if (has_sve_state)
|
||||
break;
|
||||
}
|
||||
|
||||
if (!has_sve_state)
|
||||
has_sve_state |= reg_buf->raw_compare (AARCH64_SVE_FFR_REGNUM,
|
||||
zero_reg, 0);
|
||||
|
||||
/* If no SVE state exists, then use the existing fpsimd structure to
|
||||
write out state and return. */
|
||||
if (!has_sve_state)
|
||||
{
|
||||
/* The collects of the Z registers will overflow the size of a vreg.
|
||||
There is enough space in the structure to allow for this, but we
|
||||
cannot overflow into the next register as we might not be
|
||||
collecting every register. */
|
||||
|
||||
for (int i = 0; i < AARCH64_SVE_Z_REGS_NUM; i++)
|
||||
{
|
||||
if (REG_VALID
|
||||
== reg_buf->get_register_status (AARCH64_SVE_Z0_REGNUM + i))
|
||||
{
|
||||
reg_buf->raw_collect (AARCH64_SVE_Z0_REGNUM + i, zero_reg);
|
||||
memcpy (&fpsimd->vregs[i], zero_reg, sizeof (__int128_t));
|
||||
}
|
||||
}
|
||||
|
||||
if (REG_VALID == reg_buf->get_register_status (AARCH64_FPSR_REGNUM))
|
||||
reg_buf->raw_collect (AARCH64_FPSR_REGNUM, &fpsimd->fpsr);
|
||||
if (REG_VALID == reg_buf->get_register_status (AARCH64_FPCR_REGNUM))
|
||||
reg_buf->raw_collect (AARCH64_FPCR_REGNUM, &fpsimd->fpcr);
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
/* Otherwise, reformat the fpsimd structure into a full SVE set, by
|
||||
expanding the V registers (working backwards so we don't splat
|
||||
registers before they are copied) and using null for everything else.
|
||||
Note that enough space for a full SVE dump was originally allocated
|
||||
for base. */
|
||||
|
||||
header->flags |= SVE_PT_REGS_SVE;
|
||||
header->size = SVE_PT_SIZE (vq, SVE_PT_REGS_SVE);
|
||||
|
||||
memcpy (base + SVE_PT_SVE_FPSR_OFFSET (vq), &fpsimd->fpsr,
|
||||
sizeof (uint32_t));
|
||||
memcpy (base + SVE_PT_SVE_FPCR_OFFSET (vq), &fpsimd->fpcr,
|
||||
sizeof (uint32_t));
|
||||
|
||||
for (int i = AARCH64_SVE_Z_REGS_NUM; i >= 0 ; i--)
|
||||
{
|
||||
memcpy (base + SVE_PT_SVE_ZREG_OFFSET (vq, i), &fpsimd->vregs[i],
|
||||
sizeof (__int128_t));
|
||||
}
|
||||
}
|
||||
|
||||
/* Replace the kernel values with those from reg_buf. */
|
||||
|
||||
for (int i = 0; i < AARCH64_SVE_Z_REGS_NUM; i++)
|
||||
if (REG_VALID == reg_buf->get_register_status (AARCH64_SVE_Z0_REGNUM + i))
|
||||
reg_buf->raw_collect (AARCH64_SVE_Z0_REGNUM + i,
|
||||
base + SVE_PT_SVE_ZREG_OFFSET (vq, i));
|
||||
|
||||
for (int i = 0; i < AARCH64_SVE_P_REGS_NUM; i++)
|
||||
if (REG_VALID == reg_buf->get_register_status (AARCH64_SVE_P0_REGNUM + i))
|
||||
reg_buf->raw_collect (AARCH64_SVE_P0_REGNUM + i,
|
||||
base + SVE_PT_SVE_PREG_OFFSET (vq, i));
|
||||
|
||||
if (REG_VALID == reg_buf->get_register_status (AARCH64_SVE_FFR_REGNUM))
|
||||
reg_buf->raw_collect (AARCH64_SVE_FFR_REGNUM,
|
||||
base + SVE_PT_SVE_FFR_OFFSET (vq));
|
||||
if (REG_VALID == reg_buf->get_register_status (AARCH64_FPSR_REGNUM))
|
||||
reg_buf->raw_collect (AARCH64_FPSR_REGNUM,
|
||||
base + SVE_PT_SVE_FPSR_OFFSET (vq));
|
||||
if (REG_VALID == reg_buf->get_register_status (AARCH64_FPCR_REGNUM))
|
||||
reg_buf->raw_collect (AARCH64_FPCR_REGNUM,
|
||||
base + SVE_PT_SVE_FPCR_OFFSET (vq));
|
||||
|
||||
}
|
||||
|
||||
@ -29,9 +29,30 @@
|
||||
#include "aarch64-sve-linux-sigcontext.h"
|
||||
#endif
|
||||
|
||||
/* Indicates whether a SVE ptrace header is followed by SVE registers or a
|
||||
fpsimd structure. */
|
||||
|
||||
#define HAS_SVE_STATE(header) ((header).flags && SVE_PT_REGS_SVE)
|
||||
|
||||
/* Read VQ for the given tid using ptrace. If SVE is not supported then zero
|
||||
is returned (on a system that supports SVE, then VQ cannot be zero). */
|
||||
|
||||
uint64_t aarch64_sve_get_vq (int tid);
|
||||
|
||||
/* Read the current SVE register set using ptrace, allocating space as
|
||||
required. */
|
||||
|
||||
extern std::unique_ptr<gdb_byte[]> aarch64_sve_get_sveregs (int tid);
|
||||
|
||||
/* Put the registers from linux structure buf into register buffer. */
|
||||
|
||||
extern void aarch64_sve_regs_copy_to_reg_buf (struct reg_buffer_common *reg_buf,
|
||||
const void *buf);
|
||||
|
||||
/* Put the registers from register buffer into linux structure buf. */
|
||||
|
||||
extern void
|
||||
aarch64_sve_regs_copy_from_reg_buf (const struct reg_buffer_common *reg_buf,
|
||||
void *buf);
|
||||
|
||||
#endif /* aarch64-sve-linux-ptrace.h */
|
||||
|
||||
Loading…
Reference in New Issue
Block a user