diff --git a/include/ChangeLog b/include/ChangeLog
index 038a070f28..01bb9207a8 100644
--- a/include/ChangeLog
+++ b/include/ChangeLog
@@ -1,3 +1,7 @@
+2019-04-25  Maciej W. Rozycki  <macro@linux-mips.org>
+
+	* opcode/mips.h: Update comment for MIPS32 CODE20 operand.
+
 2019-04-15  Sudakshina Das  <sudi.das@arm.com>
 
 	* elf/arm.h (START_RELOC_NUMBERS): New entry for R_ARM_THM_BF12.
diff --git a/include/opcode/mips.h b/include/opcode/mips.h
index abd52c8980..4309e1a348 100644
--- a/include/opcode/mips.h
+++ b/include/opcode/mips.h
@@ -56,8 +56,8 @@ extern "C" {
    code field in BREAK is 20 bits; yet MIPS assemblers and debuggers
    only use ten bits).  An optional two-operand form of break/sdbbp
    allows the lower ten bits to be set too, and MIPS32 and later
-   architectures allow 20 bits to be set with a signal operand
-   (using CODE20).
+   architectures allow 20 bits to be set with a single operand for
+   the sdbbp instruction (using CODE20).
 
    The syscall instruction uses CODE20.