* cris/Makefile.in (stamp-v10fcpu, stamp-v32fcpu): Add kludge to
include cgen-ops.h in decodev10.c and decodev32.c. * cris/sim-main.h: Don't include cgen-ops.h here. * cris/arch.c, cris/arch.h, cris/cpuall.h, cris/cpuv10.c, cris/cpuv10.h, cris/cpuv32.c, cris/cpuv32.h, cris/cris-desc.c, cris/cris-desc.h, cris/cris-opc.h, cris/decodev10.c, cris/decodev10.h, cris/decodev32.c, cris/decodev32.h, cris/modelv10.c, cris/modelv32.c, cris/semcrisv10f-switch.c, cris/semcrisv32f-switch.c: Regenerate.
This commit is contained in:
parent
cc27e1dc44
commit
cce0efb55e
@ -1,5 +1,15 @@
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2005-03-24 Hans-Peter Nilsson <hp@axis.com>
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* cris/Makefile.in (stamp-v10fcpu, stamp-v32fcpu): Add kludge to
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include cgen-ops.h in decodev10.c and decodev32.c.
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* cris/sim-main.h: Don't include cgen-ops.h here.
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* cris/arch.c, cris/arch.h, cris/cpuall.h, cris/cpuv10.c,
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cris/cpuv10.h, cris/cpuv32.c, cris/cpuv32.h, cris/cris-desc.c,
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cris/cris-desc.h, cris/cris-opc.h, cris/decodev10.c,
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cris/decodev10.h, cris/decodev32.c, cris/decodev32.h,
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cris/modelv10.c, cris/modelv32.c, cris/semcrisv10f-switch.c,
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cris/semcrisv32f-switch.c: Regenerate.
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* cris/traps.c (cris_break_13_handler) <case
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TARGET_SYS_rt_sigaction>: Rename sa_handler, sa_flags,
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sa_restorer, sa_mask_low, sa_mask_high to target_sa_handler etc.
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@ -140,11 +140,14 @@ stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(CGEN_CPU_DIR)/cris.cpu Makefile
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touch stamp-arch
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arch.h arch.c cpuall.h: $(CGEN_MAINT) stamp-arch
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# The sed-hack is supposed to be temporary, until we get CGEN to emit it.
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stamp-v10fcpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CGEN_CPU_DIR)/cris.cpu Makefile
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$(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
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archfile=$(CGEN_CPU_DIR)/cris.cpu \
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cpu=crisv10f mach=crisv10 SUFFIX=v10 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"
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$(SHELL) $(srcroot)/move-if-change $(srcdir)/semv10-switch.c $(srcdir)/semcrisv10f-switch.c
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sed -ne 'p; s/^\(#include "sim-assert.h"\)$$/#include "cgen-ops.h"/p' < $(srcdir)/decodev10.c > decodev10.c.tmp
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mv decodev10.c.tmp $(srcdir)/decodev10.c
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touch stamp-v10fcpu
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cpuv10.h cpuv10.c semcrisv10f-switch.c modelv10.c decodev10.c decodev10.h: $(CGEN_MAINT) stamp-v10fcpu
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@ -153,6 +156,8 @@ stamp-v32fcpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CGEN_CPU_DI
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archfile=$(CGEN_CPU_DIR)/cris.cpu \
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cpu=crisv32f mach=crisv32 SUFFIX=v32 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"
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$(SHELL) $(srcroot)/move-if-change $(srcdir)/semv32-switch.c $(srcdir)/semcrisv32f-switch.c
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sed -ne 'p; s/^\(#include "sim-assert.h"\)$$/#include "cgen-ops.h"/p' < $(srcdir)/decodev32.c > decodev32.c.tmp
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mv decodev32.c.tmp $(srcdir)/decodev32.c
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touch stamp-v32fcpu
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cpuv32.h cpuv32.c semcrisv32f-switch.c modelv32.c decodev32.c decodev32.h: $(CGEN_MAINT) stamp-v32fcpu
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@ -2,7 +2,7 @@
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THIS FILE IS MACHINE GENERATED WITH CGEN.
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Copyright 1996-2004 Free Software Foundation, Inc.
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Copyright 1996-2005 Free Software Foundation, Inc.
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This file is part of the GNU simulators.
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@ -2,7 +2,7 @@
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THIS FILE IS MACHINE GENERATED WITH CGEN.
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Copyright 1996-2004 Free Software Foundation, Inc.
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Copyright 1996-2005 Free Software Foundation, Inc.
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This file is part of the GNU simulators.
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@ -2,7 +2,7 @@
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THIS FILE IS MACHINE GENERATED WITH CGEN.
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Copyright 1996-2004 Free Software Foundation, Inc.
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Copyright 1996-2005 Free Software Foundation, Inc.
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This file is part of the GNU simulators.
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@ -2,7 +2,7 @@
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THIS FILE IS MACHINE GENERATED WITH CGEN.
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Copyright 1996-2004 Free Software Foundation, Inc.
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Copyright 1996-2005 Free Software Foundation, Inc.
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This file is part of the GNU simulators.
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@ -2,7 +2,7 @@
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THIS FILE IS MACHINE GENERATED WITH CGEN.
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Copyright 1996-2004 Free Software Foundation, Inc.
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Copyright 1996-2005 Free Software Foundation, Inc.
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This file is part of the GNU simulators.
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@ -2,7 +2,7 @@
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THIS FILE IS MACHINE GENERATED WITH CGEN.
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Copyright 1996-2004 Free Software Foundation, Inc.
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Copyright 1996-2005 Free Software Foundation, Inc.
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This file is part of the GNU simulators.
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@ -2,7 +2,7 @@
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THIS FILE IS MACHINE GENERATED WITH CGEN.
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Copyright 1996-2004 Free Software Foundation, Inc.
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Copyright 1996-2005 Free Software Foundation, Inc.
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This file is part of the GNU simulators.
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@ -2,7 +2,7 @@
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THIS FILE IS MACHINE GENERATED WITH CGEN.
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Copyright 1996-2004 Free Software Foundation, Inc.
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Copyright 1996-2005 Free Software Foundation, Inc.
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This file is part of the GNU Binutils and/or GDB, the GNU debugger.
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@ -43,7 +43,7 @@ static const CGEN_ATTR_ENTRY bool_attr[] =
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{ 0, 0 }
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};
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static const CGEN_ATTR_ENTRY MACH_attr[] =
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static const CGEN_ATTR_ENTRY MACH_attr[] ATTRIBUTE_UNUSED =
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{
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{ "base", MACH_BASE },
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{ "crisv0", MACH_CRISV0 },
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@ -55,7 +55,7 @@ static const CGEN_ATTR_ENTRY MACH_attr[] =
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{ 0, 0 }
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};
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static const CGEN_ATTR_ENTRY ISA_attr[] =
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static const CGEN_ATTR_ENTRY ISA_attr[] ATTRIBUTE_UNUSED =
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{
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{ "cris", ISA_CRIS },
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{ "max", ISA_MAX },
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@ -2,7 +2,7 @@
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THIS FILE IS MACHINE GENERATED WITH CGEN.
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Copyright 1996-2004 Free Software Foundation, Inc.
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Copyright 1996-2005 Free Software Foundation, Inc.
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This file is part of the GNU Binutils and/or GDB, the GNU debugger.
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@ -221,8 +221,6 @@ typedef enum isa_attr {
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/* Ifield support. */
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extern const struct cgen_ifld cris_cgen_ifld_table[];
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/* Ifield attribute indices. */
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/* Enum declaration for cgen_ifld attrs. */
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@ -326,6 +324,8 @@ typedef enum cgen_insn_attr {
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/* cgen.h uses things we just defined. */
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#include "opcode/cgen.h"
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extern const struct cgen_ifld cris_cgen_ifld_table[];
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/* Attributes. */
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extern const CGEN_ATTR_TABLE cris_cgen_hardware_attr_table[];
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extern const CGEN_ATTR_TABLE cris_cgen_ifield_attr_table[];
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@ -2,7 +2,7 @@
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THIS FILE IS MACHINE GENERATED WITH CGEN.
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Copyright 1996-2004 Free Software Foundation, Inc.
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Copyright 1996-2005 Free Software Foundation, Inc.
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This file is part of the GNU Binutils and/or GDB, the GNU debugger.
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@ -2,7 +2,7 @@
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THIS FILE IS MACHINE GENERATED WITH CGEN.
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Copyright 1996-2004 Free Software Foundation, Inc.
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Copyright 1996-2005 Free Software Foundation, Inc.
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This file is part of the GNU simulators.
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@ -27,6 +27,7 @@ with this program; if not, write to the Free Software Foundation, Inc.,
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#include "sim-main.h"
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#include "sim-assert.h"
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#include "cgen-ops.h"
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/* The instruction descriptor array.
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This is computed at runtime. Space for it is not malloc'd to save a
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@ -2,7 +2,7 @@
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THIS FILE IS MACHINE GENERATED WITH CGEN.
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Copyright 1996-2004 Free Software Foundation, Inc.
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Copyright 1996-2005 Free Software Foundation, Inc.
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This file is part of the GNU simulators.
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@ -2,7 +2,7 @@
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THIS FILE IS MACHINE GENERATED WITH CGEN.
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Copyright 1996-2004 Free Software Foundation, Inc.
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Copyright 1996-2005 Free Software Foundation, Inc.
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This file is part of the GNU simulators.
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@ -27,6 +27,7 @@ with this program; if not, write to the Free Software Foundation, Inc.,
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#include "sim-main.h"
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#include "sim-assert.h"
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#include "cgen-ops.h"
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/* The instruction descriptor array.
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This is computed at runtime. Space for it is not malloc'd to save a
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@ -2,7 +2,7 @@
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THIS FILE IS MACHINE GENERATED WITH CGEN.
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Copyright 1996-2004 Free Software Foundation, Inc.
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Copyright 1996-2005 Free Software Foundation, Inc.
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This file is part of the GNU simulators.
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@ -2,7 +2,7 @@
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THIS FILE IS MACHINE GENERATED WITH CGEN.
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Copyright 1996-2004 Free Software Foundation, Inc.
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Copyright 1996-2005 Free Software Foundation, Inc.
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This file is part of the GNU simulators.
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@ -2,7 +2,7 @@
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THIS FILE IS MACHINE GENERATED WITH CGEN.
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Copyright 1996-2004 Free Software Foundation, Inc.
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Copyright 1996-2005 Free Software Foundation, Inc.
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This file is part of the GNU simulators.
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@ -2,7 +2,7 @@
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THIS FILE IS MACHINE GENERATED WITH CGEN.
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Copyright 1996-2004 Free Software Foundation, Inc.
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Copyright 1996-2005 Free Software Foundation, Inc.
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This file is part of the GNU simulators.
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@ -2,7 +2,7 @@
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THIS FILE IS MACHINE GENERATED WITH CGEN.
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Copyright 1996-2004 Free Software Foundation, Inc.
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Copyright 1996-2005 Free Software Foundation, Inc.
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This file is part of the GNU simulators.
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@ -56,9 +56,6 @@ do { \
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#include "sim-base.h"
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#include "cgen-sim.h"
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#include "cris-sim.h"
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/* For occurrences of ANDIF in decodev32.c. */
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#include "cgen-ops.h"
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struct cris_sim_mmapped_page {
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USI addr;
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