* sim/cris: New directory with C and assembly tests for the CRIS
simulator.
This commit is contained in:
Hans-Peter Nilsson
parent
6745c7267e
commit
5e1f64305e
@ -1,3 +1,8 @@
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2005-11-21 Hans-Peter Nilsson <hp@axis.com>
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* sim/cris: New directory with C and assembly tests for the CRIS
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simulator.
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2005-01-11 Andrew Cagney <cagney@localhost.localdomain>
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* configure: Regenerated to track ../common/aclocal.m4 changes.
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50
sim/testsuite/sim/cris/asm/abs.ms
Normal file
50
sim/testsuite/sim/cris/asm/abs.ms
Normal file
@ -0,0 +1,50 @@
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# mach: crisv0 crisv3 crisv8 crisv10 crisv32
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# output: 1\n0\n80000000\n7fffffff\n2a\n1\nffff\n1f\n0\n
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.include "testutils.inc"
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start
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moveq -1,r3
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abs r3,r3
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test_move_cc 0 0 0 0
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dumpr3 ; 1
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moveq 0,r3
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dumpr3 ; 0
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move.d 0x80000000,r4
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abs r4,r3
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test_move_cc 1 0 0 0
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dumpr3 ; 80000000
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move.d 0x7fffffff,r4
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abs r4,r3
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test_move_cc 0 0 0 0
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dumpr3 ; 7fffffff
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move.d 42,r3
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abs r3,r3
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test_move_cc 0 0 0 0
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dumpr3 ; 2a
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moveq 1,r6
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abs r6,r3
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test_move_cc 0 0 0 0
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dumpr3 ; 1
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move.d 0xffff,r3
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abs r3,r3
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test_move_cc 0 0 0 0
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dumpr3 ; ffff
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moveq -31,r5
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abs r5,r3
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test_move_cc 0 0 0 0
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dumpr3 ; 1f
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moveq 0,r5
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abs r5,r3
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test_move_cc 0 1 0 0
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dumpr3 ; 0
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quit
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81
sim/testsuite/sim/cris/asm/addc.ms
Normal file
81
sim/testsuite/sim/cris/asm/addc.ms
Normal file
@ -0,0 +1,81 @@
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# mach: crisv0 crisv3 crisv8 crisv10 crisv32
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# output: 1\n1\n1fffe\nfffffffe\ncc463bdb\nffff0001\n1\nfffe\nfedafffe\n78133bdb\nffffff01\n1\nfe\nfeda49fe\n781344db\n
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.include "testutils.inc"
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start
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moveq -1,r3
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add.d 2,r3
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test_cc 0 0 0 1
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dumpr3 ; 1
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moveq 2,r3
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add.d -1,r3
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test_cc 0 0 0 1
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dumpr3 ; 1
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move.d 0xffff,r3
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add.d 0xffff,r3
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test_cc 0 0 0 0
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dumpr3 ; 1fffe
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moveq -1,r3
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add.d -1,r3
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test_cc 1 0 0 1
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dumpr3 ; fffffffe
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move.d 0x78134452,r3
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add.d 0x5432f789,r3
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test_cc 1 0 1 0
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dumpr3 ; cc463bdb
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moveq -1,r3
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add.w 2,r3
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test_cc 0 0 0 1
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dumpr3 ; ffff0001
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moveq 2,r3
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add.w -1,r3
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test_cc 0 0 0 1
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dumpr3 ; 1
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move.d 0xffff,r3
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add.w 0xffff,r3
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test_cc 1 0 0 1
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dumpr3 ; fffe
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move.d 0xfedaffff,r3
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add.w 0xffff,r3
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test_cc 1 0 0 1
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dumpr3 ; fedafffe
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move.d 0x78134452,r3
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add.w 0xf789,r3
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test_cc 0 0 0 1
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dumpr3 ; 78133bdb
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moveq -1,r3
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add.b 2,r3
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test_cc 0 0 0 1
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dumpr3 ; ffffff01
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moveq 2,r3
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add.b -1,r3
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test_cc 0 0 0 1
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dumpr3 ; 1
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move.d 0xff,r3
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add.b 0xff,r3
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test_cc 1 0 0 1
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dumpr3 ; fe
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move.d 0xfeda49ff,r3
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add.b 0xff,r3
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test_cc 1 0 0 1
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dumpr3 ; feda49fe
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move.d 0x78134452,r3
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add.b 0x89,r3
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test_cc 1 0 0 0
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dumpr3 ; 781344db
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quit
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35
sim/testsuite/sim/cris/asm/addcpc.ms
Normal file
35
sim/testsuite/sim/cris/asm/addcpc.ms
Normal file
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# mach: crisv3 crisv8 crisv10
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# output: 2f\n31\n
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# Test that the special case add.d const,pc works.
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.include "testutils.inc"
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start
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x:
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add.d y-y0,pc
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y0:
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quit
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.space 1000
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quit
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quit
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quit
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quit
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quit
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z:
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move.d 49,r3
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dumpr3
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quit
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.space 1000
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quit
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quit
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quit
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quit
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quit
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y:
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move.d 47,r3
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dumpr3
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add.d z-z0,pc
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z0:
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quit
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50
sim/testsuite/sim/cris/asm/addcv32c.ms
Normal file
50
sim/testsuite/sim/cris/asm/addcv32c.ms
Normal file
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# mach: crisv32
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# output: 0\n0\n1\n1\n2\n1ffff\nfffffffe\ncc463bdc\n
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.include "testutils.inc"
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start
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clearf cz
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moveq 0,r3
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addc 0,r3
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test_cc 0 0 0 0
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dumpr3 ; 0
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setf z
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moveq 0,r3
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addc 0,r3
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test_cc 0 1 0 0
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dumpr3 ; 0
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setf cz
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moveq 0,r3
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addc 0,r3
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test_cc 0 0 0 0
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dumpr3 ; 1
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clearf c
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moveq -1,r3
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addc 2,r3
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test_cc 0 0 0 1
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dumpr3 ; 1+c
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moveq 2,r3
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addc -1,r3
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test_cc 0 0 0 1
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dumpr3 ; 2+c
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move.d 0xffff,r3
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addc 0xffff,r3
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test_cc 0 0 0 0
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dumpr3 ; 1ffff
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moveq -1,r3
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addc -1,r3
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test_cc 1 0 0 1
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dumpr3 ; fffffffe+c
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move.d 0x78134452,r3
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addc 0x5432f789,r3
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test_cc 1 0 1 0
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dumpr3 ; cc463bdc
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quit
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69
sim/testsuite/sim/cris/asm/addcv32m.ms
Normal file
69
sim/testsuite/sim/cris/asm/addcv32m.ms
Normal file
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# mach: crisv32
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# output: 0\n0\n1\n0\n1\n1\n2\n1ffff\nfffffffe\ncc463bdc\n
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.include "testutils.inc"
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.data
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x:
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.dword 0,0,2,-1,0xffff,-1,0x5432f789
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start
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move.d x,r5
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clearf cz
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moveq 0,r3
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addc [r5],r3
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test_cc 0 0 0 0
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dumpr3 ; 0
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setf z
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moveq 0,r3
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addc [r5],r3
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test_cc 0 1 0 0
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dumpr3 ; 0
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setf c
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moveq 0,r3
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addc [r5],r3
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test_cc 0 0 0 0
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dumpr3 ; 1
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clearf c
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moveq 0,r3
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addc [r5+],r3
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test_cc 0 0 0 0
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dumpr3 ; 0
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setf c
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moveq 0,r3
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addc [r5+],r3
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test_cc 0 0 0 0
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dumpr3 ; 1
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clearf c
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moveq -1,r3
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addc [r5+],r3
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test_cc 0 0 0 1
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dumpr3 ; 1+c
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moveq 2,r3
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addc [r5],r3
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moveq 4,r6
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addi r6.b,r5
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test_cc 0 0 0 1
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dumpr3 ; 2+c
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move.d 0xffff,r3
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addc [r5+],r3
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test_cc 0 0 0 0
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dumpr3 ; 1ffff
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moveq -1,r3
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addc [r5+],r3
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test_cc 1 0 0 1
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dumpr3 ; fffffffe+c
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move.d 0x78134452,r3
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addc [r5+],r3
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test_cc 1 0 1 0
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dumpr3 ; cc463bdc
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quit
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57
sim/testsuite/sim/cris/asm/addcv32r.ms
Normal file
57
sim/testsuite/sim/cris/asm/addcv32r.ms
Normal file
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# mach: crisv32
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# output: 0\n0\n1\n1\n2\n1ffff\nfffffffe\ncc463bdc\n
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.include "testutils.inc"
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start
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clearf cz
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moveq 0,r3
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moveq 0,r4
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addc r4,r3
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test_cc 0 0 0 0
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dumpr3 ; 0
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setf z
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moveq 0,r3
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moveq 0,r4
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addc r4,r3
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test_cc 0 1 0 0
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dumpr3 ; 0
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setf cz
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moveq 0,r3
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moveq 0,r4
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addc r4,r3
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test_cc 0 0 0 0
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dumpr3 ; 1
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moveq -1,r3
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moveq 2,r4
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addc r4,r3
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test_cc 0 0 0 1
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dumpr3 ; 1+c
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moveq 2,r3
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moveq -1,r4
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addc r4,r3
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test_cc 0 0 0 1
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dumpr3 ; 2+c
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move.d 0xffff,r4
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move.d r4,r3
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addc r4,r3
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test_cc 0 0 0 0
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dumpr3 ; 1ffff
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moveq -1,r4
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move.d r4,r3
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addc r4,r3
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test_cc 1 0 0 1
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dumpr3 ; fffffffe+c
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move.d 0x5432f789,r4
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move.d 0x78134452,r3
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addc r4,r3
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test_cc 1 0 1 0
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dumpr3 ; cc463bdc
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quit
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57
sim/testsuite/sim/cris/asm/addi.ms
Normal file
57
sim/testsuite/sim/cris/asm/addi.ms
Normal file
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# mach: crisv0 crisv3 crisv8 crisv10 crisv32
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# output: 0\n1\n2\n4\nbe02460f\n69d035a6\nc16c14d4\n
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.include "testutils.inc"
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start
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moveq 0,r3
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moveq 0,r4
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clearf zcvn
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addi r4.b,r3
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test_cc 0 0 0 0
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dumpr3 ; 0
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moveq 0,r3
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moveq 1,r4
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setf zcvn
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addi r4.b,r3
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test_cc 1 1 1 1
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dumpr3 ; 1
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moveq 0,r3
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moveq 1,r4
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setf cv
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clearf zn
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addi r4.w,r3
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test_cc 0 0 1 1
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dumpr3 ; 2
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moveq 0,r3
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moveq 1,r4
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clearf cv
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setf zn
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addi r4.d,r3
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test_cc 1 1 0 0
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dumpr3 ; 4
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move.d 0x12345678,r3
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move.d 0xabcdef97,r4
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clearf cn
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setf zv
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addi r4.b,r3
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test_cc 0 1 1 0
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dumpr3 ; be02460f
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move.d 0x12345678,r3
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move.d 0xabcdef97,r4
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setf cn
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clearf zv
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addi r4.w,r3
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test_cc 1 0 0 1
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dumpr3 ; 69d035a6
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move.d 0x12345678,r3
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move.d 0xabcdef97,r4
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addi r4.d,r3
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dumpr3 ; c16c14d4
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quit
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62
sim/testsuite/sim/cris/asm/addiv32.ms
Normal file
62
sim/testsuite/sim/cris/asm/addiv32.ms
Normal file
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# mach: crisv32
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# output: 4455aa77\n4455aa77\nee19ccff\nff22\n4455aa77\nff224455\n55aa77ff\n
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.include "testutils.inc"
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.data
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x:
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.dword 0x55aa77ff
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.dword 0xccff2244
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.dword 0x88ccee19
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start
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setf cv
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moveq -1,r0
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move.d x-32768,r5
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move.d 32769,r6
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addi r6.b,r5,acr
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test_cc 0 0 1 1
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move.d [acr],r3
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dumpr3 ; 4455aa77
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addu.w 32771,r5
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setf znvc
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moveq -1,r8
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addi r8.w,r5,acr
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test_cc 1 1 1 1
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move.d [acr],r3
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dumpr3 ; 4455aa77
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moveq 5,r10
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clearf znvc
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addi r10.b,acr,acr
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test_cc 0 0 0 0
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move.d [acr],r3
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dumpr3 ; ee19ccff
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subq 1,r5
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move.d r5,r8
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subq 1,r8
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moveq 1,r9
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addi r9.d,r8,acr
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test_cc 0 0 0 0
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movu.w [acr],r3
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dumpr3 ; ff22
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moveq -2,r11
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addi r11.w,acr,acr
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move.d [acr],r3
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dumpr3 ; 4455aa77
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moveq 5,r9
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addi r9.d,acr,acr
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subq 18,acr
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move.d [acr],r3
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dumpr3 ; ff224455
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move.d -76789888/4,r12
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addi r12.d,r5,acr
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add.d 76789886,acr
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move.d [acr],r3
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dumpr3 ; 55aa77ff
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quit
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96
sim/testsuite/sim/cris/asm/addm.ms
Normal file
96
sim/testsuite/sim/cris/asm/addm.ms
Normal file
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# mach: crisv0 crisv3 crisv8 crisv10 crisv32
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# output: 1\n1\n1fffe\nfffffffe\ncc463bdb\nffff0001\n1\nfffe\nfedafffe\n78133bdb\nffffff01\n1\nfe\nfeda49fe\n781344db\n781344d0\n
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.include "testutils.inc"
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.data
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x:
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.dword 2,-1,0xffff,-1,0x5432f789
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.word 2,-1,0xffff,0xf789
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.byte 2,0xff,0x89
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.byte 0x7e
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start
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moveq -1,r3
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move.d x,r5
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add.d [r5+],r3
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test_cc 0 0 0 1
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dumpr3 ; 1
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moveq 2,r3
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add.d [r5],r3
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test_cc 0 0 0 1
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addq 4,r5
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dumpr3 ; 1
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move.d 0xffff,r3
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||||
add.d [r5+],r3
|
||||
test_cc 0 0 0 0
|
||||
dumpr3 ; 1fffe
|
||||
|
||||
moveq -1,r3
|
||||
add.d [r5+],r3
|
||||
test_cc 1 0 0 1
|
||||
dumpr3 ; fffffffe
|
||||
|
||||
move.d 0x78134452,r3
|
||||
add.d [r5+],r3
|
||||
test_cc 1 0 1 0
|
||||
dumpr3 ; cc463bdb
|
||||
|
||||
moveq -1,r3
|
||||
add.w [r5+],r3
|
||||
test_cc 0 0 0 1
|
||||
dumpr3 ; ffff0001
|
||||
|
||||
moveq 2,r3
|
||||
add.w [r5+],r3
|
||||
test_cc 0 0 0 1
|
||||
dumpr3 ; 1
|
||||
|
||||
move.d 0xffff,r3
|
||||
add.w [r5],r3
|
||||
test_cc 1 0 0 1
|
||||
dumpr3 ; fffe
|
||||
|
||||
move.d 0xfedaffff,r3
|
||||
add.w [r5+],r3
|
||||
test_cc 1 0 0 1
|
||||
dumpr3 ; fedafffe
|
||||
|
||||
move.d 0x78134452,r3
|
||||
add.w [r5+],r3
|
||||
test_cc 0 0 0 1
|
||||
dumpr3 ; 78133bdb
|
||||
|
||||
moveq -1,r3
|
||||
add.b [r5],r3
|
||||
test_cc 0 0 0 1
|
||||
addq 1,r5
|
||||
dumpr3 ; ffffff01
|
||||
|
||||
moveq 2,r3
|
||||
add.b [r5],r3
|
||||
test_cc 0 0 0 1
|
||||
dumpr3 ; 1
|
||||
|
||||
move.d 0xff,r3
|
||||
add.b [r5],r3
|
||||
test_cc 1 0 0 1
|
||||
dumpr3 ; fe
|
||||
|
||||
move.d 0xfeda49ff,r3
|
||||
add.b [r5+],r3
|
||||
test_cc 1 0 0 1
|
||||
dumpr3 ; feda49fe
|
||||
|
||||
move.d 0x78134452,r3
|
||||
add.b [r5+],r3
|
||||
test_cc 1 0 0 0
|
||||
dumpr3 ; 781344db
|
||||
|
||||
move.d 0x78134452,r3
|
||||
add.b [r5],r3
|
||||
test_cc 1 0 1 0
|
||||
dumpr3 ; 781344d0
|
||||
|
||||
quit
|
||||
44
sim/testsuite/sim/cris/asm/addoc.ms
Normal file
44
sim/testsuite/sim/cris/asm/addoc.ms
Normal file
@ -0,0 +1,44 @@
|
||||
# mach: crisv32
|
||||
# output: 4455aa77\n4455aa77\nee19ccff\nff22\n4455aa77\nff224455\n55aa77ff\n
|
||||
|
||||
.include "testutils.inc"
|
||||
.data
|
||||
x:
|
||||
.dword 0x55aa77ff
|
||||
.dword 0xccff2244
|
||||
.dword 0x88ccee19
|
||||
|
||||
start
|
||||
moveq -1,r0
|
||||
move.d x-32768,r5
|
||||
addo.d 32769,r5,acr
|
||||
move.d [acr],r3
|
||||
dumpr3 ; 4455aa77
|
||||
|
||||
addu.w 32770,r5
|
||||
addo.w -1,r5,acr
|
||||
move.d [acr],r3
|
||||
dumpr3 ; 4455aa77
|
||||
|
||||
addo.d 5,acr,acr
|
||||
move.d [acr],r3
|
||||
dumpr3 ; ee19ccff
|
||||
|
||||
addo.b 3,r5,acr
|
||||
movu.w [acr],r3
|
||||
dumpr3 ; ff22
|
||||
|
||||
addo.b -4,acr,acr
|
||||
move.d [acr],r3
|
||||
dumpr3 ; 4455aa77
|
||||
|
||||
addo.w 2,acr,acr
|
||||
move.d [acr],r3
|
||||
dumpr3 ; ff224455
|
||||
|
||||
addo.d -76789887,r5,acr
|
||||
add.d 76789885,acr
|
||||
move.d [acr],r3
|
||||
dumpr3 ; 55aa77ff
|
||||
|
||||
quit
|
||||
55
sim/testsuite/sim/cris/asm/addom.ms
Normal file
55
sim/testsuite/sim/cris/asm/addom.ms
Normal file
@ -0,0 +1,55 @@
|
||||
# mach: crisv32
|
||||
# output: 4455aa77\n4455aa77\nee19ccff\nff22\n4455aa77\nff224455\n55aa77ff\n
|
||||
|
||||
.include "testutils.inc"
|
||||
.data
|
||||
x:
|
||||
.dword 0x55aa77ff
|
||||
.dword 0xccff2244
|
||||
.dword 0x88ccee19
|
||||
y:
|
||||
.dword 32769
|
||||
.word -1
|
||||
.dword 5
|
||||
.byte 3,-4
|
||||
.word 2
|
||||
.dword -76789887
|
||||
|
||||
start
|
||||
moveq -1,r0
|
||||
move.d x-32768,r5
|
||||
move.d y,r13
|
||||
addo.d [r13+],r5,acr
|
||||
move.d [acr],r3
|
||||
dumpr3 ; 4455aa77
|
||||
|
||||
addu.w 32770,r5
|
||||
addo.w [r13+],r5,acr
|
||||
move.d [acr],r3
|
||||
dumpr3 ; 4455aa77
|
||||
|
||||
addo.d [r13],acr,acr
|
||||
addq 4,r13
|
||||
move.d [acr],r3
|
||||
dumpr3 ; ee19ccff
|
||||
|
||||
addo.b [r13+],r5,acr
|
||||
movu.w [acr],r3
|
||||
dumpr3 ; ff22
|
||||
|
||||
addo.b [r13],acr,acr
|
||||
addq 1,r13
|
||||
move.d [acr],r3
|
||||
dumpr3 ; 4455aa77
|
||||
|
||||
addo.w [r13],acr,acr
|
||||
addq 2,r13
|
||||
move.d [acr],r3
|
||||
dumpr3 ; ff224455
|
||||
|
||||
addo.d [r13+],r5,acr
|
||||
add.d 76789885,acr
|
||||
move.d [acr],r3
|
||||
dumpr3 ; 55aa77ff
|
||||
|
||||
quit
|
||||
31
sim/testsuite/sim/cris/asm/addoq.ms
Normal file
31
sim/testsuite/sim/cris/asm/addoq.ms
Normal file
@ -0,0 +1,31 @@
|
||||
# mach: crisv32
|
||||
# output: ccff2244\n88ccee19\n55aa77ff\n19cc\n
|
||||
|
||||
.include "testutils.inc"
|
||||
.data
|
||||
x:
|
||||
.dword 0x55aa77ff
|
||||
.dword 0xccff2244
|
||||
.dword 0x88ccee19
|
||||
start
|
||||
moveq -1,r0
|
||||
move.d x+4,r5
|
||||
setf zvnc
|
||||
addoq 0,r5,acr
|
||||
test_cc 1 1 1 1
|
||||
move.d [acr],r3
|
||||
dumpr3 ; ccff2244
|
||||
setf zvnc
|
||||
addoq 4,r5,acr
|
||||
test_cc 1 1 1 1
|
||||
move.d [acr],r3
|
||||
dumpr3 ; 88ccee19
|
||||
clearf zvnc
|
||||
addoq -8,acr,acr
|
||||
test_cc 0 0 0 0
|
||||
move.d [acr],r3
|
||||
dumpr3 ; 55aa77ff
|
||||
addoq 3,r5,acr
|
||||
movu.w [acr],r3
|
||||
dumpr3 ; 19cc
|
||||
quit
|
||||
47
sim/testsuite/sim/cris/asm/addq.ms
Normal file
47
sim/testsuite/sim/cris/asm/addq.ms
Normal file
@ -0,0 +1,47 @@
|
||||
# mach: crisv3 crisv8 crisv10 crisv32
|
||||
# output: ffffffff\n0\n1\n100\n10000\n47\n67\na6\n80000001\n
|
||||
|
||||
.include "testutils.inc"
|
||||
start
|
||||
moveq -2,r3
|
||||
addq 1,r3
|
||||
test_cc 1 0 0 0
|
||||
dumpr3
|
||||
|
||||
addq 1,r3
|
||||
test_cc 0 1 0 1
|
||||
dumpr3
|
||||
|
||||
addq 1,r3
|
||||
test_cc 0 0 0 0
|
||||
dumpr3
|
||||
|
||||
move.d 0xff,r3
|
||||
addq 1,r3
|
||||
test_cc 0 0 0 0
|
||||
dumpr3
|
||||
|
||||
move.d 0xffff,r3
|
||||
addq 1,r3
|
||||
test_cc 0 0 0 0
|
||||
dumpr3
|
||||
|
||||
move.d 0x42,r3
|
||||
addq 5,r3
|
||||
test_cc 0 0 0 0
|
||||
dumpr3
|
||||
|
||||
addq 32,r3
|
||||
test_cc 0 0 0 0
|
||||
dumpr3
|
||||
|
||||
addq 63,r3
|
||||
test_cc 0 0 0 0
|
||||
dumpr3
|
||||
|
||||
move.d 0x7ffffffe,r3
|
||||
addq 3,r3
|
||||
test_cc 1 0 1 0
|
||||
dumpr3
|
||||
|
||||
quit
|
||||
8
sim/testsuite/sim/cris/asm/addqpc.ms
Normal file
8
sim/testsuite/sim/cris/asm/addqpc.ms
Normal file
@ -0,0 +1,8 @@
|
||||
# mach: crisv3 crisv8 crisv10
|
||||
# xerror:
|
||||
# output: General register read of PC is not implemented.\nprogram stopped with signal 5.\n
|
||||
|
||||
.include "testutils.inc"
|
||||
start
|
||||
addq 1,pc
|
||||
|
||||
96
sim/testsuite/sim/cris/asm/addr.ms
Normal file
96
sim/testsuite/sim/cris/asm/addr.ms
Normal file
@ -0,0 +1,96 @@
|
||||
# mach: crisv0 crisv3 crisv8 crisv10 crisv32
|
||||
# output: 1\n1\n1fffe\nfffffffe\ncc463bdb\nffff0001\n1\nfffe\nfedafffe\n78133bdb\nffffff01\n1\nfe\nfeda49fe\n781344db\n
|
||||
|
||||
.include "testutils.inc"
|
||||
start
|
||||
moveq -1,r3
|
||||
moveq 2,r4
|
||||
add.d r4,r3
|
||||
test_cc 0 0 0 1
|
||||
dumpr3 ; 1
|
||||
|
||||
moveq 2,r3
|
||||
moveq -1,r4
|
||||
add.d r4,r3
|
||||
test_cc 0 0 0 1
|
||||
dumpr3 ; 1
|
||||
|
||||
move.d 0xffff,r4
|
||||
move.d r4,r3
|
||||
add.d r4,r3
|
||||
test_cc 0 0 0 0
|
||||
dumpr3 ; 1fffe
|
||||
|
||||
moveq -1,r4
|
||||
move.d r4,r3
|
||||
add.d r4,r3
|
||||
test_cc 1 0 0 1
|
||||
dumpr3 ; fffffffe
|
||||
|
||||
move.d 0x5432f789,r4
|
||||
move.d 0x78134452,r3
|
||||
add.d r4,r3
|
||||
test_cc 1 0 1 0
|
||||
dumpr3 ; cc463bdb
|
||||
|
||||
moveq -1,r3
|
||||
moveq 2,r4
|
||||
add.w r4,r3
|
||||
test_cc 0 0 0 1
|
||||
dumpr3 ; ffff0001
|
||||
|
||||
moveq 2,r3
|
||||
moveq -1,r4
|
||||
add.w r4,r3
|
||||
test_cc 0 0 0 1
|
||||
dumpr3 ; 1
|
||||
|
||||
move.d 0xffff,r4
|
||||
move.d r4,r3
|
||||
add.w r4,r3
|
||||
test_cc 1 0 0 1
|
||||
dumpr3 ; fffe
|
||||
|
||||
move.d 0xfedaffff,r4
|
||||
move.d r4,r3
|
||||
add.w r4,r3
|
||||
test_cc 1 0 0 1
|
||||
dumpr3 ; fedafffe
|
||||
|
||||
move.d 0x5432f789,r4
|
||||
move.d 0x78134452,r3
|
||||
add.w r4,r3
|
||||
test_cc 0 0 0 1
|
||||
dumpr3 ; 78133bdb
|
||||
|
||||
moveq -1,r3
|
||||
moveq 2,r4
|
||||
add.b r4,r3
|
||||
test_cc 0 0 0 1
|
||||
dumpr3 ; ffffff01
|
||||
|
||||
moveq 2,r3
|
||||
moveq -1,r4
|
||||
add.b r4,r3
|
||||
test_cc 0 0 0 1
|
||||
dumpr3 ; 1
|
||||
|
||||
move.d 0xff,r4
|
||||
move.d r4,r3
|
||||
add.b r4,r3
|
||||
test_cc 1 0 0 1
|
||||
dumpr3 ; fe
|
||||
|
||||
move.d 0xfeda49ff,r4
|
||||
move.d r4,r3
|
||||
add.b r4,r3
|
||||
test_cc 1 0 0 1
|
||||
dumpr3 ; feda49fe
|
||||
|
||||
move.d 0x5432f789,r4
|
||||
move.d 0x78134452,r3
|
||||
add.b r4,r3
|
||||
test_cc 1 0 0 0
|
||||
dumpr3 ; 781344db
|
||||
|
||||
quit
|
||||
61
sim/testsuite/sim/cris/asm/addswpc.ms
Normal file
61
sim/testsuite/sim/cris/asm/addswpc.ms
Normal file
@ -0,0 +1,61 @@
|
||||
# mach: crisv3 crisv8 crisv10
|
||||
# output: 7\n
|
||||
|
||||
# Test that the special case adds.w [pc+rN.w],pc works.
|
||||
|
||||
.include "testutils.inc"
|
||||
start
|
||||
x:
|
||||
moveq 0,r3
|
||||
ba xy
|
||||
moveq 5,r2
|
||||
|
||||
ok:
|
||||
moveq 7,r3
|
||||
dumpr3
|
||||
quit
|
||||
|
||||
xy:
|
||||
adds.w [pc+r2.w],pc
|
||||
y:
|
||||
.word x0-y
|
||||
.word x0-y
|
||||
.word x0-y
|
||||
.word x0-y
|
||||
.word x0-y
|
||||
.word ok-y
|
||||
.word x0-y
|
||||
.word x0-y
|
||||
.word x0-y
|
||||
.word x0-y
|
||||
.word x0-y
|
||||
.word x0-y
|
||||
.word x0-y
|
||||
.word x0-y
|
||||
.word x0-y
|
||||
.word x0-y
|
||||
.word x0-y
|
||||
.word x0-y
|
||||
.word x0-y
|
||||
.word x0-y
|
||||
.word x0-y
|
||||
.word x0-y
|
||||
.word x0-y
|
||||
.word x0-y
|
||||
.word x0-y
|
||||
.word x0-y
|
||||
.word x0-y
|
||||
.word x0-y
|
||||
.word x0-y
|
||||
.word x0-y
|
||||
.word x0-y
|
||||
.word x0-y
|
||||
.word x0-y
|
||||
.word x0-y
|
||||
.word x0-y
|
||||
.word x0-y
|
||||
.word x0-y
|
||||
.word x0-y
|
||||
.word x0-y
|
||||
x0:
|
||||
quit
|
||||
91
sim/testsuite/sim/cris/asm/addxc.ms
Normal file
91
sim/testsuite/sim/cris/asm/addxc.ms
Normal file
@ -0,0 +1,91 @@
|
||||
# mach: crisv0 crisv3 crisv8 crisv10 crisv32
|
||||
# output: 1\n1\n101\n10001\n100fe\n1fffe\nfffe\nfffe\nfffffffe\nfe\nfffffffe\n781344db\n781343db\n78143bdb\n78133bdb\n800000ed\n0\n
|
||||
|
||||
.include "testutils.inc"
|
||||
start
|
||||
moveq 2,r3
|
||||
adds.b 0xff,r3
|
||||
test_cc 0 0 0 1
|
||||
dumpr3 ; 1
|
||||
|
||||
moveq 2,r3
|
||||
adds.w 0xffff,r3
|
||||
test_cc 0 0 0 1
|
||||
dumpr3 ; 1
|
||||
|
||||
moveq 2,r3
|
||||
addu.b 0xff,r3
|
||||
dumpr3 ; 101
|
||||
|
||||
moveq 2,r3
|
||||
move.d 0xffffffff,r4
|
||||
addu.w -1,r3
|
||||
test_cc 0 0 0 0
|
||||
dumpr3 ; 10001
|
||||
|
||||
move.d 0xffff,r3
|
||||
addu.b -1,r3
|
||||
test_cc 0 0 0 0
|
||||
dumpr3 ; 100fe
|
||||
|
||||
move.d 0xffff,r3
|
||||
addu.w -1,r3
|
||||
test_cc 0 0 0 0
|
||||
dumpr3 ; 1fffe
|
||||
|
||||
move.d 0xffff,r3
|
||||
adds.b 0xff,r3
|
||||
test_cc 0 0 0 1
|
||||
dumpr3 ; fffe
|
||||
|
||||
move.d 0xffff,r3
|
||||
adds.w 0xffff,r3
|
||||
test_cc 0 0 0 1
|
||||
dumpr3 ; fffe
|
||||
|
||||
moveq -1,r3
|
||||
adds.b 0xff,r3
|
||||
test_cc 1 0 0 1
|
||||
dumpr3 ; fffffffe
|
||||
|
||||
moveq -1,r3
|
||||
adds.w 0xff,r3
|
||||
test_cc 0 0 0 1
|
||||
dumpr3 ; fe
|
||||
|
||||
moveq -1,r3
|
||||
adds.w 0xffff,r3
|
||||
test_cc 1 0 0 1
|
||||
dumpr3 ; fffffffe
|
||||
|
||||
move.d 0x78134452,r3
|
||||
addu.b 0x89,r3
|
||||
test_cc 0 0 0 0
|
||||
dumpr3 ; 781344db
|
||||
|
||||
move.d 0x78134452,r3
|
||||
adds.b 0x89,r3
|
||||
test_cc 0 0 0 1
|
||||
dumpr3 ; 781343db
|
||||
|
||||
move.d 0x78134452,r3
|
||||
addu.w 0xf789,r3
|
||||
test_cc 0 0 0 0
|
||||
dumpr3 ; 78143bdb
|
||||
|
||||
move.d 0x78134452,r3
|
||||
adds.w 0xf789,r3
|
||||
test_cc 0 0 0 1
|
||||
dumpr3 ; 78133bdb
|
||||
|
||||
move.d 0x7fffffee,r3
|
||||
addu.b 0xff,r3
|
||||
test_cc 1 0 1 0
|
||||
dumpr3 ; 800000ed
|
||||
|
||||
move.d 0x1,r3
|
||||
adds.w 0xffff,r3
|
||||
test_cc 0 1 0 1
|
||||
dumpr3 ; 0
|
||||
|
||||
quit
|
||||
106
sim/testsuite/sim/cris/asm/addxm.ms
Normal file
106
sim/testsuite/sim/cris/asm/addxm.ms
Normal file
@ -0,0 +1,106 @@
|
||||
# mach: crisv0 crisv3 crisv8 crisv10 crisv32
|
||||
# output: 1\n1\n101\n10001\n100fe\n1fffe\nfffe\nfffe\nfffffffe\nfe\nfffffffe\n781344db\n781343db\n78143bdb\n78133bdb\n800000ed\n0\n
|
||||
|
||||
.include "testutils.inc"
|
||||
.data
|
||||
x:
|
||||
.byte 0xff
|
||||
.word 0xffff
|
||||
.word 0xff
|
||||
.word 0xffff
|
||||
.byte 0x89
|
||||
.word 0xf789
|
||||
.byte 0xff
|
||||
.word 0xffff
|
||||
|
||||
start
|
||||
moveq 2,r3
|
||||
move.d x,r5
|
||||
adds.b [r5+],r3
|
||||
test_cc 0 0 0 1
|
||||
dumpr3 ; 1
|
||||
|
||||
moveq 2,r3
|
||||
adds.w [r5+],r3
|
||||
test_cc 0 0 0 1
|
||||
dumpr3 ; 1
|
||||
|
||||
moveq 2,r3
|
||||
subq 3,r5
|
||||
addu.b [r5+],r3
|
||||
test_cc 0 0 0 0
|
||||
dumpr3 ; 101
|
||||
|
||||
moveq 2,r3
|
||||
addu.w [r5+],r3
|
||||
subq 3,r5
|
||||
test_cc 0 0 0 0
|
||||
dumpr3 ; 10001
|
||||
|
||||
move.d 0xffff,r3
|
||||
addu.b [r5],r3
|
||||
test_cc 0 0 0 0
|
||||
dumpr3 ; 100fe
|
||||
|
||||
move.d 0xffff,r3
|
||||
addu.w [r5],r3
|
||||
test_cc 0 0 0 0
|
||||
dumpr3 ; 1fffe
|
||||
|
||||
move.d 0xffff,r3
|
||||
adds.b [r5],r3
|
||||
test_cc 0 0 0 1
|
||||
dumpr3 ; fffe
|
||||
|
||||
move.d 0xffff,r3
|
||||
adds.w [r5],r3
|
||||
test_cc 0 0 0 1
|
||||
dumpr3 ; fffe
|
||||
|
||||
moveq -1,r3
|
||||
adds.b [r5],r3
|
||||
test_cc 1 0 0 1
|
||||
addq 3,r5
|
||||
dumpr3 ; fffffffe
|
||||
|
||||
moveq -1,r3
|
||||
adds.w [r5+],r3
|
||||
test_cc 0 0 0 1
|
||||
dumpr3 ; fe
|
||||
|
||||
moveq -1,r3
|
||||
adds.w [r5+],r3
|
||||
test_cc 1 0 0 1
|
||||
dumpr3 ; fffffffe
|
||||
|
||||
move.d 0x78134452,r3
|
||||
addu.b [r5],r3
|
||||
test_cc 0 0 0 0
|
||||
dumpr3 ; 781344db
|
||||
|
||||
move.d 0x78134452,r3
|
||||
adds.b [r5+],r3
|
||||
test_cc 0 0 0 1
|
||||
dumpr3 ; 781343db
|
||||
|
||||
move.d 0x78134452,r3
|
||||
addu.w [r5],r3
|
||||
test_cc 0 0 0 0
|
||||
dumpr3 ; 78143bdb
|
||||
|
||||
move.d 0x78134452,r3
|
||||
adds.w [r5+],r3
|
||||
test_cc 0 0 0 1
|
||||
dumpr3 ; 78133bdb
|
||||
|
||||
move.d 0x7fffffee,r3
|
||||
addu.b [r5+],r3
|
||||
test_cc 1 0 1 0
|
||||
dumpr3 ; 800000ed
|
||||
|
||||
move.d 0x1,r3
|
||||
adds.w [r5+],r3
|
||||
test_cc 0 1 0 1
|
||||
dumpr3 ; 0
|
||||
|
||||
quit
|
||||
93
sim/testsuite/sim/cris/asm/addxr.ms
Normal file
93
sim/testsuite/sim/cris/asm/addxr.ms
Normal file
@ -0,0 +1,93 @@
|
||||
# mach: crisv0 crisv3 crisv8 crisv10 crisv32
|
||||
# output: 1\n1\n101\n10001\n100fe\n1fffe\nfffe\nfffe\nfffffffe\nfe\nfffffffe\n781344db\n781343db\n78143bdb\n78133bdb\n800000ed\n0\n
|
||||
|
||||
.include "testutils.inc"
|
||||
start
|
||||
moveq 2,r3
|
||||
move.d 0xff,r4
|
||||
adds.b r4,r3
|
||||
dumpr3 ; 1
|
||||
|
||||
moveq 2,r3
|
||||
move.d 0xffff,r4
|
||||
adds.w r4,r3
|
||||
dumpr3 ; 1
|
||||
|
||||
moveq 2,r3
|
||||
move.d 0xffff,r4
|
||||
addu.b r4,r3
|
||||
dumpr3 ; 101
|
||||
|
||||
moveq 2,r3
|
||||
move.d 0xffffffff,r4
|
||||
addu.w r4,r3
|
||||
dumpr3 ; 10001
|
||||
|
||||
move.d 0xffff,r3
|
||||
move.d 0xffffffff,r4
|
||||
addu.b r4,r3
|
||||
dumpr3 ; 100fe
|
||||
|
||||
move.d 0xffff,r3
|
||||
move.d 0xffffffff,r4
|
||||
addu.w r4,r3
|
||||
dumpr3 ; 1fffe
|
||||
|
||||
move.d 0xffff,r3
|
||||
move.d 0xff,r4
|
||||
adds.b r4,r3
|
||||
dumpr3 ; fffe
|
||||
|
||||
move.d 0xffff,r4
|
||||
move.d r4,r3
|
||||
adds.w r4,r3
|
||||
dumpr3 ; fffe
|
||||
|
||||
moveq -1,r3
|
||||
move.d 0xff,r4
|
||||
adds.b r4,r3
|
||||
dumpr3 ; fffffffe
|
||||
|
||||
moveq -1,r3
|
||||
move.d 0xff,r4
|
||||
adds.w r4,r3
|
||||
dumpr3 ; fe
|
||||
|
||||
moveq -1,r3
|
||||
move.d 0xffff,r4
|
||||
adds.w r4,r3
|
||||
dumpr3 ; fffffffe
|
||||
|
||||
move.d 0x5432f789,r4
|
||||
move.d 0x78134452,r3
|
||||
addu.b r4,r3
|
||||
dumpr3 ; 781344db
|
||||
|
||||
move.d 0x5432f789,r4
|
||||
move.d 0x78134452,r3
|
||||
adds.b r4,r3
|
||||
dumpr3 ; 781343db
|
||||
|
||||
move.d 0x5432f789,r4
|
||||
move.d 0x78134452,r3
|
||||
addu.w r4,r3
|
||||
dumpr3 ; 78143bdb
|
||||
|
||||
move.d 0x5432f789,r4
|
||||
move.d 0x78134452,r3
|
||||
adds.w r4,r3
|
||||
dumpr3 ; 78133bdb
|
||||
|
||||
move.d 0x7fffffee,r3
|
||||
move.d 0xff,r4
|
||||
addu.b r4,r3
|
||||
test_cc 1 0 1 0
|
||||
dumpr3 ; 800000ed
|
||||
|
||||
move.d 0x1,r3
|
||||
move.d 0xffff,r4
|
||||
adds.w r4,r3
|
||||
test_cc 0 1 0 1
|
||||
dumpr3 ; 0
|
||||
|
||||
quit
|
||||
80
sim/testsuite/sim/cris/asm/andc.ms
Normal file
80
sim/testsuite/sim/cris/asm/andc.ms
Normal file
@ -0,0 +1,80 @@
|
||||
# mach: crisv0 crisv3 crisv8 crisv10 crisv32
|
||||
# output: 2\n2\nffff\nffffffff\n50124400\nffff0002\n2\nfffff\nfedaff0f\n78134400\nffffff02\n2\nf02\n78134401\n78134400\n
|
||||
|
||||
.include "testutils.inc"
|
||||
start
|
||||
moveq -1,r3
|
||||
and.d 2,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; 2
|
||||
|
||||
moveq 2,r3
|
||||
and.d -1,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; 2
|
||||
|
||||
move.d 0xffff,r3
|
||||
and.d 0xffff,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; ffff
|
||||
|
||||
moveq -1,r3
|
||||
and.d -1,r3
|
||||
test_move_cc 1 0 0 0
|
||||
dumpr3 ; ffffffff
|
||||
|
||||
move.d 0x78134452,r3
|
||||
and.d 0x5432f789,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; 50124400
|
||||
|
||||
moveq -1,r3
|
||||
and.w 2,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; ffff0002
|
||||
|
||||
moveq 2,r3
|
||||
and.w -1,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; 2
|
||||
|
||||
move.d 0xfffff,r3
|
||||
and.w 0xffff,r3
|
||||
test_move_cc 1 0 0 0
|
||||
dumpr3 ; fffff
|
||||
|
||||
move.d 0xfedaffaf,r3
|
||||
and.w 0xff5f,r3
|
||||
test_move_cc 1 0 0 0
|
||||
dumpr3 ; fedaff0f
|
||||
|
||||
move.d 0x78134452,r3
|
||||
and.w 0xf789,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; 78134400
|
||||
|
||||
moveq -1,r3
|
||||
and.b 2,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; ffffff02
|
||||
|
||||
moveq 2,r3
|
||||
and.b -1,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; 2
|
||||
|
||||
move.d 0xfa7,r3
|
||||
and.b 0x5a,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; f02
|
||||
|
||||
move.d 0x78134453,r3
|
||||
and.b 0x89,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; 78134401
|
||||
|
||||
and.b 0,r3
|
||||
test_move_cc 0 1 0 0
|
||||
dumpr3 ; 78134400
|
||||
|
||||
quit
|
||||
90
sim/testsuite/sim/cris/asm/andm.ms
Normal file
90
sim/testsuite/sim/cris/asm/andm.ms
Normal file
@ -0,0 +1,90 @@
|
||||
# mach: crisv0 crisv3 crisv8 crisv10 crisv32
|
||||
# output: 2\n2\nffff\nffffffff\n50124400\nffff0002\n2\nfffff\nfedaff0f\n78134400\nffffff02\n2\nf02\n78134401\n78134400\n
|
||||
|
||||
.include "testutils.inc"
|
||||
.data
|
||||
x:
|
||||
.dword 2,-1,0xffff,-1,0x5432f789
|
||||
.word 2,-1,0xffff,0xff5f,0xf789
|
||||
.byte 2,-1,0x5a,0x89,0
|
||||
|
||||
start
|
||||
moveq -1,r3
|
||||
move.d x,r5
|
||||
and.d [r5+],r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; 2
|
||||
|
||||
moveq 2,r3
|
||||
and.d [r5],r3
|
||||
test_move_cc 0 0 0 0
|
||||
addq 4,r5
|
||||
dumpr3 ; 2
|
||||
|
||||
move.d 0xffff,r3
|
||||
and.d [r5+],r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; ffff
|
||||
|
||||
moveq -1,r3
|
||||
and.d [r5+],r3
|
||||
test_move_cc 1 0 0 0
|
||||
dumpr3 ; ffffffff
|
||||
|
||||
move.d 0x78134452,r3
|
||||
and.d [r5+],r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; 50124400
|
||||
|
||||
moveq -1,r3
|
||||
and.w [r5+],r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; ffff0002
|
||||
|
||||
moveq 2,r3
|
||||
and.w [r5+],r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; 2
|
||||
|
||||
move.d 0xfffff,r3
|
||||
and.w [r5],r3
|
||||
test_move_cc 1 0 0 0
|
||||
addq 2,r5
|
||||
dumpr3 ; fffff
|
||||
|
||||
move.d 0xfedaffaf,r3
|
||||
and.w [r5+],r3
|
||||
test_move_cc 1 0 0 0
|
||||
dumpr3 ; fedaff0f
|
||||
|
||||
move.d 0x78134452,r3
|
||||
and.w [r5+],r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; 78134400
|
||||
|
||||
moveq -1,r3
|
||||
and.b [r5],r3
|
||||
test_move_cc 0 0 0 0
|
||||
addq 1,r5
|
||||
dumpr3 ; ffffff02
|
||||
|
||||
moveq 2,r3
|
||||
and.b [r5+],r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; 2
|
||||
|
||||
move.d 0xfa7,r3
|
||||
and.b [r5+],r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; f02
|
||||
|
||||
move.d 0x78134453,r3
|
||||
and.b [r5+],r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; 78134401
|
||||
|
||||
and.b [r5],r3
|
||||
test_move_cc 0 1 0 0
|
||||
dumpr3 ; 78134400
|
||||
|
||||
quit
|
||||
46
sim/testsuite/sim/cris/asm/andq.ms
Normal file
46
sim/testsuite/sim/cris/asm/andq.ms
Normal file
@ -0,0 +1,46 @@
|
||||
# mach: crisv0 crisv3 crisv8 crisv10 crisv32
|
||||
# output: 2\n2\nffff\nffffffff\n1f\nffffffe0\n78134452\n0\n
|
||||
|
||||
.include "testutils.inc"
|
||||
start
|
||||
moveq -1,r3
|
||||
andq 2,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; 2
|
||||
|
||||
moveq 2,r3
|
||||
andq -1,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; 2
|
||||
|
||||
move.d 0xffff,r3
|
||||
andq -1,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; ffff
|
||||
|
||||
moveq -1,r3
|
||||
andq -1,r3
|
||||
test_move_cc 1 0 0 0
|
||||
dumpr3 ; ffffffff
|
||||
|
||||
moveq -1,r3
|
||||
andq 31,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; 1f
|
||||
|
||||
moveq -1,r3
|
||||
andq -32,r3
|
||||
test_move_cc 1 0 0 0
|
||||
dumpr3 ; ffffffe0
|
||||
|
||||
move.d 0x78134457,r3
|
||||
andq -14,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; 78134452
|
||||
|
||||
moveq 0,r3
|
||||
andq -14,r3
|
||||
test_move_cc 0 1 0 0
|
||||
dumpr3 ; 0
|
||||
|
||||
quit
|
||||
95
sim/testsuite/sim/cris/asm/andr.ms
Normal file
95
sim/testsuite/sim/cris/asm/andr.ms
Normal file
@ -0,0 +1,95 @@
|
||||
# mach: crisv0 crisv3 crisv8 crisv10 crisv32
|
||||
# output: 2\n2\nffff\nffffffff\n50124400\nffff0002\n2\nfffff\nfedaff0f\n78134400\nffffff02\n2\nf02\n78134401\n78134400\n
|
||||
|
||||
.include "testutils.inc"
|
||||
start
|
||||
moveq -1,r3
|
||||
moveq 2,r4
|
||||
and.d r4,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; 2
|
||||
|
||||
moveq 2,r3
|
||||
moveq -1,r4
|
||||
and.d r4,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; 2
|
||||
|
||||
move.d 0xffff,r4
|
||||
move.d r4,r3
|
||||
and.d r4,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; ffff
|
||||
|
||||
moveq -1,r4
|
||||
move.d r4,r3
|
||||
and.d r4,r3
|
||||
test_move_cc 1 0 0 0
|
||||
dumpr3 ; ffffffff
|
||||
|
||||
move.d 0x5432f789,r4
|
||||
move.d 0x78134452,r3
|
||||
and.d r4,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; 50124400
|
||||
|
||||
moveq -1,r3
|
||||
moveq 2,r4
|
||||
and.w r4,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; ffff0002
|
||||
|
||||
moveq 2,r3
|
||||
moveq -1,r4
|
||||
and.w r4,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; 2
|
||||
|
||||
move.d 0xfffff,r3
|
||||
move.d 0xffff,r4
|
||||
and.w r4,r3
|
||||
test_move_cc 1 0 0 0
|
||||
dumpr3 ; fffff
|
||||
|
||||
move.d 0xfedaffaf,r3
|
||||
move.d 0xff5f,r4
|
||||
and.w r4,r3
|
||||
test_move_cc 1 0 0 0
|
||||
dumpr3 ; fedaff0f
|
||||
|
||||
move.d 0x5432f789,r4
|
||||
move.d 0x78134452,r3
|
||||
and.w r4,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; 78134400
|
||||
|
||||
moveq -1,r3
|
||||
moveq 2,r4
|
||||
and.b r4,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; ffffff02
|
||||
|
||||
moveq 2,r3
|
||||
moveq -1,r4
|
||||
and.b r4,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; 2
|
||||
|
||||
move.d 0x5a,r4
|
||||
move.d 0xfa7,r3
|
||||
and.b r4,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; f02
|
||||
|
||||
move.d 0x5432f789,r4
|
||||
move.d 0x78134453,r3
|
||||
and.b r4,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; 78134401
|
||||
|
||||
moveq 0,r7
|
||||
and.b r7,r3
|
||||
test_move_cc 0 1 0 0
|
||||
dumpr3 ; 78134400
|
||||
|
||||
quit
|
||||
46
sim/testsuite/sim/cris/asm/asm.exp
Normal file
46
sim/testsuite/sim/cris/asm/asm.exp
Normal file
@ -0,0 +1,46 @@
|
||||
# Copyright (C) 2005 Free Software Foundation, Inc.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify
|
||||
# it under the terms of the GNU General Public License as published by
|
||||
# the Free Software Foundation; either version 2 of the License, or
|
||||
# (at your option) any later version.
|
||||
#
|
||||
# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program; if not, write to the Free Software
|
||||
# Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
|
||||
|
||||
# Miscellaneous CRIS simulator testcases in assembly code.
|
||||
|
||||
if [istarget cris*-*-*] {
|
||||
global ASFLAGS_FOR_TARGET
|
||||
# All machines we test and the corresponding assembler option. Needs
|
||||
# update if we build the simulator for crisv0 crisv3 and crisv8 too.
|
||||
|
||||
set combos {{"crisv10" "--march=v10 --no-mul-bug-abort"}
|
||||
{"crisv32" "--march=v32"}}
|
||||
|
||||
# We need to pass different assembler flags for each machine.
|
||||
# Specifying it here rather than adding a specifier to each and every
|
||||
# test-file is preferrable.
|
||||
|
||||
foreach combo $combos {
|
||||
set mach [lindex $combo 0]
|
||||
set ASFLAGS_FOR_TARGET "[lindex $combo 1]"
|
||||
|
||||
# The .ms suffix is for "miscellaneous .s".
|
||||
foreach src [lsort [glob -nocomplain $srcdir/$subdir/*.ms]] {
|
||||
# If we're only testing specific files and this isn't one of them,
|
||||
# skip it.
|
||||
if ![runtest_file_p $runtests $src] {
|
||||
continue
|
||||
}
|
||||
|
||||
run_sim_test $src $mach
|
||||
}
|
||||
}
|
||||
}
|
||||
228
sim/testsuite/sim/cris/asm/asr.ms
Normal file
228
sim/testsuite/sim/cris/asm/asr.ms
Normal file
@ -0,0 +1,228 @@
|
||||
# mach: crisv0 crisv3 crisv8 crisv10 crisv32
|
||||
# output: ffffffff\n1\nffffffff\nffffffff\n5a67f\nffffffff\nffffffff\nffffffff\nf699fc67\nffffffff\n1\nffffffff\nffffffff\n5a67f\nda67ffff\nda67ffff\nda67ffff\nda67fc67\nffffffff\nffffffff\n1\nffffffff\nffffffff\n5a670007\nda67f1ff\nda67f1ff\nda67f1ff\nda67f1e7\nffffffff\nffffffff\n1\nffffffff\nffffffff\nffffffff\n5a67f1ff\n5a67f1f9\n0\n5a670000\n
|
||||
|
||||
.include "testutils.inc"
|
||||
start
|
||||
moveq -1,r3
|
||||
asrq 0,r3
|
||||
test_move_cc 1 0 0 0
|
||||
dumpr3 ; ffffffff
|
||||
|
||||
moveq 2,r3
|
||||
asrq 1,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; 1
|
||||
|
||||
moveq -1,r3
|
||||
asrq 31,r3
|
||||
test_move_cc 1 0 0 0
|
||||
dumpr3 ; ffffffff
|
||||
|
||||
moveq -1,r3
|
||||
asrq 15,r3
|
||||
test_move_cc 1 0 0 0
|
||||
dumpr3 ; ffffffff
|
||||
|
||||
move.d 0x5a67f19f,r3
|
||||
asrq 12,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; 5a67f
|
||||
|
||||
move.d 0xda67f19f,r3
|
||||
move.d 31,r4
|
||||
asr.d r4,r3
|
||||
test_move_cc 1 0 0 0
|
||||
dumpr3 ; ffffffff
|
||||
|
||||
move.d 0xda67f19f,r3
|
||||
move.d 32,r4
|
||||
asr.d r4,r3
|
||||
test_move_cc 1 0 0 0
|
||||
dumpr3 ; ffffffff
|
||||
|
||||
move.d 0xda67f19f,r3
|
||||
move.d 33,r4
|
||||
asr.d r4,r3
|
||||
test_move_cc 1 0 0 0
|
||||
dumpr3 ; ffffffff
|
||||
|
||||
move.d 0xda67f19f,r3
|
||||
move.d 66,r4
|
||||
asr.d r4,r3
|
||||
test_move_cc 1 0 0 0
|
||||
dumpr3 ; f699fc67
|
||||
|
||||
moveq -1,r3
|
||||
moveq 0,r4
|
||||
asr.d r4,r3
|
||||
test_move_cc 1 0 0 0
|
||||
dumpr3 ; ffffffff
|
||||
|
||||
moveq 2,r3
|
||||
moveq 1,r4
|
||||
asr.d r4,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; 1
|
||||
|
||||
moveq -1,r3
|
||||
moveq 31,r4
|
||||
asr.d r4,r3
|
||||
test_move_cc 1 0 0 0
|
||||
dumpr3 ; ffffffff
|
||||
|
||||
moveq -1,r3
|
||||
moveq 15,r4
|
||||
asr.d r4,r3
|
||||
test_move_cc 1 0 0 0
|
||||
dumpr3 ; ffffffff
|
||||
|
||||
move.d 0x5a67f19f,r3
|
||||
moveq 12,r4
|
||||
asr.d r4,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; 5a67f
|
||||
|
||||
move.d 0xda67f19f,r3
|
||||
move.d 31,r4
|
||||
asr.w r4,r3
|
||||
test_move_cc 1 0 0 0
|
||||
dumpr3 ; da67ffff
|
||||
|
||||
move.d 0xda67f19f,r3
|
||||
move.d 32,r4
|
||||
asr.w r4,r3
|
||||
test_move_cc 1 0 0 0
|
||||
dumpr3 ; da67ffff
|
||||
|
||||
move.d 0xda67f19f,r3
|
||||
move.d 33,r4
|
||||
asr.w r4,r3
|
||||
test_move_cc 1 0 0 0
|
||||
dumpr3 ; da67ffff
|
||||
|
||||
move.d 0xda67f19f,r3
|
||||
move.d 66,r4
|
||||
asr.w r4,r3
|
||||
test_move_cc 1 0 0 0
|
||||
dumpr3 ; da67fc67
|
||||
|
||||
moveq -1,r3
|
||||
moveq 0,r4
|
||||
asr.w r4,r3
|
||||
test_move_cc 1 0 0 0
|
||||
dumpr3 ; ffffffff
|
||||
|
||||
moveq -1,r3
|
||||
moveq 1,r4
|
||||
asr.w r4,r3
|
||||
test_move_cc 1 0 0 0
|
||||
dumpr3 ; ffffffff
|
||||
|
||||
moveq 2,r3
|
||||
moveq 1,r4
|
||||
asr.w r4,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; 1
|
||||
|
||||
moveq -1,r3
|
||||
moveq 31,r4
|
||||
asr.w r4,r3
|
||||
test_move_cc 1 0 0 0
|
||||
dumpr3 ; ffffffff
|
||||
|
||||
moveq -1,r3
|
||||
moveq 15,r4
|
||||
asr.w r4,r3
|
||||
test_move_cc 1 0 0 0
|
||||
dumpr3 ; ffffffff
|
||||
|
||||
move.d 0x5a67719f,r3
|
||||
moveq 12,r4
|
||||
asr.w r4,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; 5a670007
|
||||
|
||||
move.d 0xda67f19f,r3
|
||||
move.d 31,r4
|
||||
asr.b r4,r3
|
||||
test_move_cc 1 0 0 0
|
||||
dumpr3 ; da67f1ff
|
||||
|
||||
move.d 0xda67f19f,r3
|
||||
move.d 32,r4
|
||||
asr.b r4,r3
|
||||
test_move_cc 1 0 0 0
|
||||
dumpr3 ; da67f1ff
|
||||
|
||||
move.d 0xda67f19f,r3
|
||||
move.d 33,r4
|
||||
asr.b r4,r3
|
||||
test_move_cc 1 0 0 0
|
||||
dumpr3 ; da67f1ff
|
||||
|
||||
move.d 0xda67f19f,r3
|
||||
move.d 66,r4
|
||||
asr.b r4,r3
|
||||
test_move_cc 1 0 0 0
|
||||
dumpr3 ; da67f1e7
|
||||
|
||||
moveq -1,r3
|
||||
moveq 0,r4
|
||||
asr.b r4,r3
|
||||
test_move_cc 1 0 0 0
|
||||
dumpr3 ; ffffffff
|
||||
|
||||
moveq -1,r3
|
||||
moveq 1,r4
|
||||
asr.b r4,r3
|
||||
test_move_cc 1 0 0 0
|
||||
dumpr3 ; ffffffff
|
||||
|
||||
moveq 2,r3
|
||||
moveq 1,r4
|
||||
asr.b r4,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; 1
|
||||
|
||||
moveq -1,r3
|
||||
moveq 31,r4
|
||||
asr.b r4,r3
|
||||
test_move_cc 1 0 0 0
|
||||
dumpr3 ; ffffffff
|
||||
|
||||
moveq -1,r3
|
||||
moveq 15,r4
|
||||
asr.b r4,r3
|
||||
test_move_cc 1 0 0 0
|
||||
dumpr3 ; ffffffff
|
||||
|
||||
moveq -1,r3
|
||||
moveq 7,r4
|
||||
asr.b r4,r3
|
||||
test_move_cc 1 0 0 0
|
||||
dumpr3 ; ffffffff
|
||||
|
||||
move.d 0x5a67f19f,r3
|
||||
moveq 12,r4
|
||||
asr.b r4,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; 5a67f1ff
|
||||
|
||||
move.d 0x5a67f19f,r3
|
||||
moveq 4,r4
|
||||
asr.b r4,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; 5a67f1f9
|
||||
|
||||
move.d 0x5a67f19f,r3
|
||||
asrq 31,r3
|
||||
test_move_cc 0 1 0 0
|
||||
dumpr3 ; 0
|
||||
|
||||
move.d 0x5a67419f,r3
|
||||
moveq 16,r4
|
||||
asr.w r4,r3
|
||||
test_move_cc 0 1 0 0
|
||||
dumpr3 ; 5a670000
|
||||
|
||||
quit
|
||||
93
sim/testsuite/sim/cris/asm/ba.ms
Normal file
93
sim/testsuite/sim/cris/asm/ba.ms
Normal file
@ -0,0 +1,93 @@
|
||||
# mach: crisv0 crisv3 crisv8 crisv10 crisv32
|
||||
# output: a\n
|
||||
|
||||
.include "testutils.inc"
|
||||
|
||||
.if ..asm.arch.cris.v32
|
||||
.set smalloffset,0
|
||||
.set largeoffset,0
|
||||
.else
|
||||
.set smalloffset,2
|
||||
.set largeoffset,4
|
||||
.endif
|
||||
|
||||
start
|
||||
moveq 0,r3
|
||||
|
||||
; Short forward branch.
|
||||
ba 0f
|
||||
addq 1,r3
|
||||
fail
|
||||
|
||||
; Max short forward branch.
|
||||
1:
|
||||
ba 2f
|
||||
addq 1,r3
|
||||
fail
|
||||
|
||||
; Short backward branch.
|
||||
0:
|
||||
ba 1b
|
||||
addq 1,r3
|
||||
fail
|
||||
|
||||
.space 254-2+smalloffset+1b-.,0
|
||||
moveq 0,r3
|
||||
|
||||
2:
|
||||
; Transit branch (long).
|
||||
ba 3f
|
||||
addq 1,r3
|
||||
fail
|
||||
|
||||
moveq 0,r3
|
||||
4:
|
||||
; Long forward branch.
|
||||
ba 5f
|
||||
addq 1,r3
|
||||
fail
|
||||
|
||||
.space 256-2-smalloffset+4b-.,0
|
||||
|
||||
moveq 0,r3
|
||||
|
||||
; Max short backward branch.
|
||||
3:
|
||||
ba 4b
|
||||
addq 1,r3
|
||||
fail
|
||||
|
||||
5:
|
||||
; Max long forward branch.
|
||||
ba 6f
|
||||
addq 1,r3
|
||||
fail
|
||||
|
||||
.space 32766+largeoffset-2+5b-.,0
|
||||
|
||||
moveq 0,r3
|
||||
6:
|
||||
; Transit branch.
|
||||
ba 7f
|
||||
addq 1,r3
|
||||
fail
|
||||
|
||||
moveq 0,r3
|
||||
9:
|
||||
dumpr3
|
||||
quit
|
||||
|
||||
; Transit branch.
|
||||
moveq 0,r3
|
||||
7:
|
||||
ba 8f
|
||||
addq 1,r3
|
||||
fail
|
||||
|
||||
.space 32768-largeoffset+9b-.,0
|
||||
|
||||
8:
|
||||
; Max long backward branch.
|
||||
ba 9b
|
||||
addq 1,r3
|
||||
fail
|
||||
24
sim/testsuite/sim/cris/asm/bare1.ms
Normal file
24
sim/testsuite/sim/cris/asm/bare1.ms
Normal file
@ -0,0 +1,24 @@
|
||||
# mach: crisv32
|
||||
# ld: --section-start=.text=0
|
||||
# output: 0\n0\n4\n42\n
|
||||
# sim: --cris-naked
|
||||
|
||||
; Check that we don't get signs of an initialized environment
|
||||
; when --cris-naked.
|
||||
|
||||
.include "testutils.inc"
|
||||
.text
|
||||
.global _start
|
||||
_start:
|
||||
nop
|
||||
nop
|
||||
start2:
|
||||
move.d $r10,$r3
|
||||
dumpr3
|
||||
move.d $sp,$r3
|
||||
dumpr3
|
||||
lapc start2,$r3
|
||||
dumpr3
|
||||
move.d 0x42,$r3
|
||||
dumpr3
|
||||
quit
|
||||
9
sim/testsuite/sim/cris/asm/bare2.ms
Normal file
9
sim/testsuite/sim/cris/asm/bare2.ms
Normal file
@ -0,0 +1,9 @@
|
||||
# mach: crisv32
|
||||
# output: 0\n0\n4\n42\n
|
||||
# sim: --cris-naked --target binary --architecture crisv32
|
||||
# ld: --oformat binary
|
||||
|
||||
; Check that we can run a naked binary with the same expected
|
||||
; results as an ELF "executable".
|
||||
|
||||
.include "bare1.ms"
|
||||
102
sim/testsuite/sim/cris/asm/bas.ms
Normal file
102
sim/testsuite/sim/cris/asm/bas.ms
Normal file
@ -0,0 +1,102 @@
|
||||
# mach: crisv32
|
||||
# output: 0\n0\n0\nfb349abc\n0\n12124243\n0\n0\neab5baad\n0\nefb37832\n
|
||||
|
||||
.include "testutils.inc"
|
||||
start
|
||||
x:
|
||||
setf zncv
|
||||
bsr 0f
|
||||
nop
|
||||
0:
|
||||
test_cc 1 1 1 1
|
||||
move srp,r3
|
||||
sub.d 0b,r3
|
||||
dumpr3
|
||||
|
||||
bas 1f,mof
|
||||
moveq 0,r0
|
||||
6:
|
||||
nop
|
||||
quit
|
||||
|
||||
2:
|
||||
move srp,r3
|
||||
sub.d 3f,r3
|
||||
dumpr3
|
||||
move srp,r4
|
||||
subq 4,r4
|
||||
move.d [r4],r3
|
||||
dumpr3
|
||||
|
||||
basc 4f,mof
|
||||
nop
|
||||
.dword 0x12124243
|
||||
7:
|
||||
nop
|
||||
quit
|
||||
|
||||
8:
|
||||
move mof,r3
|
||||
sub.d 7f,r3
|
||||
dumpr3
|
||||
|
||||
move mof,r4
|
||||
subq 4,r4
|
||||
move.d [r4],r3
|
||||
dumpr3
|
||||
|
||||
jasc 9f,mof
|
||||
nop
|
||||
.dword 0xefb37832
|
||||
0:
|
||||
quit
|
||||
|
||||
quit
|
||||
9:
|
||||
move mof,r3
|
||||
sub.d 0b,r3
|
||||
dumpr3
|
||||
|
||||
move mof,r4
|
||||
subq 4,r4
|
||||
move.d [r4],r3
|
||||
dumpr3
|
||||
|
||||
quit
|
||||
|
||||
4:
|
||||
move mof,r3
|
||||
sub.d 7b,r3
|
||||
dumpr3
|
||||
move mof,r4
|
||||
subq 4,r4
|
||||
move.d [r4],r3
|
||||
dumpr3
|
||||
basc 5f,bz
|
||||
moveq 0,r3
|
||||
.dword 0x7634aeba
|
||||
quit
|
||||
|
||||
.space 32770,0
|
||||
1:
|
||||
move mof,r3
|
||||
sub.d 6b,r3
|
||||
dumpr3
|
||||
|
||||
bsrc 2b
|
||||
nop
|
||||
.dword 0xfb349abc
|
||||
3:
|
||||
|
||||
quit
|
||||
|
||||
5:
|
||||
move mof,r3
|
||||
sub.d 7b,r3
|
||||
dumpr3
|
||||
move.d 8b,r6
|
||||
jasc r6,mof
|
||||
nop
|
||||
.dword 0xeab5baad
|
||||
7:
|
||||
quit
|
||||
181
sim/testsuite/sim/cris/asm/bccb.ms
Normal file
181
sim/testsuite/sim/cris/asm/bccb.ms
Normal file
@ -0,0 +1,181 @@
|
||||
# mach: crisv0 crisv3 crisv8 crisv10 crisv32
|
||||
# output: 1c\n
|
||||
|
||||
.include "testutils.inc"
|
||||
start
|
||||
moveq 0,r3
|
||||
|
||||
clearf nzvc
|
||||
setf nzv
|
||||
bcc 0f
|
||||
addq 1,r3
|
||||
fail
|
||||
|
||||
0:
|
||||
clearf nzvc
|
||||
setf nzv
|
||||
bcs dofail
|
||||
addq 1,r3
|
||||
|
||||
clearf nzvc
|
||||
setf ncv
|
||||
bne 1f
|
||||
addq 1,r3
|
||||
|
||||
dofail:
|
||||
fail
|
||||
|
||||
1:
|
||||
clearf nzvc
|
||||
setf ncv
|
||||
beq dofail
|
||||
addq 1,r3
|
||||
|
||||
clearf nzvc
|
||||
setf ncz
|
||||
bvc 2f
|
||||
addq 1,r3
|
||||
fail
|
||||
|
||||
2:
|
||||
clearf nzvc
|
||||
setf ncz
|
||||
bvs dofail
|
||||
addq 1,r3
|
||||
|
||||
clearf nzvc
|
||||
setf vcz
|
||||
bpl 3f
|
||||
addq 1,r3
|
||||
fail
|
||||
|
||||
3:
|
||||
clearf nzvc
|
||||
setf vcz
|
||||
bmi dofail
|
||||
addq 1,r3
|
||||
|
||||
clearf nzvc
|
||||
setf nv
|
||||
bls dofail
|
||||
addq 1,r3
|
||||
|
||||
clearf nzvc
|
||||
setf nv
|
||||
bhi 4f
|
||||
addq 1,r3
|
||||
fail
|
||||
|
||||
4:
|
||||
clearf nzvc
|
||||
setf zc
|
||||
bge 5f
|
||||
addq 1,r3
|
||||
fail
|
||||
|
||||
5:
|
||||
clearf nzvc
|
||||
setf zc
|
||||
blt dofail
|
||||
addq 1,r3
|
||||
|
||||
clearf nzvc
|
||||
setf c
|
||||
bgt 6f
|
||||
addq 1,r3
|
||||
fail
|
||||
|
||||
6:
|
||||
clearf nzvc
|
||||
setf c
|
||||
ble dofail
|
||||
addq 1,r3
|
||||
|
||||
;;;;;;;;;;
|
||||
|
||||
setf nzvc
|
||||
clearf nzv
|
||||
bcc dofail
|
||||
addq 1,r3
|
||||
|
||||
setf nzvc
|
||||
clearf nzv
|
||||
bcs 0f
|
||||
addq 1,r3
|
||||
fail
|
||||
|
||||
0:
|
||||
setf nzvc
|
||||
clearf ncv
|
||||
bne dofail
|
||||
addq 1,r3
|
||||
|
||||
setf nzvc
|
||||
clearf ncv
|
||||
beq 1f
|
||||
addq 1,r3
|
||||
fail
|
||||
|
||||
1:
|
||||
setf nzvc
|
||||
clearf ncz
|
||||
bvc dofail
|
||||
addq 1,r3
|
||||
|
||||
setf nzvc
|
||||
clearf ncz
|
||||
bvs 2f
|
||||
addq 1,r3
|
||||
fail
|
||||
|
||||
2:
|
||||
setf nzvc
|
||||
clearf vcz
|
||||
bpl dofail
|
||||
addq 1,r3
|
||||
|
||||
setf nzvc
|
||||
clearf vcz
|
||||
bmi 3f
|
||||
addq 1,r3
|
||||
fail
|
||||
|
||||
3:
|
||||
setf nzvc
|
||||
clearf nv
|
||||
bls 4f
|
||||
addq 1,r3
|
||||
fail
|
||||
|
||||
4:
|
||||
setf nzvc
|
||||
clearf nv
|
||||
bhi dofail
|
||||
addq 1,r3
|
||||
|
||||
setf zvc
|
||||
clearf nzc
|
||||
bge dofail
|
||||
addq 1,r3
|
||||
|
||||
setf nzc
|
||||
clearf vzc
|
||||
blt 5f
|
||||
addq 1,r3
|
||||
fail
|
||||
|
||||
5:
|
||||
setf nzvc
|
||||
clearf c
|
||||
bgt dofail
|
||||
addq 1,r3
|
||||
|
||||
setf nzvc
|
||||
clearf c
|
||||
ble 6f
|
||||
addq 1,r3
|
||||
fail
|
||||
|
||||
6:
|
||||
dumpr3
|
||||
quit
|
||||
57
sim/testsuite/sim/cris/asm/bdapc.ms
Normal file
57
sim/testsuite/sim/cris/asm/bdapc.ms
Normal file
@ -0,0 +1,57 @@
|
||||
# mach: crisv0 crisv3 crisv8 crisv10
|
||||
# output: 4455aa77\n4455aa77\nee19ccff\n88ccee19\nff22\n4455aa77\nff224455\n55aa77ff\n
|
||||
|
||||
.include "testutils.inc"
|
||||
.data
|
||||
x:
|
||||
.dword 0x55aa77ff
|
||||
.dword 0xccff2244
|
||||
.dword 0x88ccee19
|
||||
.dword 0xb232765a
|
||||
|
||||
start
|
||||
moveq -1,r0
|
||||
moveq -1,r2
|
||||
move.d x-32768,r5
|
||||
move.d [r5+32769],r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; 4455aa77
|
||||
|
||||
addu.w 32770,r5
|
||||
bdap.w -1,r5
|
||||
move.d [r0],r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; 4455aa77
|
||||
|
||||
bdap.d 4,r5
|
||||
move.d [r2+],r3
|
||||
test_move_cc 1 0 0 0
|
||||
dumpr3 ; ee19ccff
|
||||
|
||||
bdap.b 2,r2
|
||||
move.d [r3],r3
|
||||
test_move_cc 1 0 0 0
|
||||
dumpr3 ; 88ccee19
|
||||
|
||||
bdap.b 3,r5
|
||||
movu.w [r4+],r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; ff22
|
||||
|
||||
bdap.b -4,r4
|
||||
move.d [r6+],r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; 4455aa77
|
||||
|
||||
bdap.w 2,r6
|
||||
move.d [r3],r9
|
||||
test_move_cc 1 0 0 0
|
||||
dumpr3 ; ff224455
|
||||
|
||||
add.d 76789885,r5
|
||||
bdap.d -76789887,r5
|
||||
move.d [r3],r9
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; 55aa77ff
|
||||
|
||||
quit
|
||||
56
sim/testsuite/sim/cris/asm/bdapm.ms
Normal file
56
sim/testsuite/sim/cris/asm/bdapm.ms
Normal file
@ -0,0 +1,56 @@
|
||||
# mach: crisv0 crisv3 crisv8 crisv10
|
||||
# output: 4455aa77\n4455aa77\nee19ccff\nff22\n4455aa77\nff224455\n55aa77ff\n
|
||||
|
||||
.include "testutils.inc"
|
||||
.data
|
||||
x:
|
||||
.dword 0x55aa77ff
|
||||
.dword 0xccff2244
|
||||
.dword 0x88ccee19
|
||||
y:
|
||||
.dword 32769
|
||||
.word -1
|
||||
.dword 5
|
||||
.byte 3,-4
|
||||
.word 2
|
||||
.dword -76789887
|
||||
|
||||
start
|
||||
moveq -1,r0
|
||||
move.d x-32768,r5
|
||||
move.d y,r13
|
||||
bdap.d [r13+],r5
|
||||
move.d [r3],r9
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; 4455aa77
|
||||
|
||||
addu.w 32770,r5
|
||||
bdap.w [r13+],r5
|
||||
move.d [r9+],r3
|
||||
dumpr3 ; 4455aa77
|
||||
|
||||
bdap.d [r13],r9
|
||||
move.d [r3],r7
|
||||
addq 4,r13
|
||||
dumpr3 ; ee19ccff
|
||||
|
||||
bdap.b [r13+],r5
|
||||
movu.w [r7+],r3
|
||||
dumpr3 ; ff22
|
||||
|
||||
bdap.b [r13],r7
|
||||
move.d [r7+],r3
|
||||
addq 1,r13
|
||||
dumpr3 ; 4455aa77
|
||||
|
||||
bdap.w [r13],r7
|
||||
move.d [r3],r3
|
||||
addq 2,r13
|
||||
dumpr3 ; ff224455
|
||||
|
||||
add.d 76789885,r5
|
||||
bdap.d [r13+],r5
|
||||
move.d [r3],r9
|
||||
dumpr3 ; 55aa77ff
|
||||
|
||||
quit
|
||||
29
sim/testsuite/sim/cris/asm/bdapq.ms
Normal file
29
sim/testsuite/sim/cris/asm/bdapq.ms
Normal file
@ -0,0 +1,29 @@
|
||||
# mach: crisv0 crisv3 crisv8 crisv10
|
||||
# output: ccff2244\n88ccee19\n55aa77ff\n19cc\n0\n
|
||||
|
||||
.include "testutils.inc"
|
||||
.data
|
||||
x:
|
||||
.dword 0x55aa77ff
|
||||
.dword 0xccff2244
|
||||
.dword 0x88ccee19
|
||||
.dword 0
|
||||
start
|
||||
moveq -1,r0
|
||||
move.d x+4,r5
|
||||
move.d [r5+0],r3
|
||||
test_move_cc 1 0 0 0
|
||||
dumpr3 ; ccff2244
|
||||
move.d [r5=r5+4],r3
|
||||
test_move_cc 1 0 0 0
|
||||
dumpr3 ; 88ccee19
|
||||
move.d [r5=r5-8],r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; 55aa77ff
|
||||
movu.w [r5+7],r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; 19cc
|
||||
move.d [r5+12],r3
|
||||
test_move_cc 0 1 0 0
|
||||
dumpr3 ; 0
|
||||
quit
|
||||
30
sim/testsuite/sim/cris/asm/bdapqpc.ms
Normal file
30
sim/testsuite/sim/cris/asm/bdapqpc.ms
Normal file
@ -0,0 +1,30 @@
|
||||
# mach: crisv3 crisv8 crisv10
|
||||
# output: aaeebb11\nde378218\n
|
||||
|
||||
# Test that the special case "X [pc+I],Y" works, where I byte-sized.
|
||||
|
||||
.include "testutils.inc"
|
||||
start
|
||||
x:
|
||||
; FIXME: Gas bugs are making this a bit harder than necessary.
|
||||
; move.d [pc+y-(.+2)],r3
|
||||
move.d [pc+8],r3
|
||||
yy:
|
||||
jump zz
|
||||
|
||||
y:
|
||||
.dword 0xaaeebb11
|
||||
y2:
|
||||
.dword 0xde378218
|
||||
|
||||
zz:
|
||||
dumpr3
|
||||
jump z
|
||||
quit
|
||||
|
||||
; Check a negative offset.
|
||||
.space 50
|
||||
z:
|
||||
move.d [pc+y2-(.+2)],r3
|
||||
dumpr3
|
||||
quit
|
||||
56
sim/testsuite/sim/cris/asm/biap.ms
Normal file
56
sim/testsuite/sim/cris/asm/biap.ms
Normal file
@ -0,0 +1,56 @@
|
||||
# mach: crisv0 crisv3 crisv8 crisv10
|
||||
# output: 4455aa77\n4455aa77\nee19ccff\nff22\n4455aa77\nff224455\n55aa77ff\n
|
||||
|
||||
.include "testutils.inc"
|
||||
.data
|
||||
x:
|
||||
.dword 0x55aa77ff
|
||||
.dword 0xccff2244
|
||||
.dword 0x88ccee19
|
||||
|
||||
start
|
||||
moveq -1,r0
|
||||
move.d x-32768,r5
|
||||
move.d 32769,r6
|
||||
move.d [r5+r6.b],r3
|
||||
test_cc 0 0 0 0
|
||||
dumpr3 ; 4455aa77
|
||||
|
||||
addu.w 32771,r5
|
||||
moveq -1,r8
|
||||
move.d [r11=r5+r8.w],r3
|
||||
test_cc 0 0 0 0
|
||||
dumpr3 ; 4455aa77
|
||||
|
||||
moveq 5,r10
|
||||
move.d [r11+r10.b],r3
|
||||
test_cc 1 0 0 0
|
||||
dumpr3 ; ee19ccff
|
||||
|
||||
subq 1,r5
|
||||
move.d r5,r8
|
||||
subq 1,r8
|
||||
moveq 1,r9
|
||||
movu.w [r12=r8+r9.d],r3
|
||||
test_cc 0 0 0 0
|
||||
dumpr3 ; ff22
|
||||
|
||||
moveq -2,r11
|
||||
move.d [r13=r12+r11.w],r3
|
||||
test_cc 0 0 0 0
|
||||
dumpr3 ; 4455aa77
|
||||
|
||||
subq 18,r13
|
||||
moveq 5,r9
|
||||
move.d [r13+r9.d],r3
|
||||
test_cc 1 0 0 0
|
||||
dumpr3 ; ff224455
|
||||
|
||||
move.d r5,r7
|
||||
add.d 76789886,r7
|
||||
move.d -76789888/4,r12
|
||||
move.d [r7+r12.d],r3
|
||||
test_cc 0 0 0 0
|
||||
dumpr3 ; 55aa77ff
|
||||
|
||||
quit
|
||||
101
sim/testsuite/sim/cris/asm/boundc.ms
Normal file
101
sim/testsuite/sim/cris/asm/boundc.ms
Normal file
@ -0,0 +1,101 @@
|
||||
# mach: crisv0 crisv3 crisv8 crisv10 crisv32
|
||||
# output: 2\n2\nffff\nffffffff\n5432f789\n2\nffff\n2\nffff\nffff\nf789\n2\n2\nff\nff\nff\n89\n0\nff\n
|
||||
|
||||
.include "testutils.inc"
|
||||
start
|
||||
moveq -1,r3
|
||||
moveq 2,r4
|
||||
bound.d 2,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; 2
|
||||
|
||||
moveq 2,r3
|
||||
bound.d 0xffffffff,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; 2
|
||||
|
||||
move.d 0xffff,r3
|
||||
bound.d 0xffff,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; ffff
|
||||
|
||||
moveq -1,r3
|
||||
bound.d 0xffffffff,r3
|
||||
test_move_cc 1 0 0 0
|
||||
dumpr3 ; ffffffff
|
||||
|
||||
move.d 0x78134452,r3
|
||||
bound.d 0x5432f789,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; 5432f789
|
||||
|
||||
moveq -1,r3
|
||||
bound.w 2,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; 2
|
||||
|
||||
moveq -1,r3
|
||||
bound.w 0xffff,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; ffff
|
||||
|
||||
moveq 2,r3
|
||||
bound.w 0xffff,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; 2
|
||||
|
||||
move.d 0xffff,r3
|
||||
bound.w 0xffff,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; ffff
|
||||
|
||||
move.d 0xfedaffff,r3
|
||||
bound.w 0xffff,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; ffff
|
||||
|
||||
move.d 0x78134452,r3
|
||||
bound.w 0xf789,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; f789
|
||||
|
||||
moveq -1,r3
|
||||
bound.b 2,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; 2
|
||||
|
||||
moveq 2,r3
|
||||
bound.b 0xff,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; 2
|
||||
|
||||
moveq -1,r3
|
||||
bound.b 0xff,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; ff
|
||||
|
||||
move.d 0xff,r3
|
||||
bound.b 0xff,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; ff
|
||||
|
||||
move.d 0xfeda49ff,r3
|
||||
bound.b 0xff,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; ff
|
||||
|
||||
move.d 0x78134452,r3
|
||||
bound.b 0x89,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; 89
|
||||
|
||||
bound.w 0,r3
|
||||
test_move_cc 0 1 0 0
|
||||
dumpr3 ; 0
|
||||
|
||||
move.d 0xffff,r3
|
||||
bound.b -1,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; ff
|
||||
|
||||
quit
|
||||
105
sim/testsuite/sim/cris/asm/boundm.ms
Normal file
105
sim/testsuite/sim/cris/asm/boundm.ms
Normal file
@ -0,0 +1,105 @@
|
||||
# mach: crisv0 crisv3 crisv8 crisv10
|
||||
# output: 2\n2\nffff\nffffffff\n5432f789\n2\nffff\n2\nffff\nffff\nf789\n2\n2\nff\nff\nff\n89\n0\n
|
||||
|
||||
.include "testutils.inc"
|
||||
.data
|
||||
x:
|
||||
.dword 2,-1,0xffff,-1,0x5432f789
|
||||
.word 2,0xffff,0xf789
|
||||
.byte 2,0xff,0x89,0
|
||||
|
||||
start
|
||||
move.d x,r5
|
||||
|
||||
moveq -1,r3
|
||||
moveq 2,r4
|
||||
bound.d [r5+],r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; 2
|
||||
|
||||
moveq 2,r3
|
||||
bound.d [r5],r3
|
||||
test_move_cc 0 0 0 0
|
||||
addq 4,r5
|
||||
dumpr3 ; 2
|
||||
|
||||
move.d 0xffff,r3
|
||||
bound.d [r5+],r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; ffff
|
||||
|
||||
moveq -1,r3
|
||||
bound.d [r5+],r3
|
||||
test_move_cc 1 0 0 0
|
||||
dumpr3 ; ffffffff
|
||||
|
||||
move.d 0x78134452,r3
|
||||
bound.d [r5+],r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; 5432f789
|
||||
|
||||
moveq -1,r3
|
||||
bound.w [r5+],r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; 2
|
||||
|
||||
moveq -1,r3
|
||||
bound.w [r5],r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; ffff
|
||||
|
||||
moveq 2,r3
|
||||
bound.w [r5],r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; 2
|
||||
|
||||
move.d 0xffff,r3
|
||||
bound.w [r5],r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; ffff
|
||||
|
||||
move.d 0xfedaffff,r3
|
||||
bound.w [r5+],r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; ffff
|
||||
|
||||
move.d 0x78134452,r3
|
||||
bound.w [r5+],r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; f789
|
||||
|
||||
moveq -1,r3
|
||||
bound.b [r5+],r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; 2
|
||||
|
||||
moveq 2,r3
|
||||
bound.b [r5],r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; 2
|
||||
|
||||
moveq -1,r3
|
||||
bound.b [r5],r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; ff
|
||||
|
||||
move.d 0xff,r3
|
||||
bound.b [r5],r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; ff
|
||||
|
||||
move.d 0xfeda49ff,r3
|
||||
bound.b [r5+],r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; ff
|
||||
|
||||
move.d 0x78134452,r3
|
||||
bound.b [r5+],r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; 89
|
||||
|
||||
bound.b [r5],r3
|
||||
test_move_cc 0 1 0 0
|
||||
dumpr3 ; 0
|
||||
|
||||
quit
|
||||
15
sim/testsuite/sim/cris/asm/boundmv32.ms
Normal file
15
sim/testsuite/sim/cris/asm/boundmv32.ms
Normal file
@ -0,0 +1,15 @@
|
||||
# mach: crisv32
|
||||
# xerror:
|
||||
# output: program stopped with signal 4.\n
|
||||
.include "testutils.inc"
|
||||
|
||||
; Check that bound with a memory operand is invalid.
|
||||
start
|
||||
move.d 0f,r5
|
||||
move.d r5,r3
|
||||
.byte 0xd5,0x39 ; bound.d [r5],r3 -- we can't assemble it.
|
||||
pass
|
||||
|
||||
0:
|
||||
.dword 0b
|
||||
|
||||
125
sim/testsuite/sim/cris/asm/boundr.ms
Normal file
125
sim/testsuite/sim/cris/asm/boundr.ms
Normal file
@ -0,0 +1,125 @@
|
||||
# mach: crisv0 crisv3 crisv8 crisv10 crisv32
|
||||
# output: 2\n2\nffff\nffffffff\n5432f789\n2\n2\nffff\nffff\nffff\nf789\n2\n2\nff\nff\n89\nfeda4953\nfeda4962\n0\n0\n
|
||||
|
||||
.include "testutils.inc"
|
||||
start
|
||||
moveq -1,r3
|
||||
moveq 2,r4
|
||||
bound.d r4,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; 2
|
||||
|
||||
moveq 2,r3
|
||||
moveq -1,r4
|
||||
bound.d r4,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; 2
|
||||
|
||||
move.d 0xffff,r4
|
||||
move.d r4,r3
|
||||
bound.d r4,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; ffff
|
||||
|
||||
moveq -1,r4
|
||||
move.d r4,r3
|
||||
bound.d r4,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; ffffffff
|
||||
|
||||
move.d 0x5432f789,r4
|
||||
move.d 0x78134452,r3
|
||||
bound.d r4,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; 5432f789
|
||||
|
||||
moveq -1,r3
|
||||
moveq 2,r4
|
||||
bound.w r4,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; 2
|
||||
|
||||
moveq 2,r3
|
||||
moveq -1,r4
|
||||
bound.w r4,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; 2
|
||||
|
||||
moveq -1,r3
|
||||
bound.w r3,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; ffff
|
||||
|
||||
move.d 0xffff,r4
|
||||
move.d r4,r3
|
||||
bound.w r4,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; ffff
|
||||
|
||||
move.d 0xfedaffff,r4
|
||||
move.d r4,r3
|
||||
bound.w r4,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; ffff
|
||||
|
||||
move.d 0x5432f789,r4
|
||||
move.d 0x78134452,r3
|
||||
bound.w r4,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; f789
|
||||
|
||||
moveq -1,r3
|
||||
moveq 2,r4
|
||||
bound.b r4,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; 2
|
||||
|
||||
moveq 2,r3
|
||||
moveq -1,r4
|
||||
bound.b r4,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; 2
|
||||
|
||||
move.d 0xff,r4
|
||||
move.d r4,r3
|
||||
bound.b r4,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; ff
|
||||
|
||||
move.d 0xfeda49ff,r4
|
||||
move.d r4,r3
|
||||
bound.b r4,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; ff
|
||||
|
||||
move.d 0x5432f789,r4
|
||||
move.d 0x78134452,r3
|
||||
bound.b r4,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; 89
|
||||
|
||||
move.d 0xfeda4956,r3
|
||||
move.d 0xfeda4953,r4
|
||||
bound.d r4,r3
|
||||
test_move_cc 1 0 0 0
|
||||
dumpr3 ; feda4953
|
||||
|
||||
move.d 0xfeda4962,r3
|
||||
move.d 0xfeda4963,r4
|
||||
bound.d r4,r3
|
||||
test_move_cc 1 0 0 0
|
||||
dumpr3 ; feda4962
|
||||
|
||||
move.d 0xfeda4956,r3
|
||||
move.d 0,r4
|
||||
bound.d r4,r3
|
||||
test_move_cc 0 1 0 0
|
||||
dumpr3 ; 0
|
||||
|
||||
move.d 0xfeda4956,r4
|
||||
move.d 0,r3
|
||||
bound.d r4,r3
|
||||
test_move_cc 0 1 0 0
|
||||
dumpr3 ; 0
|
||||
|
||||
quit
|
||||
15
sim/testsuite/sim/cris/asm/break.ms
Normal file
15
sim/testsuite/sim/cris/asm/break.ms
Normal file
@ -0,0 +1,15 @@
|
||||
# mach: crisv3 crisv8 crisv10 crisv32
|
||||
# sim: --trace-core=on
|
||||
# ld: --section-start=.text=0
|
||||
# output: read-2 exec:0x00000002 -> 0x05b0\nread-2 exec:0x00000004 -> 0xe93f\n
|
||||
|
||||
; First test: Must exit gracefully.
|
||||
|
||||
.include "testutils.inc"
|
||||
|
||||
; This first insn isn't executed (it's a filler); it would fail
|
||||
; ungracefully if executed.
|
||||
|
||||
startnostack
|
||||
setf
|
||||
quit
|
||||
87
sim/testsuite/sim/cris/asm/btst.ms
Normal file
87
sim/testsuite/sim/cris/asm/btst.ms
Normal file
@ -0,0 +1,87 @@
|
||||
# mach: crisv0 crisv3 crisv8 crisv10 crisv32
|
||||
# output: 1111\n
|
||||
|
||||
.include "testutils.inc"
|
||||
start
|
||||
clearf nzvc
|
||||
moveq -1,r3
|
||||
.if ..asm.arch.cris.v32
|
||||
.else
|
||||
setf vc
|
||||
.endif
|
||||
btstq 0,r3
|
||||
test_cc 1 0 0 0
|
||||
|
||||
moveq 2,r3
|
||||
btstq 1,r3
|
||||
test_cc 1 0 0 0
|
||||
|
||||
moveq 4,r3
|
||||
btstq 1,r3
|
||||
test_cc 0 1 0 0
|
||||
|
||||
moveq -1,r3
|
||||
btstq 31,r3
|
||||
test_cc 1 0 0 0
|
||||
|
||||
move.d 0x5a67f19f,r3
|
||||
btstq 12,r3
|
||||
test_cc 1 0 0 0
|
||||
|
||||
move.d 0xda67f19f,r3
|
||||
move.d 29,r4
|
||||
btst r4,r3
|
||||
test_cc 0 0 0 0
|
||||
|
||||
move.d 0xda67f19f,r3
|
||||
move.d 32,r4
|
||||
btst r4,r3
|
||||
test_cc 1 0 0 0
|
||||
|
||||
move.d 0xda67f191,r3
|
||||
move.d 33,r4
|
||||
btst r4,r3
|
||||
test_cc 0 0 0 0
|
||||
|
||||
moveq -1,r3
|
||||
moveq 0,r4
|
||||
btst r4,r3
|
||||
test_cc 1 0 0 0
|
||||
|
||||
moveq 2,r3
|
||||
moveq 1,r4
|
||||
btst r4,r3
|
||||
test_cc 1 0 0 0
|
||||
|
||||
moveq -1,r3
|
||||
moveq 31,r4
|
||||
btst r4,r3
|
||||
test_cc 1 0 0 0
|
||||
|
||||
moveq 4,r3
|
||||
btstq 1,r3
|
||||
test_cc 0 1 0 0
|
||||
|
||||
moveq -1,r3
|
||||
moveq 15,r4
|
||||
btst r4,r3
|
||||
test_cc 1 0 0 0
|
||||
|
||||
move.d 0x5a67f19f,r3
|
||||
moveq 12,r4
|
||||
btst r4,r3
|
||||
test_cc 1 0 0 0
|
||||
|
||||
move.d 0x5a678000,r3
|
||||
moveq 11,r4
|
||||
btst r4,r3
|
||||
test_cc 0 1 0 0
|
||||
|
||||
move.d 0x5a67f19f,r3
|
||||
btst r3,r3
|
||||
test_cc 0 0 0 0
|
||||
|
||||
move.d 0x1111,r3
|
||||
dumpr3
|
||||
|
||||
quit
|
||||
79
sim/testsuite/sim/cris/asm/ccr-v10.ms
Normal file
79
sim/testsuite/sim/cris/asm/ccr-v10.ms
Normal file
@ -0,0 +1,79 @@
|
||||
# mach: crisv10
|
||||
# output: ff\nff\n0\n0\n80\n40\n20\n10\n8\n4\n2\n1\n80\n40\n20\n10\n8\n4\n2\n1\n42\n
|
||||
|
||||
; Check that flag settings affect ccr and dccr and vice versa.
|
||||
|
||||
.include "testutils.inc"
|
||||
start
|
||||
clear.d r3
|
||||
setf mbixnzvc
|
||||
move ccr,r3
|
||||
dumpr3
|
||||
|
||||
clear.d r3
|
||||
setf mbixnzvc
|
||||
move dccr,r3
|
||||
dumpr3
|
||||
|
||||
clear.d r3
|
||||
clearf mbixnzvc
|
||||
move ccr,r3
|
||||
dumpr3
|
||||
|
||||
clear.d r3
|
||||
clearf mbixnzvc
|
||||
move dccr,r3
|
||||
dumpr3
|
||||
|
||||
.macro testfr BIT REG
|
||||
clear.d r3
|
||||
clearf mbixnzvc
|
||||
setf \BIT
|
||||
move \REG,r3
|
||||
dumpr3
|
||||
.endm
|
||||
|
||||
testfr m ccr
|
||||
testfr b ccr
|
||||
testfr i ccr
|
||||
testfr x ccr
|
||||
testfr n ccr
|
||||
testfr z ccr
|
||||
testfr v ccr
|
||||
testfr c ccr
|
||||
|
||||
testfr m dccr
|
||||
testfr b dccr
|
||||
testfr i dccr
|
||||
testfr x dccr
|
||||
testfr n dccr
|
||||
testfr z dccr
|
||||
testfr v dccr
|
||||
testfr c dccr
|
||||
|
||||
; Check only the nzvc bits; do the other bits in special tests as they're
|
||||
; implemented.
|
||||
.macro test_get_cc N Z V C
|
||||
clearf znvc
|
||||
move ((\N << 3)|(\Z << 2)|(\V << 1)|\C),ccr
|
||||
test_cc \N \Z \V \C
|
||||
setf znvc
|
||||
move ((\N << 3)|(\Z << 2)|(\V << 1)|\C),dccr
|
||||
test_cc \N \Z \V \C
|
||||
move.d ((\N << 3)|(\Z << 2)|(\V << 1)|\C),r4
|
||||
setf znvc
|
||||
move r4,ccr
|
||||
test_cc \N \Z \V \C
|
||||
clearf znvc
|
||||
move r4,dccr
|
||||
test_cc \N \Z \V \C
|
||||
.endm
|
||||
|
||||
test_get_cc 1 0 0 0
|
||||
test_get_cc 0 1 0 0
|
||||
test_get_cc 0 0 1 0
|
||||
test_get_cc 0 0 0 1
|
||||
|
||||
move.d 0x42,r3
|
||||
dumpr3
|
||||
quit
|
||||
73
sim/testsuite/sim/cris/asm/ccs-v32.ms
Normal file
73
sim/testsuite/sim/cris/asm/ccs-v32.ms
Normal file
@ -0,0 +1,73 @@
|
||||
# mach: crisv32
|
||||
# output: bf\n0\n80\n20\n10\n8\n4\n2\n1\n40\nfade040\n3ade0040\nfade040\n42\n
|
||||
|
||||
; Check flag settings.
|
||||
|
||||
.include "testutils.inc"
|
||||
start
|
||||
clear.d r3
|
||||
setf pixnzvc ; Setting U(ser mode) would restrict tests of other flags.
|
||||
move ccs,r3
|
||||
dumpr3
|
||||
|
||||
clear.d r3
|
||||
clearf puixnzvc
|
||||
move ccs,r3
|
||||
dumpr3
|
||||
|
||||
.macro testf BIT
|
||||
clear.d r3
|
||||
clearf puixnzvc
|
||||
setf \BIT
|
||||
move ccs,r3
|
||||
dumpr3
|
||||
.endm
|
||||
|
||||
testf p
|
||||
testf i
|
||||
testf x
|
||||
testf n
|
||||
testf z
|
||||
testf v
|
||||
testf c
|
||||
testf u ; Can't test i-flag or clear u after this point.
|
||||
|
||||
.macro test_get_cc N Z V C
|
||||
clearf znvc
|
||||
move ((\N << 3)|(\Z << 2)|(\V << 1)|\C),ccs
|
||||
test_cc \N \Z \V \C
|
||||
setf znvc
|
||||
move ((\N << 3)|(\Z << 2)|(\V << 1)|\C),ccs
|
||||
test_cc \N \Z \V \C
|
||||
move.d ((\N << 3)|(\Z << 2)|(\V << 1)|\C),r4
|
||||
setf znvc
|
||||
move r4,ccs
|
||||
test_cc \N \Z \V \C
|
||||
clearf znvc
|
||||
move r4,ccs
|
||||
test_cc \N \Z \V \C
|
||||
.endm
|
||||
|
||||
test_get_cc 1 0 0 0
|
||||
test_get_cc 0 1 0 0
|
||||
test_get_cc 0 0 1 0
|
||||
test_get_cc 0 0 0 1
|
||||
|
||||
; Test that the U bit sticks.
|
||||
move 0x0fade000,ccs
|
||||
move ccs,r3
|
||||
dumpr3
|
||||
|
||||
; Check that the M and Q bits can't be set in user mode.
|
||||
move 0xfade0000,ccs
|
||||
move ccs,r3
|
||||
dumpr3
|
||||
|
||||
move 0x0fade000,ccs
|
||||
move ccs,r3
|
||||
dumpr3
|
||||
|
||||
move.d 0x42,r3
|
||||
dumpr3
|
||||
|
||||
quit
|
||||
12
sim/testsuite/sim/cris/asm/clearfv10.ms
Normal file
12
sim/testsuite/sim/cris/asm/clearfv10.ms
Normal file
@ -0,0 +1,12 @@
|
||||
# mach: crisv10
|
||||
# output: ef\n
|
||||
|
||||
; Check that "clearf x" doesn't trivially fail.
|
||||
|
||||
.include "testutils.inc"
|
||||
start
|
||||
setf mbixnzvc
|
||||
clearf x ; Actually, x would be cleared by almost-all other insns.
|
||||
move dccr,r3
|
||||
dumpr3
|
||||
quit
|
||||
12
sim/testsuite/sim/cris/asm/clearfv32.ms
Normal file
12
sim/testsuite/sim/cris/asm/clearfv32.ms
Normal file
@ -0,0 +1,12 @@
|
||||
# mach: crisv32
|
||||
# output: ef\n
|
||||
|
||||
; Check that "clearf x" doesn't trivially fail.
|
||||
|
||||
.include "testutils.inc"
|
||||
start
|
||||
setf puixnzvc
|
||||
clearf x ; Actually, x would be cleared by almost-all other insns.
|
||||
move ccs,r3
|
||||
dumpr3
|
||||
quit
|
||||
36
sim/testsuite/sim/cris/asm/clrjmp1.ms
Normal file
36
sim/testsuite/sim/cris/asm/clrjmp1.ms
Normal file
@ -0,0 +1,36 @@
|
||||
# mach: crisv3 crisv8 crisv10 crisv32
|
||||
# output: ffffff00\n
|
||||
|
||||
; A bug resulting in a non-effectual clear.b discovered running the GCC
|
||||
; testsuite; jump actually wrote to p0.
|
||||
|
||||
.include "testutils.inc"
|
||||
|
||||
start
|
||||
jump 1f
|
||||
nop
|
||||
.p2align 8
|
||||
1:
|
||||
move.d y,r4
|
||||
|
||||
.if 0 == ..asm.arch.cris.v32
|
||||
; There was a bug causing this insn to set special register p0
|
||||
; (byte-clear) to 8 (low 8 bits of location after insn).
|
||||
jump [r4+]
|
||||
.endif
|
||||
|
||||
1:
|
||||
move.d 0f,r4
|
||||
|
||||
; The corresponding bug would cause this insn too, to set p0.
|
||||
jump r4
|
||||
nop
|
||||
quit
|
||||
0:
|
||||
moveq -1,r3
|
||||
clear.b r3
|
||||
dumpr3
|
||||
quit
|
||||
|
||||
y:
|
||||
.dword 1b
|
||||
86
sim/testsuite/sim/cris/asm/cmpc.ms
Normal file
86
sim/testsuite/sim/cris/asm/cmpc.ms
Normal file
@ -0,0 +1,86 @@
|
||||
# mach: crisv0 crisv3 crisv8 crisv10 crisv32
|
||||
# output: ffffffff\n2\nffff\nffffffff\n78134452\nffffffff\n2\nffff\nfedaffff\n78134452\nffffffff\n2\nff\nfeda49ff\n78134452\n85649282\n
|
||||
|
||||
.include "testutils.inc"
|
||||
start
|
||||
moveq -1,r3
|
||||
cmp.d -2,r3
|
||||
test_cc 0 0 0 0
|
||||
dumpr3 ; ffffffff
|
||||
|
||||
moveq 2,r3
|
||||
cmp.d 1,r3
|
||||
test_cc 0 0 0 0
|
||||
dumpr3 ; 2
|
||||
|
||||
move.d 0xffff,r3
|
||||
cmp.d -0xffff,r3
|
||||
test_cc 0 0 0 1
|
||||
dumpr3 ; ffff
|
||||
|
||||
moveq -1,r3
|
||||
cmp.d 1,r3
|
||||
test_cc 1 0 0 0
|
||||
dumpr3 ; ffffffff
|
||||
|
||||
move.d 0x78134452,r3
|
||||
cmp.d -0x5432f789,r3
|
||||
test_cc 1 0 1 1
|
||||
dumpr3 ; 78134452
|
||||
|
||||
moveq -1,r3
|
||||
cmp.w -2,r3
|
||||
test_cc 0 0 0 0
|
||||
dumpr3 ; ffffffff
|
||||
|
||||
moveq 2,r3
|
||||
cmp.w 1,r3
|
||||
test_cc 0 0 0 0
|
||||
dumpr3 ; 2
|
||||
|
||||
move.d 0xffff,r3
|
||||
cmp.w 1,r3
|
||||
test_cc 1 0 0 0
|
||||
dumpr3 ; ffff
|
||||
|
||||
move.d 0xfedaffff,r3
|
||||
cmp.w 1,r3
|
||||
test_cc 1 0 0 0
|
||||
dumpr3 ; fedaffff
|
||||
|
||||
move.d 0x78134452,r3
|
||||
cmp.w 0x877,r3
|
||||
test_cc 0 0 0 0
|
||||
dumpr3 ; 78134452
|
||||
|
||||
moveq -1,r3
|
||||
cmp.b -2,r3
|
||||
test_cc 0 0 0 0
|
||||
dumpr3 ; ffffffff
|
||||
|
||||
moveq 2,r3
|
||||
cmp.b 1,r3
|
||||
test_cc 0 0 0 0
|
||||
dumpr3 ; 2
|
||||
|
||||
move.d 0xff,r3
|
||||
cmp.b 1,r3
|
||||
test_cc 1 0 0 0
|
||||
dumpr3 ; ff
|
||||
|
||||
move.d 0xfeda49ff,r3
|
||||
cmp.b 1,r3
|
||||
test_cc 1 0 0 0
|
||||
dumpr3 ; feda49ff
|
||||
|
||||
move.d 0x78134452,r3
|
||||
cmp.b 0x77,r3
|
||||
test_cc 1 0 0 1
|
||||
dumpr3 ; 78134452
|
||||
|
||||
move.d 0x85649282,r3
|
||||
cmp.b 0x82,r3
|
||||
test_cc 0 1 0 0
|
||||
dumpr3 ; 85649282
|
||||
|
||||
quit
|
||||
96
sim/testsuite/sim/cris/asm/cmpm.ms
Normal file
96
sim/testsuite/sim/cris/asm/cmpm.ms
Normal file
@ -0,0 +1,96 @@
|
||||
# mach: crisv0 crisv3 crisv8 crisv10 crisv32
|
||||
# output: ffffffff\n2\nffff\nffffffff\n78134452\nffffffff\n2\nffff\nfedaffff\n78134452\nffffffff\n2\nff\nfeda49ff\n78134452\n85649222\n
|
||||
|
||||
.include "testutils.inc"
|
||||
.data
|
||||
x:
|
||||
.dword -2,1,-0xffff,1,-0x5432f789
|
||||
.word -2,1,1,0x877
|
||||
.byte -2,1,0x77
|
||||
.byte 0x22
|
||||
|
||||
start
|
||||
moveq -1,r3
|
||||
move.d x,r5
|
||||
cmp.d [r5+],r3
|
||||
test_cc 0 0 0 0
|
||||
dumpr3 ; ffffffff
|
||||
|
||||
moveq 2,r3
|
||||
cmp.d [r5],r3
|
||||
test_cc 0 0 0 0
|
||||
addq 4,r5
|
||||
dumpr3 ; 2
|
||||
|
||||
move.d 0xffff,r3
|
||||
cmp.d [r5+],r3
|
||||
test_cc 0 0 0 1
|
||||
dumpr3 ; ffff
|
||||
|
||||
moveq -1,r3
|
||||
cmp.d [r5+],r3
|
||||
test_cc 1 0 0 0
|
||||
dumpr3 ; ffffffff
|
||||
|
||||
move.d 0x78134452,r3
|
||||
cmp.d [r5+],r3
|
||||
test_cc 1 0 1 1
|
||||
dumpr3 ; 78134452
|
||||
|
||||
moveq -1,r3
|
||||
cmp.w [r5+],r3
|
||||
test_cc 0 0 0 0
|
||||
dumpr3 ; ffffffff
|
||||
|
||||
moveq 2,r3
|
||||
cmp.w [r5+],r3
|
||||
test_cc 0 0 0 0
|
||||
dumpr3 ; 2
|
||||
|
||||
move.d 0xffff,r3
|
||||
cmp.w [r5],r3
|
||||
test_cc 1 0 0 0
|
||||
dumpr3 ; ffff
|
||||
|
||||
move.d 0xfedaffff,r3
|
||||
cmp.w [r5+],r3
|
||||
test_cc 1 0 0 0
|
||||
dumpr3 ; fedaffff
|
||||
|
||||
move.d 0x78134452,r3
|
||||
cmp.w [r5+],r3
|
||||
test_cc 0 0 0 0
|
||||
dumpr3 ; 78134452
|
||||
|
||||
moveq -1,r3
|
||||
cmp.b [r5],r3
|
||||
test_cc 0 0 0 0
|
||||
addq 1,r5
|
||||
dumpr3 ; ffffffff
|
||||
|
||||
moveq 2,r3
|
||||
cmp.b [r5],r3
|
||||
test_cc 0 0 0 0
|
||||
dumpr3 ; 2
|
||||
|
||||
move.d 0xff,r3
|
||||
cmp.b [r5],r3
|
||||
test_cc 1 0 0 0
|
||||
dumpr3 ; ff
|
||||
|
||||
move.d 0xfeda49ff,r3
|
||||
cmp.b [r5+],r3
|
||||
test_cc 1 0 0 0
|
||||
dumpr3 ; feda49ff
|
||||
|
||||
move.d 0x78134452,r3
|
||||
cmp.b [r5+],r3
|
||||
test_cc 1 0 0 1
|
||||
dumpr3 ; 78134452
|
||||
|
||||
move.d 0x85649222,r3
|
||||
cmp.b [r5],r3
|
||||
test_cc 0 1 0 0
|
||||
dumpr3 ; 85649222
|
||||
|
||||
quit
|
||||
75
sim/testsuite/sim/cris/asm/cmpq.ms
Normal file
75
sim/testsuite/sim/cris/asm/cmpq.ms
Normal file
@ -0,0 +1,75 @@
|
||||
# mach: crisv3 crisv8 crisv10 crisv32
|
||||
# output: 1\n1\n1\n1f\n1f\nffffffe1\nffffffe1\nffffffe0\n0\n0\nffffffff\nffffffff\n10000\n100\n5678900\n
|
||||
|
||||
.include "testutils.inc"
|
||||
start
|
||||
moveq 1,r3
|
||||
cmpq 1,r3
|
||||
test_cc 0 1 0 0
|
||||
dumpr3 ; 1
|
||||
|
||||
cmpq -1,r3
|
||||
test_cc 0 0 0 1
|
||||
dumpr3 ; 1
|
||||
|
||||
cmpq 31,r3
|
||||
test_cc 1 0 0 1
|
||||
dumpr3 ; 1
|
||||
|
||||
moveq 31,r3
|
||||
cmpq 31,r3
|
||||
test_cc 0 1 0 0
|
||||
dumpr3 ; 1f
|
||||
|
||||
cmpq -31,r3
|
||||
test_cc 0 0 0 1
|
||||
dumpr3 ; 1f
|
||||
|
||||
movs.b -31,r3
|
||||
cmpq -31,r3
|
||||
test_cc 0 1 0 0
|
||||
dumpr3 ; ffffffe1
|
||||
|
||||
cmpq -32,r3
|
||||
test_cc 0 0 0 0
|
||||
dumpr3 ; ffffffe1
|
||||
|
||||
movs.b -32,r3
|
||||
cmpq -32,r3
|
||||
test_cc 0 1 0 0
|
||||
dumpr3 ; ffffffe0
|
||||
|
||||
moveq 0,r3
|
||||
cmpq 1,r3
|
||||
test_cc 1 0 0 1
|
||||
dumpr3 ; 0
|
||||
|
||||
cmpq -32,r3
|
||||
test_cc 0 0 0 1
|
||||
dumpr3 ; 0
|
||||
|
||||
moveq -1,r3
|
||||
cmpq 1,r3
|
||||
test_cc 1 0 0 0
|
||||
dumpr3 ; ffffffff
|
||||
|
||||
cmpq -1,r3
|
||||
test_cc 0 1 0 0
|
||||
dumpr3 ; ffffffff
|
||||
|
||||
move.d 0x10000,r3
|
||||
cmpq 1,r3
|
||||
test_cc 0 0 0 0
|
||||
dumpr3 ; 10000
|
||||
|
||||
move.d 0x100,r3
|
||||
cmpq 1,r3
|
||||
test_cc 0 0 0 0
|
||||
dumpr3 ; 100
|
||||
|
||||
move.d 0x5678900,r3
|
||||
cmpq 7,r3
|
||||
test_cc 0 0 0 0
|
||||
dumpr3 ; 5678900
|
||||
|
||||
quit
|
||||
102
sim/testsuite/sim/cris/asm/cmpr.ms
Normal file
102
sim/testsuite/sim/cris/asm/cmpr.ms
Normal file
@ -0,0 +1,102 @@
|
||||
# mach: crisv0 crisv3 crisv8 crisv10 crisv32
|
||||
# output: ffffffff\n2\nffff\nffffffff\n78134452\nffffffff\n2\nffff\nfedaffff\n78134452\nffffffff\n2\nff\nfeda49ff\n78134452\n85649222\n
|
||||
|
||||
.include "testutils.inc"
|
||||
start
|
||||
moveq -1,r3
|
||||
moveq -2,r4
|
||||
cmp.d r4,r3
|
||||
test_cc 0 0 0 0
|
||||
dumpr3 ; ffffffff
|
||||
|
||||
moveq 2,r3
|
||||
moveq 1,r4
|
||||
cmp.d r4,r3
|
||||
test_cc 0 0 0 0
|
||||
dumpr3 ; 2
|
||||
|
||||
move.d 0xffff,r3
|
||||
move.d -0xffff,r4
|
||||
cmp.d r4,r3
|
||||
test_cc 0 0 0 1
|
||||
dumpr3 ; ffff
|
||||
|
||||
moveq 1,r4
|
||||
moveq -1,r3
|
||||
cmp.d r4,r3
|
||||
test_cc 1 0 0 0
|
||||
dumpr3 ; ffffffff
|
||||
|
||||
move.d -0x5432f789,r4
|
||||
move.d 0x78134452,r3
|
||||
cmp.d r4,r3
|
||||
test_cc 1 0 1 1
|
||||
dumpr3 ; 78134452
|
||||
|
||||
moveq -1,r3
|
||||
moveq -2,r4
|
||||
cmp.w r4,r3
|
||||
test_cc 0 0 0 0
|
||||
dumpr3 ; ffffffff
|
||||
|
||||
moveq 2,r3
|
||||
moveq 1,r4
|
||||
cmp.w r4,r3
|
||||
test_cc 0 0 0 0
|
||||
dumpr3 ; 2
|
||||
|
||||
move.d 0xffff,r3
|
||||
move.d -0xffff,r4
|
||||
cmp.w r4,r3
|
||||
test_cc 1 0 0 0
|
||||
dumpr3 ; ffff
|
||||
|
||||
move.d 0xfedaffff,r3
|
||||
move.d -0xfedaffff,r4
|
||||
cmp.w r4,r3
|
||||
test_cc 1 0 0 0
|
||||
dumpr3 ; fedaffff
|
||||
|
||||
move.d -0x5432f789,r4
|
||||
move.d 0x78134452,r3
|
||||
cmp.w r4,r3
|
||||
test_cc 0 0 0 0
|
||||
dumpr3 ; 78134452
|
||||
|
||||
moveq -1,r3
|
||||
moveq -2,r4
|
||||
cmp.b r4,r3
|
||||
test_cc 0 0 0 0
|
||||
dumpr3 ; ffffffff
|
||||
|
||||
moveq 2,r3
|
||||
moveq 1,r4
|
||||
cmp.b r4,r3
|
||||
test_cc 0 0 0 0
|
||||
dumpr3 ; 2
|
||||
|
||||
move.d -0xff,r4
|
||||
move.d 0xff,r3
|
||||
cmp.b r4,r3
|
||||
test_cc 1 0 0 0
|
||||
dumpr3 ; ff
|
||||
|
||||
move.d -0xfeda49ff,r4
|
||||
move.d 0xfeda49ff,r3
|
||||
cmp.b r4,r3
|
||||
test_cc 1 0 0 0
|
||||
dumpr3 ; feda49ff
|
||||
|
||||
move.d -0x5432f789,r4
|
||||
move.d 0x78134452,r3
|
||||
cmp.b r4,r3
|
||||
test_cc 1 0 0 1
|
||||
dumpr3 ; 78134452
|
||||
|
||||
move.d 0x85649222,r3
|
||||
move.d 0x77445622,r4
|
||||
cmp.b r4,r3
|
||||
test_cc 0 1 0 0
|
||||
dumpr3 ; 85649222
|
||||
|
||||
quit
|
||||
92
sim/testsuite/sim/cris/asm/cmpxc.ms
Normal file
92
sim/testsuite/sim/cris/asm/cmpxc.ms
Normal file
@ -0,0 +1,92 @@
|
||||
# mach: crisv0 crisv3 crisv8 crisv10 crisv32
|
||||
# output: 2\n2\n2\n2\nffff\nffff\nffff\nffff\nffffffff\nffffffff\nffffffff\n78134452\n78134452\n78134452\n78134452\n4452\n80000032\n
|
||||
|
||||
.include "testutils.inc"
|
||||
start
|
||||
moveq 2,r3
|
||||
cmps.b 0xff,r3
|
||||
test_cc 0 0 0 1
|
||||
dumpr3 ; 2
|
||||
|
||||
moveq 2,r3
|
||||
cmps.w 0xffff,r3
|
||||
test_cc 0 0 0 1
|
||||
dumpr3 ; 2
|
||||
|
||||
moveq 2,r3
|
||||
cmpu.b 0xff,r3
|
||||
test_cc 1 0 0 1
|
||||
dumpr3 ; 2
|
||||
|
||||
moveq 2,r3
|
||||
move.d 0xffffffff,r4
|
||||
cmpu.w -1,r3
|
||||
test_cc 1 0 0 1
|
||||
dumpr3 ; 2
|
||||
|
||||
move.d 0xffff,r3
|
||||
cmpu.b -1,r3
|
||||
test_cc 0 0 0 0
|
||||
dumpr3 ; ffff
|
||||
|
||||
move.d 0xffff,r3
|
||||
cmpu.w -1,r3
|
||||
test_cc 0 1 0 0
|
||||
dumpr3 ; ffff
|
||||
|
||||
move.d 0xffff,r3
|
||||
cmps.b 0xff,r3
|
||||
test_cc 0 0 0 1
|
||||
dumpr3 ; ffff
|
||||
|
||||
move.d 0xffff,r3
|
||||
cmps.w 0xffff,r3
|
||||
test_cc 0 0 0 1
|
||||
dumpr3 ; ffff
|
||||
|
||||
moveq -1,r3
|
||||
cmps.b 0xff,r3
|
||||
test_cc 0 1 0 0
|
||||
dumpr3 ; ffffffff
|
||||
|
||||
moveq -1,r3
|
||||
cmps.w 0xff,r3
|
||||
test_cc 1 0 0 0
|
||||
dumpr3 ; ffffffff
|
||||
|
||||
moveq -1,r3
|
||||
cmps.w 0xffff,r3
|
||||
test_cc 0 1 0 0
|
||||
dumpr3 ; ffffffff
|
||||
|
||||
move.d 0x78134452,r3
|
||||
cmpu.b 0x89,r3
|
||||
test_cc 0 0 0 0
|
||||
dumpr3 ; 78134452
|
||||
|
||||
move.d 0x78134452,r3
|
||||
cmps.b 0x89,r3
|
||||
test_cc 0 0 0 1
|
||||
dumpr3 ; 78134452
|
||||
|
||||
move.d 0x78134452,r3
|
||||
cmpu.w 0xf789,r3
|
||||
test_cc 0 0 0 0
|
||||
dumpr3 ; 78134452
|
||||
|
||||
move.d 0x78134452,r3
|
||||
cmps.w 0xf789,r3
|
||||
test_cc 0 0 0 1
|
||||
dumpr3 ; 78134452
|
||||
|
||||
move.d 0x4452,r3
|
||||
cmps.w 0x8002,r3
|
||||
test_cc 0 0 0 1
|
||||
dumpr3 ; 4452
|
||||
|
||||
move.d 0x80000032,r3
|
||||
cmpu.w 0x764,r3
|
||||
test_cc 0 0 1 0
|
||||
dumpr3 ; 80000032
|
||||
|
||||
quit
|
||||
106
sim/testsuite/sim/cris/asm/cmpxm.ms
Normal file
106
sim/testsuite/sim/cris/asm/cmpxm.ms
Normal file
@ -0,0 +1,106 @@
|
||||
# mach: crisv0 crisv3 crisv8 crisv10 crisv32
|
||||
# output: 2\n2\n2\n2\nffff\nffff\nffff\nffff\nffffffff\nffffffff\nffffffff\n78134452\n78134452\n78134452\n78134452\n4452\n80000032\n
|
||||
|
||||
.include "testutils.inc"
|
||||
.data
|
||||
x:
|
||||
.byte 0xff
|
||||
.word 0xffff
|
||||
.word 0xff
|
||||
.word 0xffff
|
||||
.byte 0x89
|
||||
.word 0xf789
|
||||
.word 0x8002
|
||||
.word 0x764
|
||||
|
||||
start
|
||||
moveq 2,r3
|
||||
move.d x,r5
|
||||
cmps.b [r5+],r3
|
||||
test_cc 0 0 0 1
|
||||
dumpr3 ; 2
|
||||
|
||||
moveq 2,r3
|
||||
cmps.w [r5+],r3
|
||||
test_cc 0 0 0 1
|
||||
dumpr3 ; 2
|
||||
|
||||
moveq 2,r3
|
||||
subq 3,r5
|
||||
cmpu.b [r5+],r3
|
||||
test_cc 1 0 0 1
|
||||
dumpr3 ; 2
|
||||
|
||||
moveq 2,r3
|
||||
cmpu.w [r5+],r3
|
||||
test_cc 1 0 0 1
|
||||
subq 3,r5
|
||||
dumpr3 ; 2
|
||||
|
||||
move.d 0xffff,r3
|
||||
cmpu.b [r5],r3
|
||||
test_cc 0 0 0 0
|
||||
dumpr3 ; ffff
|
||||
|
||||
move.d 0xffff,r3
|
||||
cmpu.w [r5],r3
|
||||
test_cc 0 1 0 0
|
||||
dumpr3 ; ffff
|
||||
|
||||
move.d 0xffff,r3
|
||||
cmps.b [r5],r3
|
||||
test_cc 0 0 0 1
|
||||
dumpr3 ; ffff
|
||||
|
||||
move.d 0xffff,r3
|
||||
cmps.w [r5],r3
|
||||
test_cc 0 0 0 1
|
||||
dumpr3 ; ffff
|
||||
|
||||
moveq -1,r3
|
||||
cmps.b [r5],r3
|
||||
test_cc 0 1 0 0
|
||||
addq 3,r5
|
||||
dumpr3 ; ffffffff
|
||||
|
||||
moveq -1,r3
|
||||
cmps.w [r5+],r3
|
||||
test_cc 1 0 0 0
|
||||
dumpr3 ; ffffffff
|
||||
|
||||
moveq -1,r3
|
||||
cmps.w [r5+],r3
|
||||
test_cc 0 1 0 0
|
||||
dumpr3 ; ffffffff
|
||||
|
||||
move.d 0x78134452,r3
|
||||
cmpu.b [r5],r3
|
||||
test_cc 0 0 0 0
|
||||
dumpr3 ; 78134452
|
||||
|
||||
move.d 0x78134452,r3
|
||||
cmps.b [r5+],r3
|
||||
test_cc 0 0 0 1
|
||||
dumpr3 ; 78134452
|
||||
|
||||
move.d 0x78134452,r3
|
||||
cmpu.w [r5],r3
|
||||
test_cc 0 0 0 0
|
||||
dumpr3 ; 78134452
|
||||
|
||||
move.d 0x78134452,r3
|
||||
cmps.w [r5+],r3
|
||||
test_cc 0 0 0 1
|
||||
dumpr3 ; 78134452
|
||||
|
||||
move.d 0x4452,r3
|
||||
cmps.w [r5+],r3
|
||||
test_cc 0 0 0 1
|
||||
dumpr3 ; 4452
|
||||
|
||||
move.d 0x80000032,r3
|
||||
cmpu.w [r5+],r3
|
||||
test_cc 0 0 1 0
|
||||
dumpr3 ; 80000032
|
||||
|
||||
quit
|
||||
62
sim/testsuite/sim/cris/asm/dflags.ms
Normal file
62
sim/testsuite/sim/cris/asm/dflags.ms
Normal file
@ -0,0 +1,62 @@
|
||||
# mach: crisv3 crisv8 crisv10 crisv32
|
||||
# output: 31\n
|
||||
|
||||
; Check that flag settings in the delay slot for a conditional branch do
|
||||
; not affect the branch.
|
||||
|
||||
.include "testutils.inc"
|
||||
|
||||
start
|
||||
moveq 1,r3
|
||||
moveq 0,r4
|
||||
|
||||
; 8-bit branches.
|
||||
|
||||
move.d r4,r4
|
||||
bne 0f
|
||||
move.d r3,r3
|
||||
bne 1f
|
||||
move.d r4,r4
|
||||
nop
|
||||
0:
|
||||
quit
|
||||
|
||||
1:
|
||||
move.d r3,r3
|
||||
beq 0b
|
||||
move.d r4,r4
|
||||
beq 4f
|
||||
move.d r3,r3
|
||||
nop
|
||||
quit
|
||||
4:
|
||||
jump 2f
|
||||
nop
|
||||
.space 1000
|
||||
|
||||
; 16-bit branches
|
||||
|
||||
2:
|
||||
move.d r4,r4
|
||||
bne 0b
|
||||
move.d r3,r3
|
||||
bne 3f
|
||||
move.d r4,r4
|
||||
nop
|
||||
quit
|
||||
.space 1000
|
||||
|
||||
3:
|
||||
move.d r3,r3
|
||||
beq 0b
|
||||
move.d r4,r4
|
||||
beq 4f
|
||||
move.d r3,r3
|
||||
nop
|
||||
quit
|
||||
.space 1000
|
||||
|
||||
4:
|
||||
move.d 0x31,r3
|
||||
dumpr3
|
||||
quit
|
||||
41
sim/testsuite/sim/cris/asm/dip.ms
Normal file
41
sim/testsuite/sim/cris/asm/dip.ms
Normal file
@ -0,0 +1,41 @@
|
||||
# mach: crisv0 crisv3 crisv8 crisv10
|
||||
# output: 4455aa77\nee19ccff\nb232765a\nff22\n5a88ccee\n
|
||||
|
||||
.include "testutils.inc"
|
||||
.data
|
||||
x:
|
||||
.dword 0x55aa77ff
|
||||
.dword 0xccff2244
|
||||
.dword 0x88ccee19
|
||||
.dword 0xb232765a
|
||||
y:
|
||||
.dword x+12
|
||||
.dword x+5
|
||||
.dword x+9
|
||||
|
||||
start
|
||||
moveq -1,r0
|
||||
moveq -1,r2
|
||||
move.d [x+1],r3
|
||||
test_cc 0 0 0 0
|
||||
dumpr3 ; 4455aa77
|
||||
|
||||
move.d [x+6],r3
|
||||
test_cc 1 0 0 0
|
||||
dumpr3 ; ee19ccff
|
||||
|
||||
move.d y,r8
|
||||
move.d [[r8+]],r3
|
||||
test_cc 1 0 0 0
|
||||
dumpr3 ; b232765a
|
||||
|
||||
movu.w [[r8]],r3
|
||||
test_cc 0 0 0 0
|
||||
dumpr3 ; ff22
|
||||
addq 4,r8
|
||||
|
||||
move.d [[r8]],r3
|
||||
test_cc 0 0 0 0
|
||||
dumpr3 ; 5a88ccee
|
||||
|
||||
quit
|
||||
42
sim/testsuite/sim/cris/asm/dstep.ms
Normal file
42
sim/testsuite/sim/cris/asm/dstep.ms
Normal file
@ -0,0 +1,42 @@
|
||||
# mach: crisv0 crisv3 crisv8 crisv10 crisv32
|
||||
# output: fffffffc\n4\nffff\nfffffffe\n9bf3911b\n0\n
|
||||
|
||||
.include "testutils.inc"
|
||||
start
|
||||
moveq -1,r3
|
||||
moveq 2,r4
|
||||
dstep r4,r3
|
||||
test_move_cc 1 0 0 0
|
||||
dumpr3 ; fffffffc
|
||||
|
||||
moveq 2,r3
|
||||
moveq -1,r4
|
||||
dstep r4,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; 4
|
||||
|
||||
move.d 0xffff,r4
|
||||
move.d r4,r3
|
||||
dstep r4,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; ffff
|
||||
|
||||
moveq -1,r4
|
||||
move.d r4,r3
|
||||
dstep r4,r3
|
||||
test_move_cc 1 0 0 0
|
||||
dumpr3 ; fffffffe
|
||||
|
||||
move.d 0x5432f789,r4
|
||||
move.d 0x78134452,r3
|
||||
dstep r4,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; 9bf3911b
|
||||
|
||||
move.d 0xffff,r3
|
||||
move.d 0x1fffe,r4
|
||||
dstep r4,r3
|
||||
test_move_cc 0 1 0 0
|
||||
dumpr3 ; 0
|
||||
|
||||
quit
|
||||
9
sim/testsuite/sim/cris/asm/fidxd.ms
Normal file
9
sim/testsuite/sim/cris/asm/fidxd.ms
Normal file
@ -0,0 +1,9 @@
|
||||
# mach: crisv32
|
||||
# xerror:
|
||||
# output: FIDXD isn't implemented\nprogram stopped with signal 5.\n
|
||||
|
||||
.include "testutils.inc"
|
||||
start
|
||||
fidxd [r3]
|
||||
|
||||
quit
|
||||
9
sim/testsuite/sim/cris/asm/fidxi.ms
Normal file
9
sim/testsuite/sim/cris/asm/fidxi.ms
Normal file
@ -0,0 +1,9 @@
|
||||
# mach: crisv32
|
||||
# xerror:
|
||||
# output: FIDXI isn't implemented\nprogram stopped with signal 5.\n
|
||||
|
||||
.include "testutils.inc"
|
||||
start
|
||||
fidxi [r5]
|
||||
|
||||
quit
|
||||
9
sim/testsuite/sim/cris/asm/ftagd.ms
Normal file
9
sim/testsuite/sim/cris/asm/ftagd.ms
Normal file
@ -0,0 +1,9 @@
|
||||
# mach: crisv32
|
||||
# xerror:
|
||||
# output: FTAGD isn't implemented\nprogram stopped with signal 5.\n
|
||||
|
||||
.include "testutils.inc"
|
||||
start
|
||||
ftagd [r11]
|
||||
|
||||
quit
|
||||
9
sim/testsuite/sim/cris/asm/ftagi.ms
Normal file
9
sim/testsuite/sim/cris/asm/ftagi.ms
Normal file
@ -0,0 +1,9 @@
|
||||
# mach: crisv32
|
||||
# xerror:
|
||||
# output: FTAGI isn't implemented\nprogram stopped with signal 5.\n
|
||||
|
||||
.include "testutils.inc"
|
||||
start
|
||||
ftagi [r8]
|
||||
|
||||
quit
|
||||
9
sim/testsuite/sim/cris/asm/halt.ms
Normal file
9
sim/testsuite/sim/cris/asm/halt.ms
Normal file
@ -0,0 +1,9 @@
|
||||
# mach: crisv32
|
||||
# xerror:
|
||||
# output: HALT isn't implemented\nprogram stopped with signal 5.\n
|
||||
|
||||
.include "testutils.inc"
|
||||
start
|
||||
halt
|
||||
|
||||
quit
|
||||
8
sim/testsuite/sim/cris/asm/io1.ms
Normal file
8
sim/testsuite/sim/cris/asm/io1.ms
Normal file
@ -0,0 +1,8 @@
|
||||
# mach: crisv32
|
||||
# sim: --cris-900000xx --memory-region 0x90000000,0x10
|
||||
# xerror:
|
||||
# output: Seeing --cris-900000xx with memory defined there\n
|
||||
|
||||
; Check that I/O region overlap is detected.
|
||||
|
||||
.include "nopv32t.ms"
|
||||
18
sim/testsuite/sim/cris/asm/io2.ms
Normal file
18
sim/testsuite/sim/cris/asm/io2.ms
Normal file
@ -0,0 +1,18 @@
|
||||
# mach: crisv32
|
||||
# sim: --cris-900000xx
|
||||
# xerror:
|
||||
# output: b1e\n
|
||||
|
||||
; Check correct "fail" exit.
|
||||
|
||||
.include "testutils.inc"
|
||||
start
|
||||
move.d 0xb1e,$r3
|
||||
dumpr3
|
||||
move.d 0x90000008,$acr
|
||||
move.d $acr,[$acr]
|
||||
move.d 0xbadc0de,$r3
|
||||
dumpr3
|
||||
0:
|
||||
ba 0b
|
||||
nop
|
||||
17
sim/testsuite/sim/cris/asm/io3.ms
Normal file
17
sim/testsuite/sim/cris/asm/io3.ms
Normal file
@ -0,0 +1,17 @@
|
||||
# mach: crisv32
|
||||
# sim: --cris-900000xx
|
||||
# output: ce11d0c\n
|
||||
|
||||
; Check correct "pass" exit.
|
||||
|
||||
.include "testutils.inc"
|
||||
start
|
||||
move.d 0x0ce11d0c,$r3
|
||||
dumpr3
|
||||
move.d 0x90000004,$acr
|
||||
move.d $acr,[$acr]
|
||||
move.d 0xbadc0de,$r3
|
||||
dumpr3
|
||||
0:
|
||||
ba 0b
|
||||
nop
|
||||
18
sim/testsuite/sim/cris/asm/io4.ms
Normal file
18
sim/testsuite/sim/cris/asm/io4.ms
Normal file
@ -0,0 +1,18 @@
|
||||
# mach: crisv32
|
||||
# xerror:
|
||||
# output: b1e\n
|
||||
|
||||
; Check correct "fail" exit.
|
||||
|
||||
.include "testutils.inc"
|
||||
start
|
||||
move.d 0xb1e,$r3
|
||||
dumpr3
|
||||
moveq 1,$r9
|
||||
moveq 2,$r10
|
||||
break 13
|
||||
move.d 0xbadc0de,$r3
|
||||
dumpr3
|
||||
0:
|
||||
ba 0b
|
||||
nop
|
||||
17
sim/testsuite/sim/cris/asm/io5.ms
Normal file
17
sim/testsuite/sim/cris/asm/io5.ms
Normal file
@ -0,0 +1,17 @@
|
||||
# mach: crisv32
|
||||
# output: ce11d0c\n
|
||||
|
||||
; Check correct "pass" exit.
|
||||
|
||||
.include "testutils.inc"
|
||||
start
|
||||
move.d 0x0ce11d0c,$r3
|
||||
dumpr3
|
||||
moveq 1,$r9
|
||||
moveq 0,$r10
|
||||
break 13
|
||||
move.d 0xbadc0de,$r3
|
||||
dumpr3
|
||||
0:
|
||||
ba 0b
|
||||
nop
|
||||
22
sim/testsuite/sim/cris/asm/io6.ms
Normal file
22
sim/testsuite/sim/cris/asm/io6.ms
Normal file
@ -0,0 +1,22 @@
|
||||
# mach: crisv32
|
||||
# ld: --section-start=.text=0
|
||||
# sim: --cris-900000xx
|
||||
# xerror:
|
||||
# output: b1e\n
|
||||
# output: core: 4 byte write to unmapped address 0x90000008 at 0x16\n
|
||||
# output: program stopped with signal 11.\n
|
||||
|
||||
; Check that invalid access to the simulator area is recognized.
|
||||
; "FAIL" area.
|
||||
|
||||
.include "testutils.inc"
|
||||
start
|
||||
move.d 0xb1e,$r3
|
||||
dumpr3
|
||||
move.d 0x90000008,$acr
|
||||
clear.d [$acr]
|
||||
move.d 0xbadc0de,$r3
|
||||
dumpr3
|
||||
0:
|
||||
ba 0b
|
||||
nop
|
||||
22
sim/testsuite/sim/cris/asm/io7.ms
Normal file
22
sim/testsuite/sim/cris/asm/io7.ms
Normal file
@ -0,0 +1,22 @@
|
||||
# mach: crisv32
|
||||
# ld: --section-start=.text=0
|
||||
# sim: --cris-900000xx
|
||||
# xerror:
|
||||
# output: ce11d0c\n
|
||||
# output: core: 4 byte write to unmapped address 0x90000004 at 0x16\n
|
||||
# output: program stopped with signal 11.\n
|
||||
|
||||
; Check that invalid access to the simulator area is recognized.
|
||||
; "PASS" area.
|
||||
|
||||
.include "testutils.inc"
|
||||
start
|
||||
move.d 0x0ce11d0c,$r3
|
||||
dumpr3
|
||||
move.d 0x90000004,$acr
|
||||
clear.d [$acr]
|
||||
move.d 0xbadc0de,$r3
|
||||
dumpr3
|
||||
0:
|
||||
ba 0b
|
||||
nop
|
||||
21
sim/testsuite/sim/cris/asm/io8.ms
Normal file
21
sim/testsuite/sim/cris/asm/io8.ms
Normal file
@ -0,0 +1,21 @@
|
||||
# mach: crisv32
|
||||
# ld: --section-start=.text=0
|
||||
# xerror:
|
||||
# output: b1e\n
|
||||
# output: core: 4 byte write to unmapped address 0x90000008 at 0x16\n
|
||||
# output: program stopped with signal 11.\n
|
||||
|
||||
; Check invalid access valid with --cris-900000xx.
|
||||
; "FAIL" area.
|
||||
|
||||
.include "testutils.inc"
|
||||
start
|
||||
move.d 0xb1e,$r3
|
||||
dumpr3
|
||||
move.d 0x90000008,$acr
|
||||
move.d $acr,[$acr]
|
||||
move.d 0xbadc0de,$r3
|
||||
dumpr3
|
||||
0:
|
||||
ba 0b
|
||||
nop
|
||||
21
sim/testsuite/sim/cris/asm/io9.ms
Normal file
21
sim/testsuite/sim/cris/asm/io9.ms
Normal file
@ -0,0 +1,21 @@
|
||||
# mach: crisv32
|
||||
# ld: --section-start=.text=0
|
||||
# xerror:
|
||||
# output: ce11d0c\n
|
||||
# output: core: 4 byte write to unmapped address 0x90000004 at 0x16\n
|
||||
# output: program stopped with signal 11.\n
|
||||
|
||||
; Check invalid access valid with --cris-900000xx.
|
||||
; "PASS" area.
|
||||
|
||||
.include "testutils.inc"
|
||||
start
|
||||
move.d 0x0ce11d0c,$r3
|
||||
dumpr3
|
||||
move.d 0x90000004,$acr
|
||||
move.d $acr,[$acr]
|
||||
move.d 0xbadc0de,$r3
|
||||
dumpr3
|
||||
0:
|
||||
ba 0b
|
||||
nop
|
||||
85
sim/testsuite/sim/cris/asm/jsr.ms
Normal file
85
sim/testsuite/sim/cris/asm/jsr.ms
Normal file
@ -0,0 +1,85 @@
|
||||
# mach: crisv3 crisv8 crisv10 crisv32
|
||||
# output: 0\n0\n0\n0\n0\n0\n
|
||||
|
||||
# Test that jsr Rn and jsr [PC+] work.
|
||||
|
||||
.include "testutils.inc"
|
||||
start
|
||||
x:
|
||||
move.d 0f,r6
|
||||
setf nzvc
|
||||
jsr r6
|
||||
.if ..asm.arch.cris.v32
|
||||
nop
|
||||
.endif
|
||||
0:
|
||||
test_move_cc 1 1 1 1
|
||||
move srp,r3
|
||||
sub.d 0b,r3
|
||||
dumpr3
|
||||
|
||||
move.d 1f,r0
|
||||
setf nzvc
|
||||
jsr r0
|
||||
.if ..asm.arch.cris.v32
|
||||
moveq 0,r0
|
||||
.endif
|
||||
6:
|
||||
nop
|
||||
quit
|
||||
|
||||
2:
|
||||
test_move_cc 0 0 0 0
|
||||
move srp,r3
|
||||
sub.d 3f,r3
|
||||
dumpr3
|
||||
jsr 4f
|
||||
.if ..asm.arch.cris.v32
|
||||
nop
|
||||
.endif
|
||||
7:
|
||||
nop
|
||||
quit
|
||||
|
||||
8:
|
||||
move srp,r3
|
||||
sub.d 7b,r3
|
||||
dumpr3
|
||||
quit
|
||||
|
||||
4:
|
||||
move srp,r3
|
||||
sub.d 7b,r3
|
||||
dumpr3
|
||||
move.d 5f,r3
|
||||
jump r3
|
||||
.if ..asm.arch.cris.v32
|
||||
moveq 0,r3
|
||||
.endif
|
||||
quit
|
||||
|
||||
.space 32770,0
|
||||
1:
|
||||
test_move_cc 1 1 1 1
|
||||
move srp,r3
|
||||
sub.d 6b,r3
|
||||
dumpr3
|
||||
|
||||
clearf cznv
|
||||
jsr 2b
|
||||
.if ..asm.arch.cris.v32
|
||||
nop
|
||||
.endif
|
||||
3:
|
||||
|
||||
quit
|
||||
|
||||
5:
|
||||
move srp,r3
|
||||
sub.d 7b,r3
|
||||
dumpr3
|
||||
jump 8b
|
||||
.if ..asm.arch.cris.v32
|
||||
nop
|
||||
.endif
|
||||
quit
|
||||
40
sim/testsuite/sim/cris/asm/jsrmv10.ms
Normal file
40
sim/testsuite/sim/cris/asm/jsrmv10.ms
Normal file
@ -0,0 +1,40 @@
|
||||
# mach: crisv3 crisv8 crisv10
|
||||
# output: 23\n
|
||||
|
||||
# Test that jsr [] records the correct return-address.
|
||||
|
||||
.include "testutils.inc"
|
||||
start
|
||||
x:
|
||||
moveq 0,r3
|
||||
jsr [z]
|
||||
addq 1,r3
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
move.d w,r2
|
||||
jsr [r2]
|
||||
addq 1,r3
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
dumpr3 ; 23
|
||||
quit
|
||||
y:
|
||||
ret
|
||||
addq 1,r3
|
||||
quit
|
||||
|
||||
v:
|
||||
ret
|
||||
addq 32,r3
|
||||
quit
|
||||
|
||||
z:
|
||||
.dword y
|
||||
w:
|
||||
.dword v
|
||||
21
sim/testsuite/sim/cris/asm/jumpmp.ms
Normal file
21
sim/testsuite/sim/cris/asm/jumpmp.ms
Normal file
@ -0,0 +1,21 @@
|
||||
# mach: crisv3 crisv8 crisv10
|
||||
# output: bed0bed1\n
|
||||
|
||||
# Test that jump indirect clears the "prefixed"
|
||||
# bit.
|
||||
|
||||
.include "testutils.inc"
|
||||
.data
|
||||
w:
|
||||
.dword x1
|
||||
y:
|
||||
.dword 0xbed0bed1
|
||||
|
||||
start
|
||||
x:
|
||||
move.d y,r3
|
||||
jump [w]
|
||||
x1:
|
||||
move.d [r3],r3
|
||||
dumpr3 ; bed0bed1
|
||||
quit
|
||||
28
sim/testsuite/sim/cris/asm/jumppv32.ms
Normal file
28
sim/testsuite/sim/cris/asm/jumppv32.ms
Normal file
@ -0,0 +1,28 @@
|
||||
# mach: crisv32
|
||||
# output: 2222\n
|
||||
|
||||
# Test that jump Pd works.
|
||||
|
||||
.include "testutils.inc"
|
||||
start
|
||||
x:
|
||||
setf zvnc
|
||||
move 0f,srp
|
||||
test_cc 1 1 1 1
|
||||
jump srp
|
||||
nop
|
||||
quit
|
||||
|
||||
0:
|
||||
test_cc 1 1 1 1
|
||||
move 1f,mof
|
||||
jump mof
|
||||
nop
|
||||
quit
|
||||
|
||||
.space 32768,0
|
||||
quit
|
||||
1:
|
||||
move.d 0x2222,r3
|
||||
dumpr3
|
||||
quit
|
||||
78
sim/testsuite/sim/cris/asm/lapc.ms
Normal file
78
sim/testsuite/sim/cris/asm/lapc.ms
Normal file
@ -0,0 +1,78 @@
|
||||
# mach: crisv32
|
||||
# output: 0\n0\nfffffffa\nfffffffe\nffffffda\n1e\n1e\n0\n
|
||||
|
||||
.include "testutils.inc"
|
||||
|
||||
; To accommodate dumpr3 with more than one instruction, keep it
|
||||
; out of lapc operand ranges and difference calculations.
|
||||
|
||||
start
|
||||
lapc.d 0f,r3
|
||||
0:
|
||||
sub.d .,r3
|
||||
dumpr3 ; 0
|
||||
|
||||
lapcq 0f,r3
|
||||
0:
|
||||
sub.d .,r3
|
||||
dumpr3 ; 0
|
||||
|
||||
lapc.d .,r3
|
||||
sub.d .,r3
|
||||
dumpr3 ; fffffffa
|
||||
|
||||
lapcq .,r3
|
||||
sub.d .,r3
|
||||
dumpr3 ; fffffffe
|
||||
|
||||
0:
|
||||
.rept 16
|
||||
nop
|
||||
.endr
|
||||
lapc.d 0b,r3
|
||||
sub.d .,r3
|
||||
dumpr3 ; ffffffda
|
||||
|
||||
setf zcvn
|
||||
lapc.d 0f,r3
|
||||
test_cc 1 1 1 1
|
||||
sub.d .,r3
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
0:
|
||||
dumpr3 ; 1e
|
||||
0:
|
||||
lapcq 0f,r3
|
||||
sub.d 0b,r3
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
0:
|
||||
dumpr3 ; 1e
|
||||
clearf cn
|
||||
setf zv
|
||||
1:
|
||||
lapcq .,r3
|
||||
test_cc 0 1 1 0
|
||||
sub.d 1b,r3
|
||||
dumpr3 ; 0
|
||||
|
||||
quit
|
||||
217
sim/testsuite/sim/cris/asm/lsl.ms
Normal file
217
sim/testsuite/sim/cris/asm/lsl.ms
Normal file
@ -0,0 +1,217 @@
|
||||
# mach: crisv0 crisv3 crisv8 crisv10 crisv32
|
||||
# output: ffffffff\n4\n80000000\nffff8000\n7f19f000\n80000000\n0\n0\n699fc67c\nffffffff\n4\n80000000\nffff8000\n7f19f000\nda670000\nda670000\nda670000\nda67c67c\nffffffff\nfffafffe\n4\nffff0000\nffff8000\n5a67f000\nda67f100\nda67f100\nda67f100\nda67f17c\nfff3faff\nfff3fafe\n4\nffffff00\nffffff00\nffffff80\n5a67f100\n5a67f1f0\n
|
||||
|
||||
.include "testutils.inc"
|
||||
start
|
||||
moveq -1,r3
|
||||
lslq 0,r3
|
||||
test_move_cc 1 0 0 0
|
||||
dumpr3 ; ffffffff
|
||||
|
||||
moveq 2,r3
|
||||
lslq 1,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; 4
|
||||
|
||||
moveq -1,r3
|
||||
lslq 31,r3
|
||||
test_move_cc 1 0 0 0
|
||||
dumpr3 ; 80000000
|
||||
|
||||
moveq -1,r3
|
||||
lslq 15,r3
|
||||
test_move_cc 1 0 0 0
|
||||
dumpr3 ; ffff8000
|
||||
|
||||
move.d 0x5a67f19f,r3
|
||||
lslq 12,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; 7f19f000
|
||||
|
||||
move.d 0xda67f19f,r3
|
||||
move.d 31,r4
|
||||
lsl.d r4,r3
|
||||
test_move_cc 1 0 0 0
|
||||
dumpr3 ; 80000000
|
||||
|
||||
move.d 0xda67f19f,r3
|
||||
move.d 32,r4
|
||||
lsl.d r4,r3
|
||||
test_move_cc 0 1 0 0
|
||||
dumpr3 ; 0
|
||||
|
||||
move.d 0xda67f19f,r3
|
||||
move.d 33,r4
|
||||
lsl.d r4,r3
|
||||
test_move_cc 0 1 0 0
|
||||
dumpr3 ; 0
|
||||
|
||||
move.d 0xda67f19f,r3
|
||||
move.d 66,r4
|
||||
lsl.d r4,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; 699fc67c
|
||||
|
||||
moveq -1,r3
|
||||
moveq 0,r4
|
||||
lsl.d r4,r3
|
||||
test_move_cc 1 0 0 0
|
||||
dumpr3 ; ffffffff
|
||||
|
||||
moveq 2,r3
|
||||
moveq 1,r4
|
||||
lsl.d r4,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; 4
|
||||
|
||||
moveq -1,r3
|
||||
moveq 31,r4
|
||||
lsl.d r4,r3
|
||||
test_move_cc 1 0 0 0
|
||||
dumpr3 ; 80000000
|
||||
|
||||
moveq -1,r3
|
||||
moveq 15,r4
|
||||
lsl.d r4,r3
|
||||
test_move_cc 1 0 0 0
|
||||
dumpr3 ; ffff8000
|
||||
|
||||
move.d 0x5a67f19f,r3
|
||||
moveq 12,r4
|
||||
lsl.d r4,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; 7f19f000
|
||||
|
||||
move.d 0xda67f19f,r3
|
||||
move.d 31,r4
|
||||
lsl.w r4,r3
|
||||
test_move_cc 0 1 0 0
|
||||
dumpr3 ; da670000
|
||||
|
||||
move.d 0xda67f19f,r3
|
||||
move.d 32,r4
|
||||
lsl.w r4,r3
|
||||
test_move_cc 0 1 0 0
|
||||
dumpr3 ; da670000
|
||||
|
||||
move.d 0xda67f19f,r3
|
||||
move.d 33,r4
|
||||
lsl.w r4,r3
|
||||
test_move_cc 0 1 0 0
|
||||
dumpr3 ; da670000
|
||||
|
||||
move.d 0xda67f19f,r3
|
||||
move.d 66,r4
|
||||
lsl.w r4,r3
|
||||
test_move_cc 1 0 0 0
|
||||
dumpr3 ; da67c67c
|
||||
|
||||
moveq -1,r3
|
||||
moveq 0,r4
|
||||
lsl.w r4,r3
|
||||
test_move_cc 1 0 0 0
|
||||
dumpr3 ; ffffffff
|
||||
|
||||
move.d 0xfffaffff,r3
|
||||
moveq 1,r4
|
||||
lsl.w r4,r3
|
||||
test_move_cc 1 0 0 0
|
||||
dumpr3 ; fffafffe
|
||||
|
||||
moveq 2,r3
|
||||
moveq 1,r4
|
||||
lsl.w r4,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; 4
|
||||
|
||||
moveq -1,r3
|
||||
moveq 31,r4
|
||||
lsl.w r4,r3
|
||||
test_move_cc 0 1 0 0
|
||||
dumpr3 ; ffff0000
|
||||
|
||||
moveq -1,r3
|
||||
moveq 15,r4
|
||||
lsl.w r4,r3
|
||||
test_move_cc 1 0 0 0
|
||||
dumpr3 ; ffff8000
|
||||
|
||||
move.d 0x5a67f19f,r3
|
||||
moveq 12,r4
|
||||
lsl.w r4,r3
|
||||
test_move_cc 1 0 0 0
|
||||
dumpr3 ; 5a67f000
|
||||
|
||||
move.d 0xda67f19f,r3
|
||||
move.d 31,r4
|
||||
lsl.b r4,r3
|
||||
test_move_cc 0 1 0 0
|
||||
dumpr3 ; da67f100
|
||||
|
||||
move.d 0xda67f19f,r3
|
||||
move.d 32,r4
|
||||
lsl.b r4,r3
|
||||
test_move_cc 0 1 0 0
|
||||
dumpr3 ; da67f100
|
||||
|
||||
move.d 0xda67f19f,r3
|
||||
move.d 33,r4
|
||||
lsl.b r4,r3
|
||||
test_move_cc 0 1 0 0
|
||||
dumpr3 ; da67f100
|
||||
|
||||
move.d 0xda67f19f,r3
|
||||
move.d 66,r4
|
||||
lsl.b r4,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; da67f17c
|
||||
|
||||
move.d 0xfff3faff,r3
|
||||
moveq 0,r4
|
||||
lsl.b r4,r3
|
||||
test_move_cc 1 0 0 0
|
||||
dumpr3 ; fff3faff
|
||||
|
||||
move.d 0xfff3faff,r3
|
||||
moveq 1,r4
|
||||
lsl.b r4,r3
|
||||
test_move_cc 1 0 0 0
|
||||
dumpr3 ; fff3fafe
|
||||
|
||||
moveq 2,r3
|
||||
moveq 1,r4
|
||||
lsl.b r4,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; 4
|
||||
|
||||
moveq -1,r3
|
||||
moveq 31,r4
|
||||
lsl.b r4,r3
|
||||
test_move_cc 0 1 0 0
|
||||
dumpr3 ; ffffff00
|
||||
|
||||
moveq -1,r3
|
||||
moveq 15,r4
|
||||
lsl.b r4,r3
|
||||
test_move_cc 0 1 0 0
|
||||
dumpr3 ; ffffff00
|
||||
|
||||
moveq -1,r3
|
||||
moveq 7,r4
|
||||
lsl.b r4,r3
|
||||
test_move_cc 1 0 0 0
|
||||
dumpr3 ; ffffff80
|
||||
|
||||
move.d 0x5a67f19f,r3
|
||||
moveq 12,r4
|
||||
lsl.b r4,r3
|
||||
test_move_cc 0 1 0 0
|
||||
dumpr3 ; 5a67f100
|
||||
|
||||
move.d 0x5a67f19f,r3
|
||||
moveq 4,r4
|
||||
lsl.b r4,r3
|
||||
test_move_cc 1 0 0 0
|
||||
dumpr3 ; 5a67f1f0
|
||||
|
||||
quit
|
||||
217
sim/testsuite/sim/cris/asm/lsr.ms
Normal file
217
sim/testsuite/sim/cris/asm/lsr.ms
Normal file
@ -0,0 +1,217 @@
|
||||
# mach: crisv0 crisv3 crisv8 crisv10 crisv32
|
||||
# output: ffffffff\n1\n1\n1ffff\n5a67f\n1\n0\n0\n3699fc67\nffffffff\n1\n1\n1ffff\n5a67f\nda670000\nda670000\nda670000\nda673c67\nffffffff\nffff7fff\n1\nffff0000\nffff0001\n5a67000f\nda67f100\nda67f100\nda67f100\nda67f127\nffffffff\nffffff7f\n1\nffffff00\nffffff00\nffffff01\n5a67f100\n5a67f109\n
|
||||
|
||||
.include "testutils.inc"
|
||||
start
|
||||
moveq -1,r3
|
||||
lsrq 0,r3
|
||||
test_move_cc 1 0 0 0
|
||||
dumpr3 ; ffffffff
|
||||
|
||||
moveq 2,r3
|
||||
lsrq 1,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; 1
|
||||
|
||||
moveq -1,r3
|
||||
lsrq 31,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; 1
|
||||
|
||||
moveq -1,r3
|
||||
lsrq 15,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; 1ffff
|
||||
|
||||
move.d 0x5a67f19f,r3
|
||||
lsrq 12,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; 5a67f
|
||||
|
||||
move.d 0xda67f19f,r3
|
||||
move.d 31,r4
|
||||
lsr.d r4,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; 1
|
||||
|
||||
move.d 0xda67f19f,r3
|
||||
move.d 32,r4
|
||||
lsr.d r4,r3
|
||||
test_move_cc 0 1 0 0
|
||||
dumpr3 ; 0
|
||||
|
||||
move.d 0xda67f19f,r3
|
||||
move.d 33,r4
|
||||
lsr.d r4,r3
|
||||
test_move_cc 0 1 0 0
|
||||
dumpr3 ; 0
|
||||
|
||||
move.d 0xda67f19f,r3
|
||||
move.d 66,r4
|
||||
lsr.d r4,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; 3699fc67
|
||||
|
||||
moveq -1,r3
|
||||
moveq 0,r4
|
||||
lsr.d r4,r3
|
||||
test_move_cc 1 0 0 0
|
||||
dumpr3 ; ffffffff
|
||||
|
||||
moveq 2,r3
|
||||
moveq 1,r4
|
||||
lsr.d r4,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; 1
|
||||
|
||||
moveq -1,r3
|
||||
moveq 31,r4
|
||||
lsr.d r4,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; 1
|
||||
|
||||
moveq -1,r3
|
||||
moveq 15,r4
|
||||
lsr.d r4,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; 1ffff
|
||||
|
||||
move.d 0x5a67f19f,r3
|
||||
moveq 12,r4
|
||||
lsr.d r4,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; 5a67f
|
||||
|
||||
move.d 0xda67f19f,r3
|
||||
move.d 31,r4
|
||||
lsr.w r4,r3
|
||||
test_move_cc 0 1 0 0
|
||||
dumpr3 ; da670000
|
||||
|
||||
move.d 0xda67f19f,r3
|
||||
move.d 32,r4
|
||||
lsr.w r4,r3
|
||||
test_move_cc 0 1 0 0
|
||||
dumpr3 ; da670000
|
||||
|
||||
move.d 0xda67f19f,r3
|
||||
move.d 33,r4
|
||||
lsr.w r4,r3
|
||||
test_move_cc 0 1 0 0
|
||||
dumpr3 ; da670000
|
||||
|
||||
move.d 0xda67f19f,r3
|
||||
move.d 66,r4
|
||||
lsr.w r4,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; da673c67
|
||||
|
||||
moveq -1,r3
|
||||
moveq 0,r4
|
||||
lsr.w r4,r3
|
||||
test_move_cc 1 0 0 0
|
||||
dumpr3 ; ffffffff
|
||||
|
||||
moveq -1,r3
|
||||
moveq 1,r4
|
||||
lsr.w r4,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; ffff7fff
|
||||
|
||||
moveq 2,r3
|
||||
moveq 1,r4
|
||||
lsr.w r4,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; 1
|
||||
|
||||
moveq -1,r3
|
||||
moveq 31,r4
|
||||
lsr.w r4,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; ffff0000
|
||||
|
||||
moveq -1,r3
|
||||
moveq 15,r4
|
||||
lsr.w r4,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; ffff0001
|
||||
|
||||
move.d 0x5a67f19f,r3
|
||||
moveq 12,r4
|
||||
lsr.w r4,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; 5a67000f
|
||||
|
||||
move.d 0xda67f19f,r3
|
||||
move.d 31,r4
|
||||
lsr.b r4,r3
|
||||
test_move_cc 0 1 0 0
|
||||
dumpr3 ; da67f100
|
||||
|
||||
move.d 0xda67f19f,r3
|
||||
move.d 32,r4
|
||||
lsr.b r4,r3
|
||||
test_move_cc 0 1 0 0
|
||||
dumpr3 ; da67f100
|
||||
|
||||
move.d 0xda67f19f,r3
|
||||
move.d 33,r4
|
||||
lsr.b r4,r3
|
||||
test_move_cc 0 1 0 0
|
||||
dumpr3 ; da67f100
|
||||
|
||||
move.d 0xda67f19f,r3
|
||||
move.d 66,r4
|
||||
lsr.b r4,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; da67f127
|
||||
|
||||
moveq -1,r3
|
||||
moveq 0,r4
|
||||
lsr.b r4,r3
|
||||
test_move_cc 1 0 0 0
|
||||
dumpr3 ; ffffffff
|
||||
|
||||
moveq -1,r3
|
||||
moveq 1,r4
|
||||
lsr.b r4,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; ffffff7f
|
||||
|
||||
moveq 2,r3
|
||||
moveq 1,r4
|
||||
lsr.b r4,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; 1
|
||||
|
||||
moveq -1,r3
|
||||
moveq 31,r4
|
||||
lsr.b r4,r3
|
||||
test_move_cc 0 1 0 0
|
||||
dumpr3 ; ffffff00
|
||||
|
||||
moveq -1,r3
|
||||
moveq 15,r4
|
||||
lsr.b r4,r3
|
||||
test_move_cc 0 1 0 0
|
||||
dumpr3 ; ffffff00
|
||||
|
||||
moveq -1,r3
|
||||
moveq 7,r4
|
||||
lsr.b r4,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; ffffff01
|
||||
|
||||
move.d 0x5a67f19f,r3
|
||||
moveq 12,r4
|
||||
lsr.b r4,r3
|
||||
test_move_cc 0 1 0 0
|
||||
dumpr3 ; 5a67f100
|
||||
|
||||
move.d 0x5a67f19f,r3
|
||||
moveq 4,r4
|
||||
lsr.b r4,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; 5a67f109
|
||||
|
||||
quit
|
||||
52
sim/testsuite/sim/cris/asm/lz.ms
Normal file
52
sim/testsuite/sim/cris/asm/lz.ms
Normal file
@ -0,0 +1,52 @@
|
||||
# mach: crisv0 crisv3 crisv8 crisv10 crisv32
|
||||
# output: 0\n20\n0\n1\n1\n1a\n1f\n10\n1e\n
|
||||
|
||||
.include "testutils.inc"
|
||||
start
|
||||
moveq -1,r3
|
||||
|
||||
lz r3,r3
|
||||
test_move_cc 0 1 0 0
|
||||
dumpr3 ; 0
|
||||
|
||||
moveq 0,r3
|
||||
lz r3,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; 20
|
||||
|
||||
move.d 0x80000000,r4
|
||||
lz r4,r3
|
||||
test_move_cc 0 1 0 0
|
||||
dumpr3 ; 0
|
||||
|
||||
move.d 0x40000000,r4
|
||||
lz r4,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; 1
|
||||
|
||||
move.d 0x7fffffff,r4
|
||||
lz r4,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; 1
|
||||
|
||||
move.d 42,r3
|
||||
lz r3,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; 1a
|
||||
|
||||
moveq 1,r6
|
||||
lz r6,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; 1f
|
||||
|
||||
move.d 0xffff,r3
|
||||
lz r3,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; 10
|
||||
|
||||
moveq 2,r5
|
||||
lz r5,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3 ; 1e
|
||||
|
||||
quit
|
||||
49
sim/testsuite/sim/cris/asm/mcp.ms
Normal file
49
sim/testsuite/sim/cris/asm/mcp.ms
Normal file
@ -0,0 +1,49 @@
|
||||
# mach: crisv32
|
||||
# output: fffffffe\n1\n1ffff\nfffffffe\ncc463bdc\n4c463bdc\n0\n
|
||||
|
||||
.include "testutils.inc"
|
||||
start
|
||||
|
||||
; Set R, clear C.
|
||||
move 0x100,ccs
|
||||
moveq -5,r3
|
||||
move 2,mof
|
||||
mcp mof,r3
|
||||
test_cc 1 0 0 0
|
||||
dumpr3 ; fffffffe
|
||||
|
||||
moveq 2,r3
|
||||
move -1,srp
|
||||
mcp srp,r3
|
||||
test_cc 0 0 0 0
|
||||
dumpr3 ; 1
|
||||
|
||||
move 0xffff,srp
|
||||
move srp,r3
|
||||
mcp srp,r3
|
||||
test_cc 0 0 0 0
|
||||
dumpr3 ; 1ffff
|
||||
|
||||
move -1,mof
|
||||
move mof,r3
|
||||
mcp mof,r3
|
||||
test_cc 1 0 0 0
|
||||
dumpr3 ; fffffffe
|
||||
|
||||
move 0x5432f789,mof
|
||||
move.d 0x78134452,r3
|
||||
mcp mof,r3
|
||||
test_cc 1 0 1 0
|
||||
dumpr3 ; cc463bdc
|
||||
|
||||
move 0x80000000,srp
|
||||
mcp srp,r3
|
||||
test_cc 0 0 1 0
|
||||
dumpr3 ; 4c463bdc
|
||||
|
||||
move 0xb3b9c423,srp
|
||||
mcp srp,r3
|
||||
test_cc 0 1 0 0
|
||||
dumpr3 ; 0
|
||||
|
||||
quit
|
||||
33
sim/testsuite/sim/cris/asm/movdelsr1.ms
Normal file
33
sim/testsuite/sim/cris/asm/movdelsr1.ms
Normal file
@ -0,0 +1,33 @@
|
||||
# mach: crisv0 crisv3 crisv8 crisv10 crisv32
|
||||
# output: aa117acd\n
|
||||
# output: eeaabb42\n
|
||||
|
||||
; Bug with move to special register in delay slot, due to
|
||||
; special flush-insn-cache simulator use. Ordinary move worked;
|
||||
; special register caused branch to fail.
|
||||
|
||||
.include "testutils.inc"
|
||||
start
|
||||
move -1,srp
|
||||
|
||||
move.d 0xaa117acd,r1
|
||||
moveq 3,r9
|
||||
cmpq 1,r9
|
||||
bhi 0f
|
||||
move.d r1,r3
|
||||
|
||||
fail
|
||||
0:
|
||||
dumpr3
|
||||
|
||||
move.d 0xeeaabb42,r1
|
||||
moveq 3,r9
|
||||
cmpq 1,r9
|
||||
bhi 0f
|
||||
move r1,srp
|
||||
|
||||
fail
|
||||
0:
|
||||
move srp,r3
|
||||
dumpr3
|
||||
quit
|
||||
19
sim/testsuite/sim/cris/asm/movecpc.ms
Normal file
19
sim/testsuite/sim/cris/asm/movecpc.ms
Normal file
@ -0,0 +1,19 @@
|
||||
# mach: crisv3 crisv8 crisv10
|
||||
# xerror:
|
||||
# output: General register * PC is not implemented.\nprogram stopped with signal 5.\n
|
||||
|
||||
# We deliberately match both "read from" and "write to" above.
|
||||
|
||||
.include "testutils.inc"
|
||||
startnostack
|
||||
moveq -1,r3
|
||||
move.b 0x42,pc
|
||||
dumpr3
|
||||
|
||||
move.w 0x4321,pc
|
||||
dumpr3
|
||||
|
||||
move.d 0x76543210,pc
|
||||
dumpr3
|
||||
|
||||
quit
|
||||
37
sim/testsuite/sim/cris/asm/movecr.ms
Normal file
37
sim/testsuite/sim/cris/asm/movecr.ms
Normal file
@ -0,0 +1,37 @@
|
||||
# mach: crisv3 crisv8 crisv10 crisv32
|
||||
# output: ffffff42\n94\nffff4321\n9234\n76543210\n76540000\n
|
||||
|
||||
; Move constant byte, word, dword to register. Check that no extension is
|
||||
; performed, that only part of the register is set.
|
||||
|
||||
.include "testutils.inc"
|
||||
startnostack
|
||||
moveq -1,r3
|
||||
move.b 0x42,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3
|
||||
|
||||
moveq 0,r3
|
||||
move.b 0x94,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3
|
||||
|
||||
moveq -1,r3
|
||||
move.w 0x4321,r3
|
||||
test_move_cc 1 0 0 0
|
||||
dumpr3
|
||||
|
||||
moveq 0,r3
|
||||
move.w 0x9234,r3
|
||||
test_move_cc 1 0 0 0
|
||||
dumpr3
|
||||
|
||||
move.d 0x76543210,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3
|
||||
|
||||
move.w 0,r3
|
||||
test_move_cc 0 1 0 0
|
||||
dumpr3
|
||||
|
||||
quit
|
||||
17
sim/testsuite/sim/cris/asm/movecrt10.ms
Normal file
17
sim/testsuite/sim/cris/asm/movecrt10.ms
Normal file
@ -0,0 +1,17 @@
|
||||
#mach: crisv10
|
||||
#output: ffffff42\n94\nffff4321\n9234\n76543210\n76540000\n
|
||||
#output: Basic clock cycles, total @: 22\n
|
||||
#output: Memory source stall cycles: 0\n
|
||||
#output: Memory read-after-write stall cycles: 0\n
|
||||
#output: Movem source stall cycles: 0\n
|
||||
#output: Movem destination stall cycles: 0\n
|
||||
#output: Movem address stall cycles: 0\n
|
||||
#output: Multiplication source stall cycles: 0\n
|
||||
#output: Jump source stall cycles: 0\n
|
||||
#output: Branch misprediction stall cycles: 0\n
|
||||
#output: Jump target stall cycles: 0\n
|
||||
#sim: --cris-cycles=basic
|
||||
.include "movecr.ms"
|
||||
|
||||
# This test-case is accidentally the same; gets the same cycle
|
||||
# count as movecrt32.ms, but please keep them separate.
|
||||
14
sim/testsuite/sim/cris/asm/movecrt32.ms
Normal file
14
sim/testsuite/sim/cris/asm/movecrt32.ms
Normal file
@ -0,0 +1,14 @@
|
||||
#mach: crisv32
|
||||
#output: ffffff42\n94\nffff4321\n9234\n76543210\n76540000\n
|
||||
#output: Basic clock cycles, total @: 22\n
|
||||
#output: Memory source stall cycles: 0\n
|
||||
#output: Memory read-after-write stall cycles: 0\n
|
||||
#output: Movem source stall cycles: 0\n
|
||||
#output: Movem destination stall cycles: 0\n
|
||||
#output: Movem address stall cycles: 0\n
|
||||
#output: Multiplication source stall cycles: 0\n
|
||||
#output: Jump source stall cycles: 0\n
|
||||
#output: Branch misprediction stall cycles: 0\n
|
||||
#output: Jump target stall cycles: 0\n
|
||||
#sim: --cris-cycles=basic
|
||||
.include "movecr.ms"
|
||||
18
sim/testsuite/sim/cris/asm/movect10.ms
Normal file
18
sim/testsuite/sim/cris/asm/movect10.ms
Normal file
@ -0,0 +1,18 @@
|
||||
#mach: crisv10
|
||||
#output: Basic clock cycles, total @: 3\n
|
||||
#output: Memory source stall cycles: 1\n
|
||||
#output: Memory read-after-write stall cycles: 0\n
|
||||
#output: Movem source stall cycles: 0\n
|
||||
#output: Movem destination stall cycles: 0\n
|
||||
#output: Movem address stall cycles: 0\n
|
||||
#output: Multiplication source stall cycles: 0\n
|
||||
#output: Jump source stall cycles: 0\n
|
||||
#output: Branch misprediction stall cycles: 0\n
|
||||
#output: Jump target stall cycles: 0\n
|
||||
#sim: --cris-cycles=basic
|
||||
|
||||
.include "testutils.inc"
|
||||
startnostack
|
||||
nop
|
||||
move.d 0xff004567,r5
|
||||
break 15
|
||||
47
sim/testsuite/sim/cris/asm/movei.ms
Normal file
47
sim/testsuite/sim/cris/asm/movei.ms
Normal file
@ -0,0 +1,47 @@
|
||||
# mach: crisv32
|
||||
# output: fffffffe\n
|
||||
# output: fffffffe\n
|
||||
|
||||
; Check basic integral-write semantics regarding flags.
|
||||
|
||||
.include "testutils.inc"
|
||||
start
|
||||
|
||||
; A write that works. Check that flags are set correspondingly.
|
||||
move.d d,r4
|
||||
moveq -2,r5
|
||||
setf c
|
||||
clearf p
|
||||
move.d [r4],r3
|
||||
ax
|
||||
move.d r5,[r4]
|
||||
move.d [r4],r3
|
||||
|
||||
bcc 0f
|
||||
nop
|
||||
fail
|
||||
|
||||
0:
|
||||
dumpr3 ; fffffffe
|
||||
|
||||
; A write that fails; check flags too.
|
||||
move.d d,r4
|
||||
moveq 23,r5
|
||||
setf p
|
||||
clearf c
|
||||
move.d [r4],r3
|
||||
ax
|
||||
move.d r5,[r4]
|
||||
move.d [r4],r3
|
||||
|
||||
bcs 0f
|
||||
nop
|
||||
fail
|
||||
|
||||
0:
|
||||
dumpr3 ; fffffffe
|
||||
quit
|
||||
|
||||
.data
|
||||
d:
|
||||
.dword 42424242
|
||||
8
sim/testsuite/sim/cris/asm/movempc.ms
Normal file
8
sim/testsuite/sim/cris/asm/movempc.ms
Normal file
@ -0,0 +1,8 @@
|
||||
# mach: crisv3 crisv8 crisv10
|
||||
# xerror:
|
||||
# output: General register write to PC is not implemented.\nprogram stopped with signal 5.\n
|
||||
|
||||
.include "testutils.inc"
|
||||
start
|
||||
move.d _start,r12
|
||||
move.d [r12],pc
|
||||
79
sim/testsuite/sim/cris/asm/movemr.ms
Normal file
79
sim/testsuite/sim/cris/asm/movemr.ms
Normal file
@ -0,0 +1,79 @@
|
||||
# mach: crisv3 crisv8 crisv10 crisv32
|
||||
# output: 12345678\n10234567\n12345678\n12344567\n12344523\n76543210\nffffffaa\naa\n9911\nffff9911\n78\n56\n3456\n6712\n
|
||||
|
||||
.include "testutils.inc"
|
||||
start
|
||||
|
||||
.data
|
||||
mem1:
|
||||
.dword 0x12345678
|
||||
mem2:
|
||||
.word 0x4567
|
||||
mem3:
|
||||
.byte 0x23
|
||||
.dword 0x76543210
|
||||
.byte 0xaa,0x11,0x99
|
||||
|
||||
.text
|
||||
move.d mem1,r2
|
||||
move.d [r2],r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3
|
||||
|
||||
move.d mem2,r3
|
||||
move.d [r3],r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3
|
||||
|
||||
move.d mem1,r2
|
||||
move.d [r2+],r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3
|
||||
|
||||
move.w [r2+],r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3
|
||||
|
||||
move.b [r2+],r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3
|
||||
|
||||
move.d [r2+],r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3
|
||||
|
||||
movs.b [r2],r3
|
||||
test_move_cc 1 0 0 0
|
||||
dumpr3
|
||||
|
||||
movu.b [r2+],r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3
|
||||
|
||||
movu.w [r2],r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3
|
||||
|
||||
movs.w [r2+],r3
|
||||
test_move_cc 1 0 0 0
|
||||
dumpr3
|
||||
|
||||
move.d mem1,r13
|
||||
movs.b [r13+],r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3
|
||||
|
||||
movu.b [r13],r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3
|
||||
|
||||
movs.w [r13+],r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3
|
||||
|
||||
movu.w [r13+],r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3
|
||||
|
||||
quit
|
||||
|
||||
101
sim/testsuite/sim/cris/asm/movemrv10.ms
Normal file
101
sim/testsuite/sim/cris/asm/movemrv10.ms
Normal file
@ -0,0 +1,101 @@
|
||||
# mach: crisv0 crisv3 crisv8 crisv10
|
||||
# output: 15\nffff1234\n2\n7\nb\n16\nf\n2\nf\nffffffef\n7\nfffffff4\nf\nfffffff2\nd\n10\nfffffff2\n8\nfffffff4\n
|
||||
|
||||
.include "testutils.inc"
|
||||
.data
|
||||
x:
|
||||
.dword 8,9,10,11
|
||||
y:
|
||||
.dword -12,13,-14,15,16
|
||||
|
||||
start
|
||||
moveq 7,r0
|
||||
moveq 2,r1
|
||||
move.d 0xffff1234,r2
|
||||
moveq 21,r3
|
||||
move.d x,r4
|
||||
setf zcvn
|
||||
movem r2,[r4+]
|
||||
test_cc 1 1 1 1
|
||||
subq 12,r4
|
||||
|
||||
dumpr3 ; 15
|
||||
|
||||
move.d [r4+],r3
|
||||
dumpr3 ; ffff1234
|
||||
|
||||
move.d [r4+],r3
|
||||
dumpr3 ; 2
|
||||
|
||||
move.d [r4+],r3
|
||||
dumpr3 ; 7
|
||||
|
||||
move.d [r4+],r3
|
||||
dumpr3 ; b
|
||||
|
||||
subq 16,r4
|
||||
moveq 22,r0
|
||||
moveq 15,r1
|
||||
clearf zcvn
|
||||
movem r0,[r4]
|
||||
test_cc 0 0 0 0
|
||||
move.d [r4+],r3
|
||||
dumpr3 ; 16
|
||||
|
||||
move.d r1,r3
|
||||
dumpr3 ; f
|
||||
|
||||
move.d [r4+],r3
|
||||
dumpr3 ; 2
|
||||
|
||||
moveq 10,r2
|
||||
moveq -17,r0
|
||||
clearf zc
|
||||
setf vn
|
||||
movem r1,[r4=r4-8]
|
||||
test_cc 1 0 1 0
|
||||
move.d [r4+],r3
|
||||
dumpr3 ; f
|
||||
|
||||
move.d [r4+],r3
|
||||
dumpr3 ; ffffffef
|
||||
|
||||
move.d [r4+],r3
|
||||
dumpr3 ; 7
|
||||
|
||||
move.d y,r4
|
||||
setf zc
|
||||
clearf vn
|
||||
movem [r4+],r3
|
||||
test_cc 0 1 0 1
|
||||
dumpr3 ; fffffff4
|
||||
|
||||
move.d r0,r3
|
||||
dumpr3 ; f
|
||||
|
||||
move.d r1,r3
|
||||
dumpr3 ; fffffff2
|
||||
|
||||
moveq -12,r1
|
||||
|
||||
move.d r2,r3
|
||||
dumpr3 ; d
|
||||
|
||||
move.d [r4],r3
|
||||
dumpr3 ; 10
|
||||
|
||||
setf zcvn
|
||||
movem [r5=r4-8],r0
|
||||
test_cc 1 1 1 1
|
||||
move.d r0,r3
|
||||
dumpr3 ; fffffff2
|
||||
|
||||
sub.d r5,r4
|
||||
move.d r4,r3
|
||||
dumpr3 ; 8
|
||||
|
||||
move.d r1,r3
|
||||
dumpr3 ; fffffff4
|
||||
|
||||
quit
|
||||
|
||||
97
sim/testsuite/sim/cris/asm/movemrv32.ms
Normal file
97
sim/testsuite/sim/cris/asm/movemrv32.ms
Normal file
@ -0,0 +1,97 @@
|
||||
# mach: crisv32
|
||||
# output: 15\n7\n2\nffff1234\nb\n16\nf\n2\nffffffef\nf\nffff1234\nf\nfffffff4\nd\nfffffff2\n10\nfffffff2\nd\n
|
||||
|
||||
.include "testutils.inc"
|
||||
.data
|
||||
x:
|
||||
.dword 8,9,10,11
|
||||
y:
|
||||
.dword -12,13,-14,15,16
|
||||
|
||||
start
|
||||
moveq 7,r0
|
||||
moveq 2,r1
|
||||
move.d 0xffff1234,r2
|
||||
moveq 21,r3
|
||||
move.d x,r4
|
||||
setf zcvn
|
||||
movem r2,[r4+]
|
||||
test_cc 1 1 1 1
|
||||
subq 12,r4
|
||||
|
||||
dumpr3 ; 15
|
||||
|
||||
move.d [r4+],r3
|
||||
dumpr3 ; 7
|
||||
|
||||
move.d [r4+],r3
|
||||
dumpr3 ; 2
|
||||
|
||||
move.d [r4+],r3
|
||||
dumpr3 ; ffff1234
|
||||
|
||||
move.d [r4+],r3
|
||||
dumpr3 ; b
|
||||
|
||||
subq 16,r4
|
||||
moveq 22,r0
|
||||
moveq 15,r1
|
||||
clearf zcvn
|
||||
movem r0,[r4]
|
||||
test_cc 0 0 0 0
|
||||
move.d [r4+],r3
|
||||
dumpr3 ; 16
|
||||
|
||||
move.d r1,r3
|
||||
dumpr3 ; f
|
||||
|
||||
move.d [r4+],r3
|
||||
dumpr3 ; 2
|
||||
|
||||
subq 8,r4
|
||||
moveq 10,r2
|
||||
moveq -17,r0
|
||||
clearf zc
|
||||
setf vn
|
||||
movem r1,[r4]
|
||||
test_cc 1 0 1 0
|
||||
move.d [r4+],r3
|
||||
dumpr3 ; ffffffef
|
||||
|
||||
move.d [r4+],r3
|
||||
dumpr3 ; f
|
||||
|
||||
move.d [r4+],r3
|
||||
dumpr3 ; ffff1234
|
||||
|
||||
move.d y,r4
|
||||
setf zc
|
||||
clearf vn
|
||||
movem [r4+],r3
|
||||
test_cc 0 1 0 1
|
||||
dumpr3 ; f
|
||||
|
||||
move.d r0,r3
|
||||
dumpr3 ; fffffff4
|
||||
|
||||
move.d r1,r3
|
||||
dumpr3 ; d
|
||||
|
||||
move.d r2,r3
|
||||
dumpr3 ; fffffff2
|
||||
|
||||
move.d [r4],r3
|
||||
dumpr3 ; 10
|
||||
|
||||
subq 8,r4
|
||||
setf zcvn
|
||||
movem [r4+],r0
|
||||
test_cc 1 1 1 1
|
||||
move.d r0,r3
|
||||
dumpr3 ; fffffff2
|
||||
|
||||
move.d r1,r3
|
||||
dumpr3 ; d
|
||||
|
||||
quit
|
||||
|
||||
9
sim/testsuite/sim/cris/asm/movepcb.ms
Normal file
9
sim/testsuite/sim/cris/asm/movepcb.ms
Normal file
@ -0,0 +1,9 @@
|
||||
# mach: crisv3 crisv8 crisv10
|
||||
# xerror:
|
||||
# output: General register read of PC is not implemented.\nprogram stopped with signal 5.\n
|
||||
|
||||
.include "testutils.inc"
|
||||
startnostack
|
||||
setf
|
||||
test.b pc
|
||||
quit
|
||||
16
sim/testsuite/sim/cris/asm/movepcd.ms
Normal file
16
sim/testsuite/sim/cris/asm/movepcd.ms
Normal file
@ -0,0 +1,16 @@
|
||||
# mach: crisv3 crisv8 crisv10
|
||||
# xerror:
|
||||
# output: General register * PC is not implemented.\nprogram stopped with signal 5.\n
|
||||
|
||||
# Both source and dest contain PC for "test.d r" (move.d r,r). Ideally,
|
||||
# the output message should say "read" of PC, but we allow PC as source in
|
||||
# a move.d r,R insn, so there's no logical way to get that, short of a
|
||||
# special pattern, which would be just too ugly. The output message says
|
||||
# "write", but let's match "read" too so we won't fail if things suddenly
|
||||
# improve.
|
||||
|
||||
.include "testutils.inc"
|
||||
startnostack
|
||||
setf
|
||||
test.d pc
|
||||
quit
|
||||
9
sim/testsuite/sim/cris/asm/movepcw.ms
Normal file
9
sim/testsuite/sim/cris/asm/movepcw.ms
Normal file
@ -0,0 +1,9 @@
|
||||
# mach: crisv3 crisv8 crisv10
|
||||
# xerror:
|
||||
# output: General register read of PC is not implemented.\nprogram stopped with signal 5.\n
|
||||
|
||||
.include "testutils.inc"
|
||||
startnostack
|
||||
setf
|
||||
test.w pc
|
||||
quit
|
||||
15
sim/testsuite/sim/cris/asm/moveq.ms
Normal file
15
sim/testsuite/sim/cris/asm/moveq.ms
Normal file
@ -0,0 +1,15 @@
|
||||
# mach: crisv3 crisv8 crisv10 crisv32
|
||||
# sim: --trace-core=on
|
||||
# ld: --section-start=.text=0
|
||||
# output: read-2 exec:0x00000002 -> 0x3262\nread-2 exec:0x00000004 -> 0xe93e\nffffffe2\nread-2 exec:0x00000006 -> 0x324d\nread-2 exec:0x00000008 -> 0xe93e\nd\nread-2 exec:0x0000000a -> 0xe93f\n
|
||||
|
||||
; Output a positive and a negative number, set from moveq.
|
||||
|
||||
.include "testutils.inc"
|
||||
startnostack
|
||||
moveq -30,r3
|
||||
dumpr3
|
||||
moveq 13,r3
|
||||
dumpr3
|
||||
quit
|
||||
|
||||
9
sim/testsuite/sim/cris/asm/moveqpc.ms
Normal file
9
sim/testsuite/sim/cris/asm/moveqpc.ms
Normal file
@ -0,0 +1,9 @@
|
||||
# mach: crisv3 crisv8 crisv10
|
||||
# xerror:
|
||||
# output: General register write to PC is not implemented.\nprogram stopped with signal 5.\n
|
||||
|
||||
.include "testutils.inc"
|
||||
startnostack
|
||||
setf
|
||||
moveq -30,pc
|
||||
quit
|
||||
29
sim/testsuite/sim/cris/asm/mover.ms
Normal file
29
sim/testsuite/sim/cris/asm/mover.ms
Normal file
@ -0,0 +1,29 @@
|
||||
# mach: crisv3 crisv8 crisv10 crisv32
|
||||
# output: ffffff05\nffff0005\n5\nffffff00\n
|
||||
|
||||
; Move between registers. Check that just the subreg is copied.
|
||||
|
||||
.include "testutils.inc"
|
||||
startnostack
|
||||
moveq -30,r3
|
||||
moveq 5,r4
|
||||
move.b r4,r3
|
||||
test_move_cc 1 0 0 0
|
||||
dumpr3
|
||||
|
||||
move.w r4,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3
|
||||
|
||||
move.d r4,r3
|
||||
test_move_cc 0 0 0 0
|
||||
dumpr3
|
||||
|
||||
moveq -1,r3
|
||||
moveq 0,r4
|
||||
move.b r4,r3
|
||||
test_move_cc 0 1 0 0
|
||||
dumpr3
|
||||
|
||||
quit
|
||||
|
||||
9
sim/testsuite/sim/cris/asm/moverbpc.ms
Normal file
9
sim/testsuite/sim/cris/asm/moverbpc.ms
Normal file
@ -0,0 +1,9 @@
|
||||
# mach: crisv3 crisv8 crisv10
|
||||
# xerror:
|
||||
# output: General register write to PC is not implemented.\nprogram stopped with signal 5.\n
|
||||
|
||||
.include "testutils.inc"
|
||||
startnostack
|
||||
setf
|
||||
move.d r5,pc
|
||||
quit
|
||||
9
sim/testsuite/sim/cris/asm/moverdpc.ms
Normal file
9
sim/testsuite/sim/cris/asm/moverdpc.ms
Normal file
@ -0,0 +1,9 @@
|
||||
# mach: crisv3 crisv8 crisv10
|
||||
# xerror:
|
||||
# output: General register write to PC is not implemented.\nprogram stopped with signal 5.\n
|
||||
|
||||
.include "testutils.inc"
|
||||
startnostack
|
||||
setf
|
||||
move.d r5,pc
|
||||
quit
|
||||
45
sim/testsuite/sim/cris/asm/moverm.ms
Normal file
45
sim/testsuite/sim/cris/asm/moverm.ms
Normal file
@ -0,0 +1,45 @@
|
||||
# mach: crisv3 crisv8 crisv10 crisv32
|
||||
# output: 7823fec2\n10231879\n102318fe\n
|
||||
|
||||
.include "testutils.inc"
|
||||
start
|
||||
|
||||
.data
|
||||
mem1:
|
||||
.dword 0x12345678
|
||||
mem2:
|
||||
.word 0x4567
|
||||
mem3:
|
||||
.byte 0x23
|
||||
.dword 0x76543210
|
||||
.byte 0xaa,0x11,0x99
|
||||
|
||||
.text
|
||||
move.d mem1,r2
|
||||
move.d 0x7823fec2,r4
|
||||
setf nzvc
|
||||
move.d r4,[r2+]
|
||||
test_cc 1 1 1 1
|
||||
subq 4,r2
|
||||
move.d [r2],r3
|
||||
dumpr3 ; 7823fec2
|
||||
|
||||
move.d mem2,r3
|
||||
move.d 0x45231879,r4
|
||||
clearf nzvc
|
||||
move.w r4,[r3]
|
||||
test_cc 0 0 0 0
|
||||
move.d [r3],r3
|
||||
dumpr3 ; 10231879
|
||||
|
||||
move.d mem2,r2
|
||||
moveq -2,r4
|
||||
clearf nc
|
||||
setf zv
|
||||
move.b r4,[r2+]
|
||||
test_cc 0 1 1 0
|
||||
subq 1,r2
|
||||
move.d [r2],r3
|
||||
dumpr3 ; 102318ff
|
||||
|
||||
quit
|
||||
9
sim/testsuite/sim/cris/asm/moverpcb.ms
Normal file
9
sim/testsuite/sim/cris/asm/moverpcb.ms
Normal file
@ -0,0 +1,9 @@
|
||||
# mach: crisv3 crisv8 crisv10
|
||||
# xerror:
|
||||
# output: General register read of PC is not implemented.\nprogram stopped with signal 5.\n
|
||||
|
||||
.include "testutils.inc"
|
||||
startnostack
|
||||
setf
|
||||
move.b pc,r5
|
||||
quit
|
||||
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue
Block a user